未验证 提交 6e0369b1 编写于 作者: B Bernard Xiong 提交者: GitHub

Merge pull request #3065 from balanceTWK/master_HEAP_BEGIN

[bsp][stm32] fix : #define HEAP_BEGIN
......@@ -28,7 +28,17 @@ extern "C" {
#define STM32_SRAM1_START (0x20000000)
#define STM32_SRAM1_END (STM32_SRAM1_START + STM32_SRAM1_SIZE * 1024)
#define HEAP_BEGIN STM32_SRAM1_START
#if defined(__CC_ARM) || defined(__CLANG_ARM)
extern int Image$$RW_IRAM1$$ZI$$Limit;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
#pragma section="CSTACK"
#define HEAP_BEGIN (__segment_end("CSTACK"))
#else
extern int __bss_end;
#define HEAP_BEGIN ((void *)&__bss_end)
#endif
#define HEAP_END STM32_SRAM1_END
void SystemClock_Config(void);
......
......@@ -29,5 +29,4 @@ do not initialize { section .noinit };
place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in RAM1_region { section .sram };
place in RAM2_region { readwrite, last block CSTACK};
place in RAM1_region { section .sram , readwrite, last block CSTACK};
......@@ -89,7 +89,7 @@ SECTIONS
. = ALIGN(4);
/* This is used by the startup in order to initialize the .data secion */
_edata = . ;
} >RAM2
} >RAM1
.stack :
{
......@@ -98,7 +98,7 @@ SECTIONS
. = . + _system_stack_size;
. = ALIGN(4);
_estack = .;
} >RAM2
} >RAM1
__bss_start = .;
.bss :
......@@ -116,7 +116,7 @@ SECTIONS
_ebss = . ;
*(.bss.init)
} > RAM2
} > RAM1
__bss_end = .;
_end = .;
......
......@@ -8,7 +8,7 @@ LR_IROM1 0x08000000 0x00080000 { ; load region size_region
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM2 0x10000000 0x00008000 { ; RW data
RW_IRAM1 0x20000000 0x00018000 { ; RW data
.ANY (+RW +ZI)
}
}
......
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