Merge pull request #2468 from lymzzyh/gpio

[BSP][K210]Add gpio drivers

bsp/k210/.config

@@ -112,7 +112,23 @@ CONFIG_DFS_FILESYSTEMS_MAX=4
 CONFIG_DFS_FILESYSTEM_TYPES_MAX=4
 CONFIG_DFS_FD_MAX=16
 # CONFIG_RT_USING_DFS_MNTTABLE is not set
-# CONFIG_RT_USING_DFS_ELMFAT is not set
+CONFIG_RT_USING_DFS_ELMFAT=y
+
+#
+# elm-chan's FatFs, Generic FAT Filesystem Module
+#
+CONFIG_RT_DFS_ELM_CODE_PAGE=437
+CONFIG_RT_DFS_ELM_WORD_ACCESS=y
+# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
+# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
+# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
+CONFIG_RT_DFS_ELM_USE_LFN_3=y
+CONFIG_RT_DFS_ELM_USE_LFN=3
+CONFIG_RT_DFS_ELM_MAX_LFN=255
+CONFIG_RT_DFS_ELM_DRIVES=2
+CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=512
+# CONFIG_RT_DFS_ELM_USE_ERASE is not set
+CONFIG_RT_DFS_ELM_REENTRANT=y
 CONFIG_RT_USING_DFS_DEVFS=y
 # CONFIG_RT_USING_DFS_ROMFS is not set
 # CONFIG_RT_USING_DFS_RAMFS is not set
@@ -131,7 +147,7 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_RT_USING_HWTIMER is not set
 # CONFIG_RT_USING_CPUTIME is not set
 # CONFIG_RT_USING_I2C is not set
-# CONFIG_RT_USING_PIN is not set
+CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_ADC is not set
 # CONFIG_RT_USING_PWM is not set
 # CONFIG_RT_USING_MTD_NOR is not set
@@ -140,7 +156,14 @@ CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_RT_USING_PM is not set
 # CONFIG_RT_USING_RTC is not set
 # CONFIG_RT_USING_SDIO is not set
-# CONFIG_RT_USING_SPI is not set
+CONFIG_RT_USING_SPI=y
+# CONFIG_RT_USING_QSPI is not set
+CONFIG_RT_USING_SPI_MSD=y
+# CONFIG_RT_USING_SFUD is not set
+# CONFIG_RT_USING_W25QXX is not set
+# CONFIG_RT_USING_GD is not set
+# CONFIG_RT_USING_ENC28J60 is not set
+# CONFIG_RT_USING_SPI_WIFI is not set
 # CONFIG_RT_USING_WDT is not set
 # CONFIG_RT_USING_AUDIO is not set
 # CONFIG_RT_USING_SENSOR is not set
@@ -218,6 +241,7 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_WEBTERMINAL is not set
 # CONFIG_PKG_USING_CJSON is not set
 # CONFIG_PKG_USING_JSMN is not set
+# CONFIG_PKG_USING_LIBMODBUS is not set
 # CONFIG_PKG_USING_LJSON is not set
 # CONFIG_PKG_USING_EZXML is not set
 # CONFIG_PKG_USING_NANOPB is not set
@@ -327,6 +351,7 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_PKG_USING_MPU6XXX is not set
 # CONFIG_PKG_USING_PCF8574 is not set
 # CONFIG_PKG_USING_SX12XX is not set
+# CONFIG_PKG_USING_SIGNAL_LED is not set
 CONFIG_PKG_USING_KENDRYTE_SDK=y
 CONFIG_PKG_KENDRYTE_SDK_PATH="/packages/peripherals/kendryte-sdk"
 CONFIG_PKG_USING_KENDRYTE_SDK_V052=y
@@ -357,74 +382,22 @@ CONFIG_PKG_KENDRYTE_SDK_VER="v0.5.2"
 # CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
 # CONFIG_PKG_USING_HELLO is not set
 # CONFIG_PKG_USING_VI is not set
-
-#
-# Privated Packages of RealThread
-#
-# CONFIG_PKG_USING_CODEC is not set
-# CONFIG_PKG_USING_PLAYER is not set
-# CONFIG_PKG_USING_MPLAYER is not set
-# CONFIG_PKG_USING_PERSIMMON_SRC is not set
-# CONFIG_PKG_USING_JS_PERSIMMON is not set
-# CONFIG_PKG_USING_JERRYSCRIPT_WIN32 is not set
-
-#
-# Network Utilities
-#
-# CONFIG_PKG_USING_WICED is not set
-# CONFIG_PKG_USING_CLOUDSDK is not set
-# CONFIG_PKG_USING_COREMARK is not set
-# CONFIG_PKG_USING_POWER_MANAGER is not set
-# CONFIG_PKG_USING_RT_OTA is not set
-# CONFIG_PKG_USING_RDBD_SRC is not set
-# CONFIG_PKG_USING_RTINSIGHT is not set
-# CONFIG_PKG_USING_SMARTCONFIG is not set
-# CONFIG_PKG_USING_RTX is not set
-# CONFIG_RT_USING_TESTCASE is not set
-# CONFIG_PKG_USING_NGHTTP2 is not set
-# CONFIG_PKG_USING_AVS is not set
-# CONFIG_PKG_USING_STS is not set
-# CONFIG_PKG_USING_DLMS is not set
-
-#
-# Test Packages of RealThread
-#
-
-#
-# RT-Thread Senior Membership Packages
-#
-
-#
-# system packages
-#
-# CONFIG_PKG_USING_FTL_SRC is not set
-
-#
-# IoT - internet of things
-#
-
-#
-# Webnet: A web server package for rt-thread
-#
-
-#
-# rtpkgs online packages
-#
-# CONFIG_PKG_USING_CSTRING is not set
-# CONFIG_PKG_USING_ARGPARSE is not set
-# CONFIG_PKG_USING_LIBBMPREAD is not set
-# CONFIG_PKG_USING_LIBUTILS is not set
-# CONFIG_PKG_USING_SAM is not set
-# CONFIG_PKG_USING_LIBCALLBACK is not set
-# CONFIG_PKG_USING_Z_EVENT is not set
-# CONFIG_PKG_USING_LIBSTM32HAL is not set
 CONFIG_BOARD_K210_EVB=y
 CONFIG_BSP_USING_UART_HS=y
 # CONFIG_BSP_USING_UART1 is not set
 # CONFIG_BSP_USING_UART2 is not set
 # CONFIG_BSP_USING_UART3 is not set
 # CONFIG_BSP_USING_I2C1 is not set
-# CONFIG_BSP_USING_SPI1 is not set
+CONFIG_BSP_USING_SPI1=y
+# CONFIG_BSP_USING_SPI1_AS_QSPI is not set
+CONFIG_BSP_SPI1_CLK_PIN=29
+CONFIG_BSP_SPI1_D0_PIN=30
+CONFIG_BSP_SPI1_D1_PIN=31
+CONFIG_BSP_SPI1_USING_SS0=y
+CONFIG_BSP_SPI1_SS0_PIN=32
+# CONFIG_BSP_SPI1_USING_SS1 is not set
+# CONFIG_BSP_SPI1_USING_SS2 is not set
+# CONFIG_BSP_SPI1_USING_SS3 is not set
 CONFIG_BSP_USING_LCD=y
 CONFIG_BSP_LCD_CS_PIN=6
 CONFIG_BSP_LCD_WR_PIN=7
@@ -439,4 +412,5 @@ CONFIG_BSP_CAMERA_CMOS_VSYNC_PIN=12
 CONFIG_BSP_CAMERA_CMOS_PWDN_PIN=13
 CONFIG_BSP_CAMERA_CMOS_XCLK_PIN=14
 CONFIG_BSP_CAMERA_CMOS_PCLK_PIN=15
+CONFIG_BSP_CAMERA_CMOS_HREF_PIN=17
 CONFIG___STACKSIZE__=4096

bsp/k210/applications/mnt.c

@@ -8,6 +8,7 @@
  */
 
 #include <rtthread.h>
+#if defined(RT_USING_SPI_MSD) && defined(RT_USING_DFS_ELMFAT)
 #include <spi_msd.h>
 #include <dfs_fs.h>
 int mnt_init(void)
@@ -20,3 +21,5 @@ int mnt_init(void)
     return 0;
 }
 INIT_ENV_EXPORT(mnt_init);
+#endif
+

bsp/k210/driver/Kconfig

@@ -50,7 +50,7 @@ if BSP_USING_SPI1
     if BSP_SPI1_USING_SS0
         config BSP_SPI1_SS0_PIN
             int "spi1 ss0 pin number"
-            default 24
+            default 32
     endif
     menuconfig BSP_SPI1_USING_SS1
         bool "SPI1 Enable SS1"

bsp/k210/driver/SConscript

@@ -11,6 +11,9 @@ drv_io_config.c
 ''')
 CPPPATH = [cwd]
 
+if GetDepend('RT_USING_PIN'):
+    src += ['drv_gpio.c']
+
 if GetDepend('BSP_USING_LCD'):
     src += ['drv_lcd.c']
 
@@ -34,4 +37,12 @@ if GetDepend('RT_USING_WDT'):
 
 group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH)
 
-Return('group')
+objs = [group]
+
+list = os.listdir(cwd)
+
+for item in list:
+    if os.path.isfile(os.path.join(cwd, item, 'SConscript')):
+        objs = objs + SConscript(os.path.join(item, 'SConscript'))
+
+Return('objs')

bsp/k210/driver/drv_gpio.c

+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-03-19     ZYH          first version
+ */
+
+#include <rtthread.h>
+#include <rtdevice.h>
+#include <fpioa.h>
+#include <gpiohs.h>
+#include "drv_gpio.h"
+#include "drv_io_config.h"
+#include <plic.h>
+#include <rthw.h>
+#include <utils.h>
+#include <string.h>
+
+#define DBG_ENABLE
+#define DBG_SECTION_NAME  "PIN"
+#define DBG_LEVEL         DBG_WARNING
+#define DBG_COLOR
+#include <rtdbg.h>
+
+#define FUNC_GPIOHS(n) (FUNC_GPIOHS0 + n)
+
+static int pin_alloc_table[FPIOA_NUM_IO];
+static uint32_t free_pin = 0;
+
+static int alloc_pin_channel(rt_base_t pin_index)
+{
+    if(free_pin == 31)
+    {
+        LOG_E("no free gpiohs channel to alloc");
+        return -1;
+    }
+
+    if(pin_alloc_table[pin_index] != -1)
+    {
+        LOG_W("already alloc gpiohs channel for pin %d", pin_index);
+        return pin_alloc_table[pin_index];
+    }
+
+    pin_alloc_table[pin_index] = free_pin;
+    free_pin++;
+
+    fpioa_set_function(pin_index, FUNC_GPIOHS(pin_alloc_table[pin_index]));
+    return pin_alloc_table[pin_index];
+}
+
+static int get_pin_channel(rt_base_t pin_index)
+{
+    return pin_alloc_table[pin_index];
+}
+
+static void free_pin_channel(rt_base_t pin_index)
+{
+    if(pin_alloc_table[pin_index] == -1)
+    {
+        LOG_W("free error:not alloc gpiohs channel for pin %d", pin_index);
+        return;
+    }
+    pin_alloc_table[pin_index] = -1;
+    free_pin--;
+}
+
+
+static void drv_pin_mode(struct rt_device *device, rt_base_t pin, rt_base_t mode)
+{
+    int pin_channel = get_pin_channel(pin);
+    if(pin_channel == -1)
+    {
+        pin_channel = alloc_pin_channel(pin);
+        if(pin_channel == -1)
+        {
+            return;
+        }
+    }
+
+    switch (mode)
+    {
+        case PIN_MODE_OUTPUT:
+            gpiohs_set_drive_mode(pin_channel, GPIO_DM_OUTPUT);
+            break;
+        case PIN_MODE_INPUT:
+            gpiohs_set_drive_mode(pin_channel, GPIO_DM_INPUT);
+            break;
+        case PIN_MODE_INPUT_PULLUP:
+            gpiohs_set_drive_mode(pin_channel, GPIO_DM_INPUT_PULL_UP);
+            break;
+        case PIN_MODE_INPUT_PULLDOWN:
+            gpiohs_set_drive_mode(pin_channel, GPIO_DM_INPUT_PULL_DOWN);
+            break;
+        default:
+            LOG_E("Not support mode %d", mode);
+            break;
+    }
+}
+
+static void drv_pin_write(struct rt_device *device, rt_base_t pin, rt_base_t value)
+{
+    int pin_channel = get_pin_channel(pin);
+    if(pin_channel == -1)
+    {
+        LOG_E("pin %d not set mode", pin);
+        return;
+    }
+    gpiohs_set_pin(pin_channel, value == PIN_HIGH ? GPIO_PV_HIGH : GPIO_PV_LOW);
+}
+
+static int drv_pin_read(struct rt_device *device, rt_base_t pin)
+{
+    int pin_channel = get_pin_channel(pin);
+    if(pin_channel == -1)
+    {
+        LOG_E("pin %d not set mode", pin);
+        return -1;
+    }
+    return gpiohs_get_pin(pin_channel) == GPIO_PV_HIGH ? PIN_HIGH : PIN_LOW;
+}
+
+static struct 
+{
+    void (*hdr)(void *args);
+    void *args;
+    gpio_pin_edge_t edge;
+} irq_table[32];
+
+static void pin_irq(int vector, void *param)
+{
+    int pin_channel = vector - IRQN_GPIOHS0_INTERRUPT;
+    if(irq_table[pin_channel].edge & GPIO_PE_FALLING)
+    {
+        set_gpio_bit(gpiohs->fall_ie.u32, pin_channel, 0);
+        set_gpio_bit(gpiohs->fall_ip.u32, pin_channel, 1);
+        set_gpio_bit(gpiohs->fall_ie.u32, pin_channel, 1);
+    }
+
+    if(irq_table[pin_channel 2019-03-18     ZYH          first version].edge & GPIO_PE_RISING)
+    {
+        set_gpio_bit(gpiohs->rise_ie.u32, pin_channel, 0);
+        set_gpio_bit(gpiohs->rise_ip.u32, pin_channel, 1);
+        set_gpio_bit(gpiohs->rise_ie.u32, pin_channel, 1);
+    }
+
+    if(irq_table[pin_channel].edge & GPIO_PE_LOW)
+    {
+        set_gpio_bit(gpiohs->low_ie.u32, pin_channel, 0);
+        set_gpio_bit(gpiohs->low_ip.u32, pin_channel, 1);
+        set_gpio_bit(gpiohs->low_ie.u32, pin_channel, 1);
+    }
+
+    if(irq_table[pin_channel].edge & GPIO_PE_HIGH)
+    {
+        set_gpio_bit(gpiohs->high_ie.u32, pin_channel, 0);
+        set_gpio_bit(gpiohs->high_ip.u32, pin_channel, 1);
+        set_gpio_bit(gpiohs->high_ie.u32, pin_channel, 1);
+    }
+    if(irq_table[pin_channel].hdr)
+    {
+        irq_table[pin_channel].hdr(irq_table[pin_channel].args);
+    }
+}
+
+static rt_err_t drv_pin_attach_irq(struct rt_device *device, rt_int32_t pin,
+                                   rt_uint32_t mode, void (*hdr)(void *args), void *args)
+{
+    int pin_channel = get_pin_channel(pin);
+    char irq_name[10];
+    if(pin_channel == -1)
+    {
+        LOG_E("pin %d not set mode", pin);
+        return -RT_ERROR;
+    }
+    irq_table[pin_channel].hdr = hdr;
+    irq_table[pin_channel].args = args;
+    switch (mode)
+    {
+        case PIN_IRQ_MODE_RISING:
+            irq_table[pin_channel].edge = GPIO_PE_FALLING;
+            break;
+        case PIN_IRQ_MODE_FALLING:
+            irq_table[pin_channel].edge = GPIO_PE_RISING;
+            break;
+        case PIN_IRQ_MODE_RISING_FALLING:
+            irq_table[pin_channel].edge = GPIO_PE_BOTH;
+            break;
+        case PIN_IRQ_MODE_HIGH_LEVEL:
+            irq_table[pin_channel].edge = GPIO_PE_LOW;
+            break;
+        case PIN_IRQ_MODE_LOW_LEVEL:
+            irq_table[pin_channel].edge = GPIO_PE_HIGH;
+            break;
+        default:
+            break;
+    }
+    gpiohs_set_pin_edge(pin_channel, irq_table[pin_channel].edge);
+    rt_snprintf(irq_name, sizeof irq_name, "pin%d", pin);
+    rt_hw_interrupt_install(IRQN_GPIOHS0_INTERRUPT + pin_channel, pin_irq, RT_NULL, irq_name);
+
+    return RT_EOK;
+}
+
+static rt_err_t drv_pin_detach_irq(struct rt_device *device, rt_int32_t pin)
+{
+    rt_err_t ret = RT_EOK;
+
+    int pin_channel = get_pin_channel(pin);
+    if(pin_channel == -1)
+    {
+        LOG_E("pin %d not set mode", pin);
+        return -RT_ERROR;
+    }
+
+    irq_table[pin_channel].hdr = RT_NULL;
+    irq_table[pin_channel].args = RT_NULL;
+
+    return ret;
+}
+
+static rt_err_t drv_pin_irq_enable(struct rt_device *device, rt_base_t pin, rt_uint32_t enabled)
+{
+    int pin_channel = get_pin_channel(pin);
+
+    if(pin_channel == -1)
+    {
+        LOG_E("pin %d not set mode", pin);
+        return -RT_ERROR;
+    }
+
+    if(enabled)
+    {
+        rt_hw_interrupt_umask(IRQN_GPIOHS0_INTERRUPT + pin_channel);
+    }
+    else
+    {
+        rt_hw_interrupt_mask(IRQN_GPIOHS0_INTERRUPT + pin_channel);
+    }
+    
+    return RT_EOK;
+}
+
+const static struct rt_pin_ops drv_pin_ops =
+{
+    drv_pin_mode,
+    drv_pin_write,
+    drv_pin_read,
+
+    drv_pin_attach_irq,
+    drv_pin_detach_irq,
+    drv_pin_irq_enable
+};
+
+int rt_hw_pin_init(void)
+{
+    rt_err_t ret = RT_EOK;
+    memset(pin_alloc_table, 0, sizeof pin_alloc_table);
+    free_pin = GPIO_ALLOC_START;
+    ret = rt_device_pin_register("pin", &drv_pin_ops, RT_NULL);
+
+    return ret;
+}
+INIT_BOARD_EXPORT(rt_hw_pin_init);
+

bsp/k210/driver/drv_gpio.h

+/*
+ * Copyright (c) 2006-2018, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2019-03-19     ZYH          first version
+ */
+
+#ifndef DRV_GPIO_H__
+#define DRV_GPIO_H__
+
+int rt_hw_pin_init(void);
+
+#endif
\ No newline at end of file

bsp/k210/driver/drv_io_config.h

@@ -18,6 +18,7 @@ enum HS_GPIO_CONFIG
 #ifdef BSP_SPI1_USING_SS3
     SPI1_CS3_PIN,
 #endif
+    GPIO_ALLOC_START /* index of gpio driver start */
 };
 
 extern int io_config_init(void);

bsp/k210/rtconfig.h

@@ -105,7 +105,22 @@
 #define DFS_FILESYSTEM_TYPES_MAX 4
 #define DFS_FD_MAX 16
 /* RT_USING_DFS_MNTTABLE is not set */
-/* RT_USING_DFS_ELMFAT is not set */
+#define RT_USING_DFS_ELMFAT
+
+/* elm-chan's FatFs, Generic FAT Filesystem Module */
+
+#define RT_DFS_ELM_CODE_PAGE 437
+#define RT_DFS_ELM_WORD_ACCESS
+/* RT_DFS_ELM_USE_LFN_0 is not set */
+/* RT_DFS_ELM_USE_LFN_1 is not set */
+/* RT_DFS_ELM_USE_LFN_2 is not set */
+#define RT_DFS_ELM_USE_LFN_3
+#define RT_DFS_ELM_USE_LFN 3
+#define RT_DFS_ELM_MAX_LFN 255
+#define RT_DFS_ELM_DRIVES 2
+#define RT_DFS_ELM_MAX_SECTOR_SIZE 512
+/* RT_DFS_ELM_USE_ERASE is not set */
+#define RT_DFS_ELM_REENTRANT
 #define RT_USING_DFS_DEVFS
 /* RT_USING_DFS_ROMFS is not set */
 /* RT_USING_DFS_RAMFS is not set */
@@ -123,7 +138,7 @@
 /* RT_USING_HWTIMER is not set */
 /* RT_USING_CPUTIME is not set */
 /* RT_USING_I2C is not set */
-/* RT_USING_PIN is not set */
+#define RT_USING_PIN
 /* RT_USING_ADC is not set */
 /* RT_USING_PWM is not set */
 /* RT_USING_MTD_NOR is not set */
@@ -132,7 +147,14 @@
 /* RT_USING_PM is not set */
 /* RT_USING_RTC is not set */
 /* RT_USING_SDIO is not set */
-/* RT_USING_SPI is not set */
+#define RT_USING_SPI
+/* RT_USING_QSPI is not set */
+#define RT_USING_SPI_MSD
+/* RT_USING_SFUD is not set */
+/* RT_USING_W25QXX is not set */
+/* RT_USING_GD is not set */
+/* RT_USING_ENC28J60 is not set */
+/* RT_USING_SPI_WIFI is not set */
 /* RT_USING_WDT is not set */
 /* RT_USING_AUDIO is not set */
 /* RT_USING_SENSOR is not set */
@@ -196,6 +218,7 @@
 /* PKG_USING_WEBTERMINAL is not set */
 /* PKG_USING_CJSON is not set */
 /* PKG_USING_JSMN is not set */
+/* PKG_USING_LIBMODBUS is not set */
 /* PKG_USING_LJSON is not set */
 /* PKG_USING_EZXML is not set */
 /* PKG_USING_NANOPB is not set */
@@ -292,6 +315,7 @@
 /* PKG_USING_MPU6XXX is not set */
 /* PKG_USING_PCF8574 is not set */
 /* PKG_USING_SX12XX is not set */
+/* PKG_USING_SIGNAL_LED is not set */
 #define PKG_USING_KENDRYTE_SDK
 #define PKG_USING_KENDRYTE_SDK_V052
 /* PKG_USING_KENDRYTE_SDK_LATEST_VERSION is not set */
@@ -318,62 +342,22 @@
 /* PKG_USING_PERIPHERAL_SAMPLES is not set */
 /* PKG_USING_HELLO is not set */
 /* PKG_USING_VI is not set */
-
-/* Privated Packages of RealThread */
-
-/* PKG_USING_CODEC is not set */
-/* PKG_USING_PLAYER is not set */
-/* PKG_USING_MPLAYER is not set */
-/* PKG_USING_PERSIMMON_SRC is not set */
-/* PKG_USING_JS_PERSIMMON is not set */
-/* PKG_USING_JERRYSCRIPT_WIN32 is not set */
-
-/* Network Utilities */
-
-/* PKG_USING_WICED is not set */
-/* PKG_USING_CLOUDSDK is not set */
-/* PKG_USING_COREMARK is not set */
-/* PKG_USING_POWER_MANAGER is not set */
-/* PKG_USING_RT_OTA is not set */
-/* PKG_USING_RDBD_SRC is not set */
-/* PKG_USING_RTINSIGHT is not set */
-/* PKG_USING_SMARTCONFIG is not set */
-/* PKG_USING_RTX is not set */
-/* RT_USING_TESTCASE is not set */
-/* PKG_USING_NGHTTP2 is not set */
-/* PKG_USING_AVS is not set */
-/* PKG_USING_STS is not set */
-/* PKG_USING_DLMS is not set */
-
-/* Test Packages of RealThread */
-
-/* RT-Thread Senior Membership Packages */
-
-/* system packages */
-
-/* PKG_USING_FTL_SRC is not set */
-
-/* IoT - internet of things */
-
-/* Webnet: A web server package for rt-thread */
-
-/* rtpkgs online packages */
-
-/* PKG_USING_CSTRING is not set */
-/* PKG_USING_ARGPARSE is not set */
-/* PKG_USING_LIBBMPREAD is not set */
-/* PKG_USING_LIBUTILS is not set */
-/* PKG_USING_SAM is not set */
-/* PKG_USING_LIBCALLBACK is not set */
-/* PKG_USING_Z_EVENT is not set */
-/* PKG_USING_LIBSTM32HAL is not set */
 #define BOARD_K210_EVB
 #define BSP_USING_UART_HS
 /* BSP_USING_UART1 is not set */
 /* BSP_USING_UART2 is not set */
 /* BSP_USING_UART3 is not set */
 /* BSP_USING_I2C1 is not set */
-/* BSP_USING_SPI1 is not set */
+#define BSP_USING_SPI1
+/* BSP_USING_SPI1_AS_QSPI is not set */
+#define BSP_SPI1_CLK_PIN 29
+#define BSP_SPI1_D0_PIN 30
+#define BSP_SPI1_D1_PIN 31
+#define BSP_SPI1_USING_SS0
+#define BSP_SPI1_SS0_PIN 32
+/* BSP_SPI1_USING_SS1 is not set */
+/* BSP_SPI1_USING_SS2 is not set */
+/* BSP_SPI1_USING_SS3 is not set */
 #define BSP_USING_LCD
 #define BSP_LCD_CS_PIN 6
 #define BSP_LCD_WR_PIN 7
@@ -388,6 +372,7 @@
 #define BSP_CAMERA_CMOS_PWDN_PIN 13
 #define BSP_CAMERA_CMOS_XCLK_PIN 14
 #define BSP_CAMERA_CMOS_PCLK_PIN 15
+#define BSP_CAMERA_CMOS_HREF_PIN 17
 #define __STACKSIZE__ 4096
 
 #endif

bsp/k210/rtconfig.py

@@ -27,7 +27,7 @@ BUILD = 'release'
 
 if PLATFORM == 'gcc':
     # toolchains
-    PREFIX  = 'riscv64-unknown-elf-'
+    PREFIX  = 'riscv-none-embed-'
     CC      = PREFIX + 'gcc'
     CXX     = PREFIX + 'g++'
     AS      = PREFIX + 'gcc'