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体验新版 GitCode,发现更多精彩内容 >>
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b1a9c4c4
编写于
4月 08, 2022
作者:
B
blta
提交者:
GitHub
4月 08, 2022
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电子邮件补丁
差异文件
[libcpu/arm]: add dsb and isb instructions in the end of rt_hw_context_switch_to (#5748)
上级
6b565152
变更
18
隐藏空白更改
内联
并排
Showing
18 changed file
with
72 addition
and
0 deletion
+72
-0
libcpu/arm/cortex-m0/context_gcc.S
libcpu/arm/cortex-m0/context_gcc.S
+4
-0
libcpu/arm/cortex-m0/context_iar.S
libcpu/arm/cortex-m0/context_iar.S
+4
-0
libcpu/arm/cortex-m0/context_rvds.S
libcpu/arm/cortex-m0/context_rvds.S
+4
-0
libcpu/arm/cortex-m23/context_gcc.S
libcpu/arm/cortex-m23/context_gcc.S
+4
-0
libcpu/arm/cortex-m23/context_iar.S
libcpu/arm/cortex-m23/context_iar.S
+4
-0
libcpu/arm/cortex-m23/context_rvds.S
libcpu/arm/cortex-m23/context_rvds.S
+4
-0
libcpu/arm/cortex-m3/context_gcc.S
libcpu/arm/cortex-m3/context_gcc.S
+4
-0
libcpu/arm/cortex-m3/context_iar.S
libcpu/arm/cortex-m3/context_iar.S
+4
-0
libcpu/arm/cortex-m3/context_rvds.S
libcpu/arm/cortex-m3/context_rvds.S
+4
-0
libcpu/arm/cortex-m33/context_gcc.S
libcpu/arm/cortex-m33/context_gcc.S
+4
-0
libcpu/arm/cortex-m33/context_iar.S
libcpu/arm/cortex-m33/context_iar.S
+4
-0
libcpu/arm/cortex-m33/context_rvds.S
libcpu/arm/cortex-m33/context_rvds.S
+4
-0
libcpu/arm/cortex-m4/context_gcc.S
libcpu/arm/cortex-m4/context_gcc.S
+4
-0
libcpu/arm/cortex-m4/context_iar.S
libcpu/arm/cortex-m4/context_iar.S
+4
-0
libcpu/arm/cortex-m4/context_rvds.S
libcpu/arm/cortex-m4/context_rvds.S
+4
-0
libcpu/arm/cortex-m7/context_gcc.S
libcpu/arm/cortex-m7/context_gcc.S
+4
-0
libcpu/arm/cortex-m7/context_iar.S
libcpu/arm/cortex-m7/context_iar.S
+4
-0
libcpu/arm/cortex-m7/context_rvds.S
libcpu/arm/cortex-m7/context_rvds.S
+4
-0
未找到文件。
libcpu/arm/cortex-m0/context_gcc.S
浏览文件 @
b1a9c4c4
...
...
@@ -180,6 +180,10 @@ rt_hw_context_switch_to:
/
*
enable
interrupts
at
processor
level
*/
CPSIE
I
/
*
ensure
PendSV
exception
taken
place
before
subsequent
operation
*/
DSB
ISB
/
*
never
reach
here
!
*/
/*
compatible
with
old
version
*/
...
...
libcpu/arm/cortex-m0/context_iar.S
浏览文件 @
b1a9c4c4
...
...
@@ -186,6 +186,10 @@ rt_hw_context_switch_to:
; enable interrupts at processor level
CPSIE
I
; ensure PendSV exception taken place before subsequent operation
DSB
ISB
; never reach here!
; compatible with old version
...
...
libcpu/arm/cortex-m0/context_rvds.S
浏览文件 @
b1a9c4c4
...
...
@@ -189,6 +189,10 @@ rt_hw_context_switch_to PROC
; enable interrupts at processor level
CPSIE
I
; ensure PendSV exception taken place before subsequent operation
DSB
ISB
; never reach here!
ENDP
...
...
libcpu/arm/cortex-m23/context_gcc.S
浏览文件 @
b1a9c4c4
...
...
@@ -181,6 +181,10 @@ rt_hw_context_switch_to:
/
*
enable
interrupts
at
processor
level
*/
CPSIE
I
/
*
ensure
PendSV
exception
taken
place
before
subsequent
operation
*/
DSB
ISB
/
*
never
reach
here
!
*/
/*
compatible
with
old
version
*/
...
...
libcpu/arm/cortex-m23/context_iar.S
浏览文件 @
b1a9c4c4
...
...
@@ -187,6 +187,10 @@ rt_hw_context_switch_to:
; enable interrupts at processor level
CPSIE
I
; ensure PendSV exception taken place before subsequent operation
DSB
ISB
; never reach here!
; compatible with old version
...
...
libcpu/arm/cortex-m23/context_rvds.S
浏览文件 @
b1a9c4c4
...
...
@@ -190,6 +190,10 @@ rt_hw_context_switch_to PROC
; enable interrupts at processor level
CPSIE
I
; ensure PendSV exception taken place before subsequent operation
DSB
ISB
; never reach here!
ENDP
...
...
libcpu/arm/cortex-m3/context_gcc.S
浏览文件 @
b1a9c4c4
...
...
@@ -162,6 +162,10 @@ rt_hw_context_switch_to:
CPSIE
F
CPSIE
I
/
*
ensure
PendSV
exception
taken
place
before
subsequent
operation
*/
DSB
ISB
/
*
never
reach
here
!
*/
/*
compatible
with
old
version
*/
...
...
libcpu/arm/cortex-m3/context_iar.S
浏览文件 @
b1a9c4c4
...
...
@@ -161,6 +161,10 @@ rt_hw_context_switch_to:
CPSIE
F
CPSIE
I
; ensure PendSV exception taken place before subsequent operation
DSB
ISB
; never reach here!
; compatible with old version
...
...
libcpu/arm/cortex-m3/context_rvds.S
浏览文件 @
b1a9c4c4
...
...
@@ -167,6 +167,10 @@ rt_hw_context_switch_to PROC
CPSIE
F
CPSIE
I
; ensure PendSV exception taken place before subsequent operation
DSB
ISB
; never reach here!
ENDP
...
...
libcpu/arm/cortex-m33/context_gcc.S
浏览文件 @
b1a9c4c4
...
...
@@ -249,6 +249,10 @@ rt_hw_context_switch_to:
CPSIE
F
CPSIE
I
/
*
ensure
PendSV
exception
taken
place
before
subsequent
operation
*/
DSB
ISB
/
*
never
reach
here
!
*/
/*
compatible
with
old
version
*/
...
...
libcpu/arm/cortex-m33/context_iar.S
浏览文件 @
b1a9c4c4
...
...
@@ -253,6 +253,10 @@ rt_hw_context_switch_to:
CPSIE
F
CPSIE
I
; ensure PendSV exception taken place before subsequent operation
DSB
ISB
; never reach here!
; compatible with old version
...
...
libcpu/arm/cortex-m33/context_rvds.S
浏览文件 @
b1a9c4c4
...
...
@@ -254,6 +254,10 @@ rt_hw_context_switch_to PROC
CPSIE
F
CPSIE
I
; ensure PendSV exception taken place before subsequent operation
DSB
ISB
; never reach here!
ENDP
...
...
libcpu/arm/cortex-m4/context_gcc.S
浏览文件 @
b1a9c4c4
...
...
@@ -208,6 +208,10 @@ rt_hw_context_switch_to:
CPSIE
F
CPSIE
I
/
*
ensure
PendSV
exception
taken
place
before
subsequent
operation
*/
DSB
ISB
/
*
never
reach
here
!
*/
/*
compatible
with
old
version
*/
...
...
libcpu/arm/cortex-m4/context_iar.S
浏览文件 @
b1a9c4c4
...
...
@@ -208,6 +208,10 @@ rt_hw_context_switch_to:
CPSIE
F
CPSIE
I
; ensure PendSV exception taken place before subsequent operation
DSB
ISB
; never reach here!
; compatible with old version
...
...
libcpu/arm/cortex-m4/context_rvds.S
浏览文件 @
b1a9c4c4
...
...
@@ -208,6 +208,10 @@ rt_hw_context_switch_to PROC
CPSIE
F
CPSIE
I
; ensure PendSV exception taken place before subsequent operation
DSB
ISB
; never reach here!
ENDP
...
...
libcpu/arm/cortex-m7/context_gcc.S
浏览文件 @
b1a9c4c4
...
...
@@ -208,6 +208,10 @@ rt_hw_context_switch_to:
CPSIE
F
CPSIE
I
/
*
ensure
PendSV
exception
taken
place
before
subsequent
operation
*/
DSB
ISB
/
*
never
reach
here
!
*/
/*
compatible
with
old
version
*/
...
...
libcpu/arm/cortex-m7/context_iar.S
浏览文件 @
b1a9c4c4
...
...
@@ -208,6 +208,10 @@ rt_hw_context_switch_to:
CPSIE
F
CPSIE
I
; ensure PendSV exception taken place before subsequent operation
DSB
ISB
; never reach here!
; compatible with old version
...
...
libcpu/arm/cortex-m7/context_rvds.S
浏览文件 @
b1a9c4c4
...
...
@@ -208,6 +208,10 @@ rt_hw_context_switch_to PROC
CPSIE
F
CPSIE
I
; ensure PendSV exception taken place before subsequent operation
DSB
ISB
; never reach here!
ENDP
...
...
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