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提交 bce04f59 编写于 作者: C coolsnowwolf
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switch ar71xx to kernel 4.14 (including K2T

上级 01c2f5af
展开全部 隐藏空白更改
内联 并排
Showing with 66424 addition and 510 deletion
feeds.conf.default
浏览文件 @ bce04f59
......@@ -9,4 +9,4 @@ src-git telephony https://github.com/openwrt/telephony.git;openwrt-18.06
#src-git targets https://github.com/openwrt/targets.git
#src-git management https://github.com/openwrt-management/packages.git
#src-git oldpackages http://git.openwrt.org/packages.git
#src-link custom /usr/src/openwrt/custom-feed
#src-link custom /usr/src/openwrt/custom-feed
\ No newline at end of file
target/linux/ar71xx/Makefile
浏览文件 @ bce04f59
......@@ -13,7 +13,7 @@ FEATURES:=usbgadget
CPU_TYPE:=24kc
SUBTARGETS:=generic tiny nand mikrotik
KERNEL_PATCHVER:=4.9
KERNEL_PATCHVER:=4.14
include $(INCLUDE_DIR)/target.mk
......
target/linux/ar71xx/base-files/etc/board.d/01_leds
浏览文件 @ bce04f59
......@@ -60,6 +60,22 @@ ap147-010)
ucidef_set_led_switch "lan4" "LAN4" "ap147:green:lan4" "switch0" "0x02"
ucidef_set_led_wlan "wlan2g" "WLAN 2.4 GHz" "ap147:green:wlan-2g" "phy0tpt"
;;
ac9531-010)
ucidef_set_led_netdev "wan" "WAN" "ac9531:green:wan" "eth1"
ucidef_set_led_switch "lan1" "LAN1" "ac9531:green:lan1" "switch0" "0x02"
ucidef_set_led_switch "lan2" "LAN2" "ac9531:green:lan2" "switch0" "0x04"
ucidef_set_led_switch "lan3" "LAN3" "ac9531:green:lan3" "switch0" "0x08"
ucidef_set_led_switch "lan4" "LAN4" "ac9531:green:lan4" "switch0" "0x10"
ucidef_set_led_wlan "wlan2g" "WLAN 2.4 GHz" "ac9531:green:wlan-2g" "phy1tpt"
;;
ac9531-020)
ucidef_set_led_netdev "wan" "WAN" "ac9531:green:wan" "eth1"
ucidef_set_led_switch "lan1" "LAN1" "ac9531:green:lan1" "switch0" "0x10"
ucidef_set_led_switch "lan2" "LAN2" "ac9531:green:lan2" "switch0" "0x08"
ucidef_set_led_switch "lan3" "LAN3" "ac9531:green:lan3" "switch0" "0x04"
ucidef_set_led_switch "lan4" "LAN4" "ac9531:green:lan4" "switch0" "0x02"
ucidef_set_led_wlan "wlan2g" "WLAN 2.4 GHz" "ac9531:green:wlan-2g" "phy1tpt"
;;
ap90q|\
cpe505n|\
cpe830|\
......@@ -372,6 +388,11 @@ epg5000)
ucidef_set_led_wlan "wlan2g" "WLAN 2.4 GHz" "$board:blue:wlan-2g" "phy1tpt"
ucidef_set_led_wlan "wlan5g" "WLAN 5 GHz" "$board:blue:wlan-5g" "phy0tpt"
;;
fritz4020)
ucidef_set_led_netdev "lan" "LAN" "$board:green:lan" "eth1"
ucidef_set_led_netdev "wan" "WAN" "$board:green:wan" "eth0"
ucidef_set_led_wlan "wlan" "WLAN" "$board:green:wlan" "phy0tpt"
;;
gl-ar300m)
ucidef_set_led_wlan "wlan" "WLAN" "$board:red:wlan" "phy0tpt"
;;
......@@ -379,6 +400,10 @@ gl-ar750)
ucidef_set_led_wlan "wlan2g" "WLAN2G" "$board:white:wlan2g" "phy1tpt"
ucidef_set_led_wlan "wlan5g" "WLAN5G" "$board:white:wlan5g" "phy0tpt"
;;
gl-ar750s)
ucidef_set_led_wlan "wlan2g" "WLAN2G" "$board:green:wlan2g" "phy1tpt"
ucidef_set_led_wlan "wlan5g" "WLAN5G" "$board:green:wlan5g" "phy0tpt"
;;
gl-mifi)
ucidef_set_led_wlan "wlan" "WLAN" "$board:green:wlan" "phy0tpt"
ucidef_set_led_netdev "wan" "WAN" "$board:green:wan" "eth0"
......@@ -413,6 +438,11 @@ hornet-ub-x2)
ucidef_set_led_wlan "wlan" "WLAN" "alfa:blue:wlan" "phy0tpt"
ucidef_set_led_usbdev "usb" "USB" "alfa:blue:usb" "1-1"
;;
koala)
ucidef_set_led_default "power" "POWER" "$board:green:power" "1"
ucidef_set_led_wlan "wlan2g" "WLAN 2.4GHz" "$board:yellow:wlan2" "phy1tpt"
ucidef_set_led_wlan "wlan5g" "WLAN 5GHz" "$board:red:wlan58" "phy0tpt"
;;
k2t)
ucidef_set_led_switch "blue" "WAN(blue)" "$board:blue:lan" "switch0" "0x10"
ucidef_set_led_default "yellow" "STATUS(yellow)" "$board:yellow:lan" "1"
......@@ -621,6 +651,7 @@ rb-962uigs-5hact2hnt)
ucidef_set_led_timer "user" "USER/SFP" "rb:green:user" "1000" "1000"
;;
rb-2011il|\
rb-2011ils|\
rb-2011l|\
rb-2011uas|\
rb-2011uas-2hnd|\
......@@ -818,7 +849,6 @@ tl-wa901nd)
;;
tl-wa901nd-v2|\
tl-wr941nd|\
tl-wr941n-v7|\
tl-wr1041n-v2)
ucidef_set_led_wlan "wlan" "WLAN" "tp-link:green:wlan" "phy0tpt"
;;
......@@ -840,6 +870,7 @@ tl-wdr4900-v2)
ucidef_set_led_wlan "wlan2g" "WLAN2G" "tp-link:blue:wlan2g" "phy0tpt"
ucidef_set_led_wlan "wlan5g" "WLAN5G" "tp-link:blue:wlan5g" "phy1tpt"
;;
tl-wdx6501-v7|\
tl-wdr6500-v2|\
tl-wr741nd)
ucidef_set_led_netdev "wan" "WAN" "tp-link:green:wan" "eth1"
......
target/linux/ar71xx/base-files/etc/board.d/02_network
浏览文件 @ bce04f59
......@@ -82,6 +82,7 @@ ar71xx_setup_interfaces()
fritz300e|\
gl-usb150|\
hiveap-121|\
koala|\
lbe-m5|\
loco-m-xw|\
mr12|\
......@@ -139,6 +140,7 @@ ar71xx_setup_interfaces()
tl-wr802n-v1|\
tl-wr802n-v2|\
tl-wr902ac-v1|\
ts-d084|\
tube2h|\
unifi|\
unifiac-lite|\
......@@ -231,6 +233,16 @@ ar71xx_setup_interfaces()
ucidef_add_switch "switch0" \
"0@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "5:wan" "6@eth1"
;;
ac9531-010)
ucidef_set_interface_lan "eth1"
ucidef_add_switch "switch0" \
"0@eth0" "1:wan:4" "2:lan:3" "3:lan:2" "4:lan:1"
;;
ac9531-020)
ucidef_set_interface_wan "eth1"
ucidef_add_switch "switch0" \
"0@eth0" "1:lan:4" "2:lan:3" "3:lan:2" "4:lan:1"
;;
ap143|\
rb-433|\
rb-433u)
......@@ -247,6 +259,7 @@ ar71xx_setup_interfaces()
;;
archer-c58-v1|\
archer-c59-v1|\
fritz4020|\
rb-450g)
ucidef_set_interfaces_lan_wan "eth1.1" "eth0"
ucidef_add_switch "switch0" \
......@@ -298,10 +311,6 @@ ar71xx_setup_interfaces()
ucidef_add_switch "switch0" \
"0@eth0" "1:lan:1" "2:lan:4" "3:lan:3" "4:lan:2"
;;
k2t)
lan_mac=$(head -c400 $(find_mtd_chardev config) | grep -o wan_mac.* | cut -d\" -f3)
wan_mac=$(macaddr_add "$lan_mac" 1)
;;
cr5000|\
dgl-5500-a1|\
dhp-1565-a1|\
......@@ -320,15 +329,17 @@ ar71xx_setup_interfaces()
rb-941-2nd)
ucidef_add_switch "switch0" \
"0@eth0" "1:lan:4" "2:lan:3" "3:lan:2" "4:wan:1"
;;
;;
db120|\
rb-2011il|\
rb-2011ils|\
rb-2011l|\
rb-2011uas|\
rb-2011uas-2hnd|\
rb-2011uias|\
rb-2011uias-2hnd)
case "$board" in
rb-2011ils|\
rb-2011uas*|\
rb-2011uias|\
rb-2011uias-2hnd)
......@@ -348,6 +359,7 @@ ar71xx_setup_interfaces()
omy-g1|\
r6100|\
smart-300|\
tl-wdx6501-v7|\
tl-wdr6500-v2|\
tl-wr940n-v4|\
tl-wr940n-v6|\
......@@ -406,7 +418,7 @@ ar71xx_setup_interfaces()
"0@eth0" "1:lan:4" "2:lan:3" "3:lan:2" "4:lan:1" "5:wan"
;;
ew-balin)
ucidef_set_interface_raw "usb2" "usb0" "static"
ucidef_set_interface "usb2" ifname "usb0" protocol "static"
ucidef_add_switch "switch0" \
"0@eth0" "5:lan:4" "4:lan:5" "3:wan"
;;
......@@ -437,6 +449,10 @@ ar71xx_setup_interfaces()
ucidef_add_switch "switch0" \
"0@eth1" "1:lan" "2:lan"
;;
gl-ar750s)
ucidef_add_switch "switch0" \
"0@eth0" "2:lan:2" "3:lan:1" "1:wan"
;;
jwap230)
ucidef_set_interfaces_lan_wan "eth0.1" "eth1.2"
ucidef_add_switch "switch0" \
......@@ -473,7 +489,7 @@ ar71xx_setup_interfaces()
;;
tellstick-znet-lite)
ucidef_set_interface_wan "eth0"
ucidef_set_interface_raw "wlan" "wlan0" "dhcp"
ucidef_set_interface "wlan" ifname "wlan0" protocol "dhcp"
;;
tl-mr3420-v2|\
tl-wr841n-v8|\
......@@ -486,7 +502,6 @@ ar71xx_setup_interfaces()
;;
archer-c7-v4|\
tl-wdr4300|\
tl-wr941n-v7|\
tl-wr1041n-v2)
ucidef_add_switch "switch0" \
"0@eth0" "2:lan:1" "3:lan:2" "4:lan:3" "5:lan:4" "1:wan"
......@@ -505,7 +520,7 @@ ar71xx_setup_interfaces()
;;
tl-wr841n-v1|\
tl-wr941nd)
ucidef_set_interface_raw "eth" "eth0"
ucidef_set_interface "eth" ifname "eth0"
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
;;
tl-wr741nd|\
......@@ -571,6 +586,10 @@ ar71xx_setup_macs()
local wan_mac=""
case $board in
k2t)
lan_mac=$(head -c400 $(find_mtd_chardev config) | grep -o wan_mac.* | cut -d\" -f3)
wan_mac=$(macaddr_add "$lan_mac" 1)
;;
dgl-5500-a1|\
dir-825-c1)
wan_mac=$(mtd_get_mac_ascii nvram "wan_mac")
......
target/linux/ar71xx/base-files/etc/board.d/03_gpio_switches
浏览文件 @ bce04f59
......@@ -24,7 +24,7 @@ nanostation-m-xw)
;;
rb-912uag-2hpnd|\
rb-912uag-5hpnd)
ucidef_add_gpio_switch "usb_power_switch" "USB Power Switch" "52" "1"
ucidef_add_gpio_switch "usb_power_switch" "USB Power Switch" "61" "1"
;;
rb-750up-r2|\
rb-951ui-2nd|\
......
target/linux/ar71xx/base-files/etc/diag.sh
浏览文件 @ bce04f59
......@@ -57,6 +57,10 @@ get_status_led() {
ap147-010)
status_led="ap147:green:status"
;;
ac9531-020|\
ac9531-010)
status_led="ac9531:green:status"
;;
ap135-020)
status_led="ap135:green:status"
;;
......@@ -67,6 +71,7 @@ get_status_led() {
archer-c60-v2|\
archer-c7-v4|\
fritz300e|\
fritz4020|\
gl-usb150|\
mr12|\
mr16|\
......@@ -208,6 +213,7 @@ get_status_led() {
;;
e600g-v2|\
oolite-v5.2-dev|\
ts-d084|\
wifi-pineapple-nano)
status_led="$board:blue:system"
;;
......@@ -259,6 +265,9 @@ get_status_led() {
jwap230)
status_led="$board:green:led1"
;;
koala)
status_led="$board:blue:sys"
;;
k2t)
status_led="$board:red:lan"
;;
......@@ -338,6 +347,7 @@ get_status_led() {
status_led="$board:green:wan"
;;
rb-2011il|\
rb-2011ils|\
rb-2011l|\
rb-2011uas|\
rb-2011uas-2hnd)
......
target/linux/ar71xx/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom
浏览文件 @ bce04f59
......@@ -75,6 +75,9 @@ case "$FIRMWARE" in
ath9k_eeprom_extract "art" 4096 2048
ath9k_patch_firmware_mac $(macaddr_add $(mtd_get_mac_binary art 0) +1)
;;
fritz4020)
ath9k_eeprom_extract_reverse "urlader" 5441 1088
;;
k2t)
ath9k_eeprom_extract "art" 4096 2048
ath9k_patch_firmware_mac $(macaddr_add $(head -c400 $(find_mtd_chardev config) | grep -o wan_mac.* | cut -d\" -f3) +3)
......
target/linux/ar71xx/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
浏览文件 @ bce04f59
......@@ -69,6 +69,13 @@ case "$FIRMWARE" in
ath10kcal_extract "art" 20480 2116
ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) -1)
;;
ap147-010|\
ac9531-010|\
ac9531-020|\
ap152)
ath10kcal_extract "art" 20480 2116
ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) -2)
;;
cf-e355ac-v1|\
cf-e380ac-v1|\
cf-e380ac-v2|\
......@@ -99,11 +106,16 @@ case "$FIRMWARE" in
ath10kcal_extract "caldata" 20480 2116
ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) +1)
;;
gl-ar750s|\
gl-ar750|\
tl-wpa8630)
ath10kcal_extract "art" 20480 2116
ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) +1)
;;
koala)
ath10kcal_extract "art" 20480 2116
ath10kcal_patch_mac $(macaddr_add $(mtd_get_mac_binary art 12) +0)
;;
mc-mac1200r)
ath10kcal_extract "art" 20480 2116
ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth1/address) -1)
......@@ -160,12 +172,14 @@ case "$FIRMWARE" in
;;
"ath10k/pre-cal-pci-0000:00:00.0.bin")
case $board in
tl-wdx6501-v7|\
archer-c58-v1|\
archer-c59-v1|\
archer-c60-v1|\
archer-c60-v2|\
cf-e355ac-v2|\
cf-e375ac)
cf-e375ac|\
k2t)
ath10kcal_extract "art" 20480 12064
ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
/lib/firmware/ath10k/QCA9888/hw2.0/board.bin
......@@ -173,12 +187,6 @@ case "$FIRMWARE" in
cf-e385ac)
ath10kcal_extract "art" 20480 12064
;;
k2t)
ath10kcal_extract "art" 20480 12064
ath10kcal_patch_mac $(macaddr_add $(head -c400 $(find_mtd_chardev config) | grep -o wan_mac.* | cut -d\" -f3) +2)
ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
/lib/firmware/ath10k/QCA9888/hw2.0/board.bin
;;
esac
;;
*)
......
target/linux/ar71xx/base-files/etc/init.d/ar71xx_clock 已删除 100755 → 0
浏览文件 @ 01c2f5af
#!/bin/sh /etc/rc.common
# Copyright (C) 2017 lean <coolsnowwolf@gmail.com>
START=99
start()
{
a=$(cat /tmp/sysinfo/model)
b=$(dmesg | awk -F 'CPU:|MHz' '/Clocks:/{print $2+0}')
c=${a}" CPU:"${b}Mhz
echo -n $c > /tmp/sysinfo/model
}
target/linux/ar71xx/base-files/etc/uci-defaults/03_network-switchX-migration
浏览文件 @ bce04f59
......@@ -86,6 +86,7 @@ rb-450)
db120|\
rb-2011il|\
rb-2011ils|\
rb-2011l|\
rb-2011uas-2hnd)
migrate_switch_name "eth0" "switch0"
......
target/linux/ar71xx/base-files/lib/ar71xx.sh
浏览文件 @ bce04f59
......@@ -287,9 +287,6 @@ tplink_board_detect() {
"120000"*)
model="MERCURY MAC1200R"
;;
"204100"*)
model="TP-Link TL-WR2041N"
;;
"254300"*)
model="TP-Link TL-WR2543N/ND"
;;
......@@ -336,6 +333,9 @@ tplink_board_detect() {
"640000"*)
model="TP-Link TL-MR6400"
;;
"65010007")
model="TP-Link TL-WDX6501"
;;
"65000002")
model="TP-Link TL-WDR6500"
;;
......@@ -458,6 +458,12 @@ ar71xx_board_detect() {
*"AP147-010 reference board")
name="ap147-010"
;;
*"AC9531-010 reference board")
name="ac9531-010"
;;
*"AC9531-020 reference board")
name="ac9531-020"
;;
*"AP152 reference board")
name="ap152"
;;
......@@ -712,6 +718,9 @@ ar71xx_board_detect() {
*"eTactica EG-200")
name="rme-eg200"
;;
*"FRITZ!Box 4020")
name="fritz4020"
;;
*"FRITZ!WLAN Repeater 300E")
name="fritz300e"
;;
......@@ -727,6 +736,9 @@ ar71xx_board_detect() {
*"GL-AR750")
name="gl-ar750"
;;
*"GL-AR750S")
name="gl-ar750s"
;;
*"GL-CONNECT INET v1")
name="gl-inet"
......@@ -765,9 +777,12 @@ ar71xx_board_detect() {
*"JWAP230")
name="jwap230"
;;
*"Koala")
name="koala"
;;
*"K2T A1/A2/A3 board")
#fixup: update the machine name
machine=$(echo -n "$machine" | sed "s,A1/A2/A3,$(head -c400 /dev/mtd1 | grep -o hw_ver.* | cut -d\" -f3),")
machine=$(echo -n "$machine" | sed "s,A1/A2/A3,$(head -c400 $(find_mtd_chardev config) | grep -o hw_ver.* | cut -d\" -f3),")
name="k2t"
;;
*"LAN Turtle")
......@@ -952,6 +967,9 @@ ar71xx_board_detect() {
*"RouterBOARD 2011iL")
name="rb-2011il"
;;
*"RouterBOARD 2011iLS")
name="rb-2011ils"
;;
*"RouterBOARD 2011L")
name="rb-2011l"
;;
......@@ -1225,6 +1243,9 @@ ar71xx_board_detect() {
*"TL-WDR4900 v2")
name="tl-wdr4900-v2"
;;
*"TL-WDX6501 v7")
name="tl-wdx6501-v7"
;;
*"TL-WDR6500 v2")
name="tl-wdr6500-v2"
;;
......@@ -1246,12 +1267,6 @@ ar71xx_board_detect() {
*"TL-WR1043ND v4")
name="tl-wr1043nd-v4"
;;
*"TL-WR2041N v1")
name="tl-wr2041n-v1"
;;
*"TL-WR2041N v2")
name="tl-wr2041n-v2"
;;
*"TL-WR2543N"*)
name="tl-wr2543n"
;;
......@@ -1327,15 +1342,15 @@ ar71xx_board_detect() {
*"TL-WR941N/ND v6")
name="tl-wr941nd-v6"
;;
*"TL-WR941N v7")
name="tl-wr941n-v7"
;;
*"TL-WR941ND")
name="tl-wr941nd"
;;
*"TL-WR942N v1")
name="tl-wr942n-v1"
;;
*"TS-D084")
name="ts-d084"
;;
*"Tube2H")
name="tube2h"
;;
......
target/linux/ar71xx/base-files/lib/preinit/05_set_preinit_iface_ar71xx
浏览文件 @ bce04f59
......@@ -12,6 +12,8 @@ set_preinit_iface() {
alfa-nx|\
ap135-020|\
ap136-020|\
ac9531-010 |\
ac9531-020 |\
ap147-010|\
archer-c5|\
archer-c7|\
......
target/linux/ar71xx/base-files/lib/upgrade/platform.sh
浏览文件 @ bce04f59
......@@ -260,6 +260,7 @@ platform_check_image() {
gl-ar300m|\
gl-ar300|\
gl-ar750|\
gl-ar750s|\
gl-domino|\
gl-mifi|\
gl-usb150|\
......@@ -333,6 +334,9 @@ platform_check_image() {
ap136-010|\
ap136-020|\
ap147-010|\
ac9531-010|\
ac9531-020|\
ap143|\
ap152|\
ap91-5g|\
ap96|\
......@@ -451,6 +455,7 @@ platform_check_image() {
tl-wdr3500|\
tl-wdr4300|\
tl-wdr4900-v2|\
tl-wdx6501-v7|\
tl-wdr6500-v2|\
tl-wpa8630|\
tl-wr1041n-v2|\
......@@ -483,11 +488,12 @@ platform_check_image() {
tl-wr941nd|\
tl-wr941nd-v5|\
tl-wr941nd-v6|\
tl-wr941n-v7|\
ts-d084|\
wifi-pineapple-nano)
local magic_ver="0100"
case "$board" in
tl-wdx6501-v7|\
tl-wdr6500-v2)
magic_ver="0200"
;;
......@@ -551,6 +557,7 @@ platform_check_image() {
rb-951ui-2hnd|\
rb-2011l|\
rb-2011il|\
rb-2011ils|\
rb-2011uas|\
rb-2011uas-2hnd|\
rb-2011uias|\
......@@ -694,6 +701,8 @@ platform_check_image() {
;;
# these boards use metadata images
fritz300e|\
fritz4020|\
koala|\
rb-750-r2|\
rb-750p-pbr2|\
rb-750up-r2|\
......@@ -852,6 +861,7 @@ platform_do_upgrade() {
rb-951g-2hnd|\
rb-951ui-2hnd|\
rb-2011il|\
rb-2011ils|\
rb-2011l|\
rb-2011uas|\
rb-2011uas-2hnd|\
......
target/linux/ar71xx/config-4.14 0 → 100644
浏览文件 @ bce04f59
CONFIG_AG71XX=y
CONFIG_AG71XX_AR8216_SUPPORT=y
# CONFIG_AG71XX_DEBUG is not set
# CONFIG_AG71XX_DEBUG_FS is not set
CONFIG_AR8216_PHY=y
CONFIG_AR8216_PHY_LEDS=y
CONFIG_ARCH_BINFMT_ELF_STATE=y
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_ARCH_DISCARD_MEMBLOCK=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set
CONFIG_ARCH_HAS_RESET_CONTROLLER=y
# CONFIG_ARCH_HAS_SG_CHAIN is not set
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_AT803X_PHY=y
CONFIG_ATH79=y
# CONFIG_ATH79_DEV_AP9X_PCI is not set
# CONFIG_ATH79_DEV_DSA is not set
# CONFIG_ATH79_DEV_ETH is not set
# CONFIG_ATH79_DEV_GPIO_BUTTONS is not set
# CONFIG_ATH79_DEV_LEDS_GPIO is not set
# CONFIG_ATH79_DEV_M25P80 is not set
# CONFIG_ATH79_DEV_SPI is not set
# CONFIG_ATH79_DEV_USB is not set
# CONFIG_ATH79_MACH_A60 is not set
# CONFIG_ATH79_MACH_ALFA_AP120C is not set
# CONFIG_ATH79_MACH_ALFA_AP96 is not set
# CONFIG_ATH79_MACH_ALFA_NX is not set
# CONFIG_ATH79_MACH_ALL0258N is not set
# CONFIG_ATH79_MACH_ALL0315N is not set
# CONFIG_ATH79_MACH_ANTMINER_S1 is not set
# CONFIG_ATH79_MACH_ANTMINER_S3 is not set
# CONFIG_ATH79_MACH_ANTROUTER_R1 is not set
# CONFIG_ATH79_MACH_AP121 is not set
# CONFIG_ATH79_MACH_AP121F is not set
# CONFIG_ATH79_MACH_AP132 is not set
# CONFIG_ATH79_MACH_AP136 is not set
# CONFIG_ATH79_MACH_AP143 is not set
# CONFIG_ATH79_MACH_AP147 is not set
# CONFIG_ATH79_MACH_AP152 is not set
# CONFIG_ATH79_MACH_AP531B0 is not set
# CONFIG_ATH79_MACH_AP81 is not set
# CONFIG_ATH79_MACH_AP90Q is not set
# CONFIG_ATH79_MACH_AP91_5G is not set
# CONFIG_ATH79_MACH_AP96 is not set
# CONFIG_ATH79_MACH_ARCHER_C25_V1 is not set
# CONFIG_ATH79_MACH_ARCHER_C58_V1 is not set
# CONFIG_ATH79_MACH_ARCHER_C59_V1 is not set
# CONFIG_ATH79_MACH_ARCHER_C60_V1 is not set
# CONFIG_ATH79_MACH_ARCHER_C60_V2 is not set
# CONFIG_ATH79_MACH_ARCHER_C7 is not set
# CONFIG_ATH79_MACH_ARDUINO_YUN is not set
# CONFIG_ATH79_MACH_AW_NR580 is not set
# CONFIG_ATH79_MACH_BHR_4GRV2 is not set
# CONFIG_ATH79_MACH_BHU_BXU2000N2_A is not set
# CONFIG_ATH79_MACH_BSB is not set
# CONFIG_ATH79_MACH_C55 is not set
# CONFIG_ATH79_MACH_C60 is not set
# CONFIG_ATH79_MACH_CAP324 is not set
# CONFIG_ATH79_MACH_CAP4200AG is not set
# CONFIG_ATH79_MACH_CARAMBOLA2 is not set
# CONFIG_ATH79_MACH_CF_E316N_V2 is not set
# CONFIG_ATH79_MACH_CF_E320N_V2 is not set
# CONFIG_ATH79_MACH_CF_E355AC is not set
# CONFIG_ATH79_MACH_CF_E375AC is not set
# CONFIG_ATH79_MACH_CF_E380AC_V1 is not set
# CONFIG_ATH79_MACH_CF_E380AC_V2 is not set
# CONFIG_ATH79_MACH_CF_E520N is not set
# CONFIG_ATH79_MACH_CF_E530N is not set
# CONFIG_ATH79_MACH_CPE505N is not set
# CONFIG_ATH79_MACH_CPE510 is not set
# CONFIG_ATH79_MACH_CPE830 is not set
# CONFIG_ATH79_MACH_CPE870 is not set
# CONFIG_ATH79_MACH_CR3000 is not set
# CONFIG_ATH79_MACH_CR5000 is not set
# CONFIG_ATH79_MACH_DAP_1330_A1 is not set
# CONFIG_ATH79_MACH_DAP_2695_A1 is not set
# CONFIG_ATH79_MACH_DB120 is not set
# CONFIG_ATH79_MACH_DGL_5500_A1 is not set
# CONFIG_ATH79_MACH_DHP_1565_A1 is not set
# CONFIG_ATH79_MACH_DIR_505_A1 is not set
# CONFIG_ATH79_MACH_DIR_600_A1 is not set
# CONFIG_ATH79_MACH_DIR_615_C1 is not set
# CONFIG_ATH79_MACH_DIR_615_I1 is not set
# CONFIG_ATH79_MACH_DIR_825_B1 is not set
# CONFIG_ATH79_MACH_DIR_825_C1 is not set
# CONFIG_ATH79_MACH_DIR_869_A1 is not set
# CONFIG_ATH79_MACH_DLAN_HOTSPOT is not set
# CONFIG_ATH79_MACH_DLAN_PRO_1200_AC is not set
# CONFIG_ATH79_MACH_DLAN_PRO_500_WP is not set
# CONFIG_ATH79_MACH_DOMYWIFI_DW33D is not set
# CONFIG_ATH79_MACH_DR342 is not set
# CONFIG_ATH79_MACH_DR344 is not set
# CONFIG_ATH79_MACH_DR531 is not set
# CONFIG_ATH79_MACH_DRAGINO2 is not set
# CONFIG_ATH79_MACH_E1700AC_V2 is not set
# CONFIG_ATH79_MACH_E2100L is not set
# CONFIG_ATH79_MACH_E600G_V2 is not set
# CONFIG_ATH79_MACH_EAP120 is not set
# CONFIG_ATH79_MACH_EAP300V2 is not set
# CONFIG_ATH79_MACH_EAP7660D is not set
# CONFIG_ATH79_MACH_EL_M150 is not set
# CONFIG_ATH79_MACH_EL_MINI is not set
# CONFIG_ATH79_MACH_ENS202EXT is not set
# CONFIG_ATH79_MACH_EPG5000 is not set
# CONFIG_ATH79_MACH_ESR1750 is not set
# CONFIG_ATH79_MACH_ESR900 is not set
# CONFIG_ATH79_MACH_EW_BALIN is not set
# CONFIG_ATH79_MACH_EW_DORIN is not set
# CONFIG_ATH79_MACH_F9K1115V2 is not set
# CONFIG_ATH79_MACH_FRITZ300E is not set
# CONFIG_ATH79_MACH_FRITZ4020 is not set
# CONFIG_ATH79_MACH_GL_AR150 is not set
# CONFIG_ATH79_MACH_GL_AR300 is not set
# CONFIG_ATH79_MACH_GL_AR300M is not set
# CONFIG_ATH79_MACH_GL_AR750 is not set
# CONFIG_ATH79_MACH_GL_AR750S is not set
# CONFIG_ATH79_MACH_GL_DOMINO is not set
# CONFIG_ATH79_MACH_GL_INET is not set
# CONFIG_ATH79_MACH_GL_MIFI is not set
# CONFIG_ATH79_MACH_GL_USB150 is not set
# CONFIG_ATH79_MACH_GS_OOLITE_V1 is not set
# CONFIG_ATH79_MACH_GS_OOLITE_V5_2 is not set
# CONFIG_ATH79_MACH_HIVEAP_121 is not set
# CONFIG_ATH79_MACH_HIWIFI_HC6361 is not set
# CONFIG_ATH79_MACH_HORNET_UB is not set
# CONFIG_ATH79_MACH_JA76PF is not set
# CONFIG_ATH79_MACH_JWAP003 is not set
# CONFIG_ATH79_MACH_JWAP230 is not set
# CONFIG_ATH79_MACH_KOALA is not set
# CONFIG_ATH79_MACH_K2T is not se
# CONFIG_ATH79_MACH_LAN_TURTLE is not set
# CONFIG_ATH79_MACH_LIMA is not set
# CONFIG_ATH79_MACH_MC_MAC1200R is not set
# CONFIG_ATH79_MACH_MR12 is not set
# CONFIG_ATH79_MACH_MR16 is not set
# CONFIG_ATH79_MACH_MR1750 is not set
# CONFIG_ATH79_MACH_MR18 is not set
# CONFIG_ATH79_MACH_MR600 is not set
# CONFIG_ATH79_MACH_MR900 is not set
# CONFIG_ATH79_MACH_MYNET_N600 is not set
# CONFIG_ATH79_MACH_MYNET_N750 is not set
# CONFIG_ATH79_MACH_MYNET_REXT is not set
# CONFIG_ATH79_MACH_MZK_W04NU is not set
# CONFIG_ATH79_MACH_MZK_W300NH is not set
# CONFIG_ATH79_MACH_N5Q is not set
# CONFIG_ATH79_MACH_NBG460N is not set
# CONFIG_ATH79_MACH_NBG6716 is not set
# CONFIG_ATH79_MACH_OM2P is not set
# CONFIG_ATH79_MACH_OM5P is not set
# CONFIG_ATH79_MACH_OM5P_AC is not set
# CONFIG_ATH79_MACH_OM5P_ACv2 is not set
# CONFIG_ATH79_MACH_OMY_G1 is not set
# CONFIG_ATH79_MACH_OMY_X1 is not set
# CONFIG_ATH79_MACH_ONION_OMEGA is not set
# CONFIG_ATH79_MACH_PB42 is not set
# CONFIG_ATH79_MACH_PB44 is not set
# CONFIG_ATH79_MACH_PQI_AIR_PEN is not set
# CONFIG_ATH79_MACH_QIHOO_C301 is not set
# CONFIG_ATH79_MACH_R36A is not set
# CONFIG_ATH79_MACH_R602N is not set
# CONFIG_ATH79_MACH_R6100 is not set
# CONFIG_ATH79_MACH_RAMBUTAN is not set
# CONFIG_ATH79_MACH_RB2011 is not set
# CONFIG_ATH79_MACH_RB4XX is not set
# CONFIG_ATH79_MACH_RB750 is not set
# CONFIG_ATH79_MACH_RB91X is not set
# CONFIG_ATH79_MACH_RB922 is not set
# CONFIG_ATH79_MACH_RB95X is not set
# CONFIG_ATH79_MACH_RBSPI is not set
# CONFIG_ATH79_MACH_RBSXTLITE is not set
# CONFIG_ATH79_MACH_RE355 is not set
# CONFIG_ATH79_MACH_RE450 is not set
# CONFIG_ATH79_MACH_RME_EG200 is not set
# CONFIG_ATH79_MACH_RUT9XX is not set
# CONFIG_ATH79_MACH_RW2458N is not set
# CONFIG_ATH79_MACH_SC1750 is not set
# CONFIG_ATH79_MACH_SC300M is not set
# CONFIG_ATH79_MACH_SC450 is not set
# CONFIG_ATH79_MACH_SMART_300 is not set
# CONFIG_ATH79_MACH_SOM9331 is not set
# CONFIG_ATH79_MACH_SR3200 is not set
# CONFIG_ATH79_MACH_T830 is not set
# CONFIG_ATH79_MACH_TELLSTICK_ZNET_LITE is not set
# CONFIG_ATH79_MACH_TEW_632BRP is not set
# CONFIG_ATH79_MACH_TEW_673GRU is not set
# CONFIG_ATH79_MACH_TEW_712BR is not set
# CONFIG_ATH79_MACH_TEW_732BR is not set
# CONFIG_ATH79_MACH_TEW_823DRU is not set
# CONFIG_ATH79_MACH_TL_MR11U is not set
# CONFIG_ATH79_MACH_TL_MR13U is not set
# CONFIG_ATH79_MACH_TL_MR3020 is not set
# CONFIG_ATH79_MACH_TL_MR3X20 is not set
# CONFIG_ATH79_MACH_TL_MR6400 is not set
# CONFIG_ATH79_MACH_TL_WA701ND_V2 is not set
# CONFIG_ATH79_MACH_TL_WA7210N_V2 is not set
# CONFIG_ATH79_MACH_TL_WA801ND_V3 is not set
# CONFIG_ATH79_MACH_TL_WA830RE_V2 is not set
# CONFIG_ATH79_MACH_TL_WA850RE_V2 is not set
# CONFIG_ATH79_MACH_TL_WA855RE_V1 is not set
# CONFIG_ATH79_MACH_TL_WA901ND is not set
# CONFIG_ATH79_MACH_TL_WA901ND_V2 is not set
# CONFIG_ATH79_MACH_TL_WA901ND_V4 is not set
# CONFIG_ATH79_MACH_TL_WAX50RE is not set
# CONFIG_ATH79_MACH_TL_WDR3320_V2 is not set
# CONFIG_ATH79_MACH_TL_WDR3500 is not set
# CONFIG_ATH79_MACH_TL_WDR4300 is not set
# CONFIG_ATH79_MACH_TL_WDR6500_V2 is not set
# CONFIG_ATH79_MACH_TL_WPA8630 is not set
# CONFIG_ATH79_MACH_TL_WR1041N_V2 is not set
# CONFIG_ATH79_MACH_TL_WR1043ND is not set
# CONFIG_ATH79_MACH_TL_WR1043ND_V2 is not set
# CONFIG_ATH79_MACH_TL_WR1043ND_V4 is not set
# CONFIG_ATH79_MACH_TL_WR1043N_V5 is not set
# CONFIG_ATH79_MACH_TL_WR2543N is not set
# CONFIG_ATH79_MACH_TL_WR703N is not set
# CONFIG_ATH79_MACH_TL_WR720N_V3 is not set
# CONFIG_ATH79_MACH_TL_WR741ND is not set
# CONFIG_ATH79_MACH_TL_WR741ND_V4 is not set
# CONFIG_ATH79_MACH_TL_WR802N_V1 is not set
# CONFIG_ATH79_MACH_TL_WR802N_V2 is not set
# CONFIG_ATH79_MACH_TL_WR810N is not set
# CONFIG_ATH79_MACH_TL_WR810N_V2 is not set
# CONFIG_ATH79_MACH_TL_WR840N_V2 is not set
# CONFIG_ATH79_MACH_TL_WR841N_V1 is not set
# CONFIG_ATH79_MACH_TL_WR841N_V8 is not set
# CONFIG_ATH79_MACH_TL_WR841N_V9 is not set
# CONFIG_ATH79_MACH_TL_WR902AC_V1 is not set
# CONFIG_ATH79_MACH_TL_WR940N_V4 is not set
# CONFIG_ATH79_MACH_TL_WR941ND is not set
# CONFIG_ATH79_MACH_TL_WR941ND_V6 is not set
# CONFIG_ATH79_MACH_TL_WR942N_V1 is not set
# CONFIG_ATH79_MACH_TS_D084 is not set
# CONFIG_ATH79_MACH_TUBE2H is not set
# CONFIG_ATH79_MACH_UBNT is not set
# CONFIG_ATH79_MACH_UBNT_UNIFIAC is not set
# CONFIG_ATH79_MACH_UBNT_XM is not set
# CONFIG_ATH79_MACH_WAM250 is not set
# CONFIG_ATH79_MACH_WEIO is not set
# CONFIG_ATH79_MACH_WHR_HP_G300N is not set
# CONFIG_ATH79_MACH_WI2A_AC200I is not set
# CONFIG_ATH79_MACH_WIFI_PINEAPPLE_NANO is not set
# CONFIG_ATH79_MACH_WLAE_AG300N is not set
# CONFIG_ATH79_MACH_WLR8100 is not set
# CONFIG_ATH79_MACH_WNDAP360 is not set
# CONFIG_ATH79_MACH_WNDR3700 is not set
# CONFIG_ATH79_MACH_WNDR4300 is not set
# CONFIG_ATH79_MACH_WNR2000 is not set
# CONFIG_ATH79_MACH_WNR2000_V3 is not set
# CONFIG_ATH79_MACH_WNR2000_V4 is not set
# CONFIG_ATH79_MACH_WNR2200 is not set
# CONFIG_ATH79_MACH_WP543 is not set
# CONFIG_ATH79_MACH_WPE72 is not set
# CONFIG_ATH79_MACH_WPJ342 is not set
# CONFIG_ATH79_MACH_WPJ344 is not set
# CONFIG_ATH79_MACH_WPJ531 is not set
# CONFIG_ATH79_MACH_WPJ558 is not set
# CONFIG_ATH79_MACH_WPJ563 is not set
# CONFIG_ATH79_MACH_WRT160NL is not set
# CONFIG_ATH79_MACH_WRT400N is not set
# CONFIG_ATH79_MACH_WRTNODE2Q is not set
# CONFIG_ATH79_MACH_WZR_450HP2 is not set
# CONFIG_ATH79_MACH_WZR_HP_AG300H is not set
# CONFIG_ATH79_MACH_WZR_HP_G300NH is not set
# CONFIG_ATH79_MACH_WZR_HP_G300NH2 is not set
# CONFIG_ATH79_MACH_WZR_HP_G450H is not set
# CONFIG_ATH79_MACH_XD3200 is not set
# CONFIG_ATH79_MACH_Z1 is not set
# CONFIG_ATH79_MACH_ZBT_WE1526 is not set
# CONFIG_ATH79_MACH_ZCN_1523H is not set
# CONFIG_ATH79_NVRAM is not set
# CONFIG_ATH79_PCI_ATH9K_FIXUP is not set
# CONFIG_ATH79_ROUTERBOOT is not set
CONFIG_ATH79_WDT=y
CONFIG_CEVT_R4K=y
CONFIG_CLKDEV_LOOKUP=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMDLINE="rootfstype=squashfs noinitrd"
CONFIG_CMDLINE_BOOL=y
# CONFIG_CMDLINE_OVERRIDE is not set
CONFIG_COMMON_CLK=y
# CONFIG_COMMON_CLK_BOSTON is not set
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_CPU_GENERIC_DUMP_TLB=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_RIXI=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R2=y
CONFIG_CPU_MIPSR2=y
CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
CONFIG_CPU_R4K_CACHE_TLB=y
CONFIG_CPU_R4K_FPU=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CPU_SUPPORTS_MSA=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_CSRC_R4K=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_EARLY_PRINTK=y
CONFIG_ETHERNET_PACKET_MANGLE=y
CONFIG_FIXED_PHY=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_IO=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIOLIB=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_74X164=y
CONFIG_GPIO_ATH79=y
CONFIG_GPIO_GENERIC=y
# CONFIG_GPIO_LATCH is not set
CONFIG_GPIO_NXP_74HC153=y
CONFIG_GPIO_PCF857X=y
CONFIG_GPIO_SYSFS=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
# CONFIG_HAVE_ARCH_BITREVERSE is not set
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
CONFIG_HAVE_CBPF_JIT=y
CONFIG_HAVE_CC_STACKPROTECTOR=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_CLK_PREPARE=y
CONFIG_HAVE_CONTEXT_TRACKING=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
CONFIG_HAVE_DMA_API_DEBUG=y
CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_KVM=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_HAVE_NET_DSA=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_ALGOBIT=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_GPIO=y
CONFIG_IMAGE_CMDLINE_HACK=y
CONFIG_INITRAMFS_ROOT_GID=0
CONFIG_INITRAMFS_ROOT_UID=0
CONFIG_INITRAMFS_SOURCE="../../root"
CONFIG_INTEL_XWAY_PHY=y
CONFIG_IP17XX_PHY=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
CONFIG_LEDS_GPIO=y
CONFIG_MARVELL_PHY=y
CONFIG_MDIO_BITBANG=y
CONFIG_MDIO_BOARDINFO=y
CONFIG_MDIO_GPIO=y
CONFIG_MICREL_PHY=y
CONFIG_MIPS=y
CONFIG_MIPS_ASID_BITS=8
CONFIG_MIPS_ASID_SHIFT=0
CONFIG_MIPS_CLOCK_VSYSCALL=y
# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set
CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y
# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_MACHINE=y
CONFIG_MIPS_SPRAM=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_CFI_I2 is not set
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CYBERTAN_PARTS=y
CONFIG_MTD_M25P80=y
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
CONFIG_MTD_MYLOADER_PARTS=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPLIT_EVA_FW=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_LZMA_FW=y
CONFIG_MTD_SPLIT_MINOR_FW=y
CONFIG_MTD_SPLIT_SEAMA_FW=y
CONFIG_MTD_SPLIT_TPLINK_FW=y
CONFIG_MTD_SPLIT_UIMAGE_FW=y
CONFIG_MTD_SPLIT_WRGG_FW=y
CONFIG_MTD_TPLINK_PARTS=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_MV88E6060=y
CONFIG_NET_DSA_MV88E6063=y
CONFIG_NET_DSA_TAG_TRAILER=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
# CONFIG_NO_IOPORT_MAP is not set
# CONFIG_OF is not set
# CONFIG_PCI_AR724X is not set
CONFIG_PCI_DRIVERS_LEGACY=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_RATIONAL=y
# CONFIG_RCU_STALL_COMMON is not set
CONFIG_RTL8306_PHY=y
CONFIG_RTL8366RB_PHY=y
CONFIG_RTL8366S_PHY=y
CONFIG_RTL8366_SMI=y
CONFIG_RTL8367_PHY=y
# CONFIG_SCHED_INFO is not set
# CONFIG_SCSI_DMA is not set
# CONFIG_SERIAL_8250_FSL is not set
CONFIG_SERIAL_8250_NR_UARTS=1
CONFIG_SERIAL_8250_RUNTIME_UARTS=1
# CONFIG_SOC_AR71XX is not set
# CONFIG_SOC_AR724X is not set
# CONFIG_SOC_AR913X is not set
# CONFIG_SOC_AR933X is not set
# CONFIG_SOC_AR934X is not set
# CONFIG_SOC_QCA953X is not set
# CONFIG_SOC_QCA955X is not set
# CONFIG_SOC_QCA956X is not set
CONFIG_SPI=y
CONFIG_SPI_ATH79=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_MASTER=y
# CONFIG_SPI_RB4XX is not set
# CONFIG_SPI_VSC7385 is not set
CONFIG_SRCU=y
CONFIG_SWCONFIG=y
CONFIG_SWCONFIG_LEDS=y
CONFIG_SWPHY=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_MIPS16=y
CONFIG_SYS_SUPPORTS_ZBOOT=y
CONFIG_SYS_SUPPORTS_ZBOOT_UART_PROM=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_USB_SUPPORT=y
target/linux/ar71xx/config-4.9
浏览文件 @ bce04f59
......@@ -29,6 +29,7 @@ CONFIG_ATH79=y
# CONFIG_ATH79_DEV_SPI is not set
# CONFIG_ATH79_DEV_USB is not set
# CONFIG_ATH79_MACH_A60 is not set
# CONFIG_ATH79_MACH_AC9531 is not set
# CONFIG_ATH79_MACH_ALFA_AP120C is not set
# CONFIG_ATH79_MACH_ALFA_AP96 is not set
# CONFIG_ATH79_MACH_ALFA_NX is not set
......@@ -115,10 +116,12 @@ CONFIG_ATH79=y
# CONFIG_ATH79_MACH_EW_DORIN is not set
# CONFIG_ATH79_MACH_F9K1115V2 is not set
# CONFIG_ATH79_MACH_FRITZ300E is not set
# CONFIG_ATH79_MACH_FRITZ4020 is not set
# CONFIG_ATH79_MACH_GL_AR150 is not set
# CONFIG_ATH79_MACH_GL_AR300 is not set
# CONFIG_ATH79_MACH_GL_AR300M is not set
# CONFIG_ATH79_MACH_GL_AR750 is not set
# CONFIG_ATH79_MACH_GL_AR750S is not set
# CONFIG_ATH79_MACH_GL_DOMINO is not set
# CONFIG_ATH79_MACH_GL_INET is not set
# CONFIG_ATH79_MACH_GL_MIFI is not set
......@@ -131,6 +134,7 @@ CONFIG_ATH79=y
# CONFIG_ATH79_MACH_JA76PF is not set
# CONFIG_ATH79_MACH_JWAP003 is not set
# CONFIG_ATH79_MACH_JWAP230 is not set
# CONFIG_ATH79_MACH_KOALA is not set
# CONFIG_ATH79_MACH_K2T is not set
# CONFIG_ATH79_MACH_LAN_TURTLE is not set
# CONFIG_ATH79_MACH_LIMA is not set
......@@ -209,6 +213,7 @@ CONFIG_ATH79=y
# CONFIG_ATH79_MACH_TL_WDR3500 is not set
# CONFIG_ATH79_MACH_TL_WDR4300 is not set
# CONFIG_ATH79_MACH_TL_WDR6500_V2 is not set
# CONFIG_ATH79_MACH_TL_WDX6501_V7 is not set
# CONFIG_ATH79_MACH_TL_WPA8630 is not set
# CONFIG_ATH79_MACH_TL_WR1041N_V2 is not set
# CONFIG_ATH79_MACH_TL_WR1043ND is not set
......@@ -232,8 +237,8 @@ CONFIG_ATH79=y
# CONFIG_ATH79_MACH_TL_WR940N_V4 is not set
# CONFIG_ATH79_MACH_TL_WR941ND is not set
# CONFIG_ATH79_MACH_TL_WR941ND_V6 is not set
# CONFIG_ATH79_MACH_TL_WR941N_V7 is not set
# CONFIG_ATH79_MACH_TL_WR942N_V1 is not set
# CONFIG_ATH79_MACH_TS_D084 is not set
# CONFIG_ATH79_MACH_TUBE2H is not set
# CONFIG_ATH79_MACH_UBNT is not set
# CONFIG_ATH79_MACH_UBNT_UNIFIAC is not set
......@@ -390,7 +395,6 @@ CONFIG_MIPS_ASID_SHIFT=0
CONFIG_MIPS_CLOCK_VSYSCALL=y
# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set
CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y
CONFIG_MIPS_FPU_EMULATOR=y
# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
CONFIG_MIPS_MACHINE=y
......@@ -446,7 +450,6 @@ CONFIG_RTL8367_PHY=y
# CONFIG_SERIAL_8250_FSL is not set
CONFIG_SERIAL_8250_NR_UARTS=1
CONFIG_SERIAL_8250_RUNTIME_UARTS=1
# CONFIG_SHORTCUT_FE is not set
# CONFIG_SOC_AR71XX is not set
# CONFIG_SOC_AR724X is not set
# CONFIG_SOC_AR913X is not set
......
target/linux/ar71xx/files/arch/mips/ath79/Kconfig.openwrt → target/linux/ar71xx/files-4.14/arch/mips/ath79/Kconfig.openwrt
浏览文件 @ bce04f59
......@@ -814,6 +814,17 @@ config ATH79_MACH_GL_AR750
select ATH79_DEV_USB
select ATH79_DEV_WMAC
config ATH79_MACH_GL_AR750S
bool "GL.iNet GL-AR750S support"
select SOC_QCA956X
select ATH79_DEV_AP9X_PCI if PCI
select ATH79_DEV_ETH
select ATH79_DEV_GPIO_BUTTONS
select ATH79_DEV_LEDS_GPIO
select ATH79_DEV_M25P80
select ATH79_DEV_USB
select ATH79_DEV_WMAC
config ATH79_MACH_GL_DOMINO
bool "DOMINO support"
select SOC_AR933X
......@@ -949,6 +960,16 @@ config ATH79_MACH_JWAP230
select ATH79_DEV_USB
select ATH79_DEV_WMAC
config ATH79_MACH_KOALA
bool "OCEDO Koala board support"
select SOC_QCA955X
select ATH79_DEV_AP9X_PCI if PCI
select ATH79_DEV_GPIO_BUTTONS
select ATH79_DEV_ETH
select ATH79_DEV_LEDS_GPIO
select ATH79_DEV_M25P80
select ATH79_DEV_WMAC
config ATH79_MACH_K2T
bool "Phicomm K2T A1/A2/A3 board"
select SOC_QCA956X
......@@ -1926,16 +1947,6 @@ config ATH79_MACH_TL_WR941ND_V6
select ATH79_DEV_M25P80
select ATH79_DEV_WMAC
config ATH79_MACH_TL_WR941N_V7
bool "TP-LINK TL-WR941N v7 support"
select SOC_QCA955X
select ATH79_DEV_ETH
select ATH79_DEV_GPIO_BUTTONS
select ATH79_DEV_LEDS_GPIO
select ATH79_DEV_M25P80
select ATH79_DEV_USB
select ATH79_DEV_WMAC
config ATH79_MACH_TL_WR940N_V4
bool "TP-LINK TL-WR940N v4 support"
select SOC_QCA956X
......@@ -2017,6 +2028,16 @@ config ATH79_MACH_TL_WR2543N
select ATH79_DEV_M25P80
select ATH79_DEV_USB
config ATH79_MACH_TS_D084
bool "PISEN TS-D084 support"
select SOC_AR933X
select ATH79_DEV_ETH
select ATH79_DEV_GPIO_BUTTONS
select ATH79_DEV_LEDS_GPIO
select ATH79_DEV_M25P80
select ATH79_DEV_USB
select ATH79_DEV_WMAC
config ATH79_MACH_TEW_632BRP
bool "TRENDnet TEW-632BRP support"
select SOC_AR913X
......@@ -2367,3 +2388,12 @@ config ATH79_MACH_FRITZ300E
select ATH79_DEV_GPIO_BUTTONS
select ATH79_DEV_LEDS_GPIO
select ATH79_DEV_M25P80
config ATH79_MACH_FRITZ4020
bool "AVM FRITZ!Box 4020 support"
select SOC_QCA956X
select ATH79_DEV_ETH
select ATH79_DEV_GPIO_BUTTONS
select ATH79_DEV_LEDS_GPIO
select ATH79_DEV_USB
select ATH79_DEV_M25P80
target/linux/ar71xx/files/arch/mips/ath79/Makefile → target/linux/ar71xx/files-4.14/arch/mips/ath79/Makefile
浏览文件 @ bce04f59
......@@ -59,6 +59,7 @@ obj-$(CONFIG_ATH79_MACH_AP531B0) += mach-ap531b0.o
obj-$(CONFIG_ATH79_MACH_AP90Q) += mach-ap90q.o
obj-$(CONFIG_ATH79_MACH_AP91_5G) += mach-ap91-5g.o
obj-$(CONFIG_ATH79_MACH_AP96) += mach-ap96.o
obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o
obj-$(CONFIG_ATH79_MACH_ARCHER_C25_V1) += mach-archer-c25-v1.o
obj-$(CONFIG_ATH79_MACH_ARCHER_C58_V1) += mach-archer-c59-v1.o
obj-$(CONFIG_ATH79_MACH_ARCHER_C59_V1) += mach-archer-c59-v1.o
......@@ -125,10 +126,12 @@ obj-$(CONFIG_ATH79_MACH_EW_BALIN) += mach-ew-balin.o
obj-$(CONFIG_ATH79_MACH_EW_DORIN) += mach-ew-dorin.o
obj-$(CONFIG_ATH79_MACH_F9K1115V2) += mach-f9k1115v2.o
obj-$(CONFIG_ATH79_MACH_FRITZ300E) += mach-fritz300e.o
obj-$(CONFIG_ATH79_MACH_FRITZ4020) += mach-fritz4020.o
obj-$(CONFIG_ATH79_MACH_GL_AR150) += mach-gl-ar150.o
obj-$(CONFIG_ATH79_MACH_GL_AR300) += mach-gl-ar300.o
obj-$(CONFIG_ATH79_MACH_GL_AR300M) += mach-gl-ar300m.o
obj-$(CONFIG_ATH79_MACH_GL_AR750) += mach-gl-ar750.o
obj-$(CONFIG_ATH79_MACH_GL_AR750S) += mach-gl-ar750s.o
obj-$(CONFIG_ATH79_MACH_GL_DOMINO) += mach-gl-domino.o
obj-$(CONFIG_ATH79_MACH_GL_INET) += mach-gl-inet.o
obj-$(CONFIG_ATH79_MACH_GL_MIFI) += mach-gl-mifi.o
......@@ -141,6 +144,7 @@ obj-$(CONFIG_ATH79_MACH_HORNET_UB) += mach-hornet-ub.o
obj-$(CONFIG_ATH79_MACH_JA76PF) += mach-ja76pf.o
obj-$(CONFIG_ATH79_MACH_JWAP003) += mach-jwap003.o
obj-$(CONFIG_ATH79_MACH_JWAP230) += mach-jwap230.o
obj-$(CONFIG_ATH79_MACH_KOALA) += mach-koala.o
obj-$(CONFIG_ATH79_MACH_K2T) += mach-k2t.o
obj-$(CONFIG_ATH79_MACH_LAN_TURTLE) += mach-lan-turtle.o
obj-$(CONFIG_ATH79_MACH_LIMA) += mach-lima.o
......@@ -241,9 +245,9 @@ obj-$(CONFIG_ATH79_MACH_TL_WR841N_V9) += mach-tl-wr841n-v9.o
obj-$(CONFIG_ATH79_MACH_TL_WR902AC_V1) += mach-tl-wr902ac-v1.o
obj-$(CONFIG_ATH79_MACH_TL_WR941ND) += mach-tl-wr941nd.o
obj-$(CONFIG_ATH79_MACH_TL_WR941ND_V6) += mach-tl-wr941nd-v6.o
obj-$(CONFIG_ATH79_MACH_TL_WR941N_V7) += mach-tl-wr941n-v7.o
obj-$(CONFIG_ATH79_MACH_TL_WR940N_V4) += mach-tl-wr940n-v4.o
obj-$(CONFIG_ATH79_MACH_TL_WR942N_V1) += mach-tl-wr942n-v1.o
obj-$(CONFIG_ATH79_MACH_TS_D084) += mach-ts-d084.o
obj-$(CONFIG_ATH79_MACH_TUBE2H) += mach-tube2h.o
obj-$(CONFIG_ATH79_MACH_UBNT) += mach-ubnt.o
obj-$(CONFIG_ATH79_MACH_UBNT_UNIFIAC) += mach-ubnt-unifiac.o
......
target/linux/ar71xx/files/arch/mips/ath79/dev-eth.c → target/linux/ar71xx/files-4.14/arch/mips/ath79/dev-eth.c
浏览文件 @ bce04f59
......@@ -1175,6 +1175,15 @@ void __init ath79_parse_ascii_mac(char *mac_str, u8 *mac)
}
}
void __init ath79_extract_mac_reverse(u8 *ptr, u8 *out)
{
int i;
for (i = 0; i < ETH_ALEN; i++) {
out[i] = ptr[ETH_ALEN-i-1];
}
}
static void __init ath79_set_mac_base_ascii(char *str)
{
u8 mac[ETH_ALEN];
......
target/linux/ar71xx/files/arch/mips/ath79/dev-eth.h → target/linux/ar71xx/files-4.14/arch/mips/ath79/dev-eth.h
浏览文件 @ bce04f59
......@@ -18,6 +18,7 @@ struct platform_device;
extern unsigned char ath79_mac_base[] __initdata;
void ath79_parse_ascii_mac(char *mac_str, u8 *mac);
void ath79_extract_mac_reverse(u8 *ptr, u8 *out);
void ath79_init_mac(unsigned char *dst, const unsigned char *src,
int offset);
void ath79_init_local_mac(unsigned char *dst, const unsigned char *src);
......
target/linux/ar71xx/files-4.14/arch/mips/ath79/mach-a60.c 0 → 100644
浏览文件 @ bce04f59
/*
* OpenMesh A60 support
*
* Copyright (C) 2013 Marek Lindner <marek@open-mesh.com>
* Copyright (C) 2014-2017 Sven Eckelmann <sven@open-mesh.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/platform_device.h>
#include <linux/platform_data/phy-at803x.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include <asm/mach-ath79/ath79.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-leds-gpio.h"
#include "dev-gpio-buttons.h"
#include "dev-m25p80.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "pci.h"
#include "dev-usb.h"
#define A60_GPIO_LED_RED 22
#define A60_GPIO_LED_GREEN 23
#define A60_GPIO_LED_BLUE 13
#define A60_GPIO_BTN_RESET 17
#define A60_KEYS_POLL_INTERVAL 20 /* msecs */
#define A60_KEYS_DEBOUNCE_INTERVAL (3 * A60_KEYS_POLL_INTERVAL)
#define A60_WMAC_CALDATA_OFFSET 0x1000
static struct gpio_led a40_leds_gpio[] __initdata = {
{
.name = "a40:red:status",
.gpio = A60_GPIO_LED_RED,
}, {
.name = "a40:green:status",
.gpio = A60_GPIO_LED_GREEN,
}, {
.name = "a40:blue:status",
.gpio = A60_GPIO_LED_BLUE,
}
};
static struct gpio_led a60_leds_gpio[] __initdata = {
{
.name = "a60:red:status",
.gpio = A60_GPIO_LED_RED,
}, {
.name = "a60:green:status",
.gpio = A60_GPIO_LED_GREEN,
}, {
.name = "a60:blue:status",
.gpio = A60_GPIO_LED_BLUE,
}
};
static struct gpio_keys_button a60_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = A60_KEYS_DEBOUNCE_INTERVAL,
.gpio = A60_GPIO_BTN_RESET,
.active_low = 1,
},
};
static struct at803x_platform_data a60_at803x_data = {
.disable_smarteee = 1,
.enable_rgmii_rx_delay = 1,
.enable_rgmii_tx_delay = 1,
};
static struct mdio_board_info a60_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.modalias = "a60_1",
.mdio_addr = 1,
.platform_data = &a60_at803x_data,
},
{
.bus_id = "ag71xx-mdio.0",
.modalias = "a60_2",
.mdio_addr = 2,
.platform_data = &a60_at803x_data,
},
};
static void __init a60_setup_qca955x_eth_cfg(u32 mask,
unsigned int rxd,
unsigned int rxdv,
unsigned int txd,
unsigned int txe)
{
void __iomem *base;
u32 t;
base = ioremap(QCA955X_GMAC_BASE, QCA955X_GMAC_SIZE);
t = mask;
t |= rxd << QCA955X_ETH_CFG_RXD_DELAY_SHIFT;
t |= rxdv << QCA955X_ETH_CFG_RDV_DELAY_SHIFT;
t |= txd << QCA955X_ETH_CFG_TXD_DELAY_SHIFT;
t |= txe << QCA955X_ETH_CFG_TXE_DELAY_SHIFT;
__raw_writel(t, base + QCA955X_GMAC_REG_ETH_CFG);
iounmap(base);
}
static void __init a60_setup_common(void)
{
u8 *art = (u8 *)KSEG1ADDR(0x1fff0000);
u8 mac[6];
ath79_register_usb();
ath79_register_m25p80(NULL);
ath79_register_gpio_keys_polled(-1, A60_KEYS_POLL_INTERVAL,
ARRAY_SIZE(a60_gpio_keys),
a60_gpio_keys);
ath79_init_mac(mac, art, 0x02);
ath79_register_wmac(art + A60_WMAC_CALDATA_OFFSET, mac);
a60_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN, 3, 3, 0, 0);
ath79_register_mdio(0, 0x0);
mdiobus_register_board_info(a60_mdio0_info, ARRAY_SIZE(a60_mdio0_info));
ath79_init_mac(ath79_eth0_data.mac_addr, art, 0x00);
ath79_init_mac(ath79_eth1_data.mac_addr, art, 0x01);
/* GMAC0 is connected to the PHY1 */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_data.phy_mask = BIT(1);
ath79_eth0_pll_data.pll_1000 = 0x82000101;
ath79_eth0_pll_data.pll_100 = 0x80000101;
ath79_eth0_pll_data.pll_10 = 0x80001313;
ath79_register_eth(0);
/* GMAC1 is connected to MDIO1 in SGMII mode */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth1_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth1_data.phy_mask = BIT(2);
ath79_eth1_pll_data.pll_1000 = 0x03000101;
ath79_eth1_pll_data.pll_100 = 0x80000101;
ath79_eth1_pll_data.pll_10 = 0x80001313;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_register_eth(1);
ath79_register_pci();
}
static void __init a40_setup(void)
{
ath79_register_leds_gpio(-1, ARRAY_SIZE(a40_leds_gpio), a40_leds_gpio);
a60_setup_common();
}
MIPS_MACHINE(ATH79_MACH_A40, "A40", "OpenMesh A40", a40_setup);
static void __init a60_setup(void)
{
ath79_register_leds_gpio(-1, ARRAY_SIZE(a60_leds_gpio), a60_leds_gpio);
a60_setup_common();
}
MIPS_MACHINE(ATH79_MACH_A60, "A60", "OpenMesh A60", a60_setup);
target/linux/ar71xx/files-4.14/arch/mips/ath79/mach-alfa-ap120c.c 0 → 100644
浏览文件 @ bce04f59
/*
* ALFA Network AP120C board support
*
* Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2016 Luka Perkov <luka@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/init.h>
#include <linux/bitops.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <linux/ar8216_platform.h>
#include <linux/ath9k_platform.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-ap9x-pci.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define ALFA_AP120C_GPIO_LED 0
#define ALFA_AP120C_GPIO_BUTTON_WIFI 16
#define ALFA_AP120C_GPIO_WATCH_DOG 20
#define ALFA_AP120C_KEYS_POLL_INTERVAL 20 /* msecs */
#define ALFA_AP120C_KEYS_DEBOUNCE_INTERVAL (3 * ALFA_AP120C_KEYS_POLL_INTERVAL)
#define ALFA_AP120C_MAC_OFFSET 0x1002
#define ALFA_AP120C_CAL0_OFFSET 0x1000
static struct gpio_keys_button alfa_ap120c_gpio_keys[] __initdata = {
{
.desc = "Wireless button",
.type = EV_KEY,
.code = KEY_RFKILL,
.debounce_interval = ALFA_AP120C_KEYS_DEBOUNCE_INTERVAL,
.gpio = ALFA_AP120C_GPIO_BUTTON_WIFI,
.active_low = 1,
}
};
static struct gpio_led alfa_ap120c_leds_gpio[] __initdata = {
{
.name = "ap120c:red:wlan",
.gpio = ALFA_AP120C_GPIO_LED,
.active_low = 0,
}
};
static struct ar8327_pad_cfg ap120c_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
};
static struct ar8327_platform_data ap120c_ar8327_data = {
.pad0_cfg = &ap120c_ar8327_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info ap120c_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.modalias = "ap120c",
.mdio_addr = 0,
.platform_data = &ap120c_ar8327_data,
},
};
static struct flash_platform_data flash __initdata = { NULL, NULL, 0 };
#define ALFA_AP120C_LAN_PHYMASK BIT(5)
#define ALFA_AP120C_MDIO_PHYMASK ALFA_AP120C_LAN_PHYMASK
static void __init alfa_ap120c_init(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 mac[ETH_ALEN];
struct ath9k_platform_data *pdata;
ath79_register_leds_gpio(-1, ARRAY_SIZE(alfa_ap120c_leds_gpio),
alfa_ap120c_leds_gpio);
ath79_register_gpio_keys_polled(-1, ALFA_AP120C_KEYS_POLL_INTERVAL,
ARRAY_SIZE(alfa_ap120c_gpio_keys),
alfa_ap120c_gpio_keys);
ath79_gpio_function_enable(AR71XX_GPIO_FUNC_SPI_CS1_EN |
AR71XX_GPIO_FUNC_SPI_CS2_EN);
ath79_register_m25p80_multi(&flash);
ath79_init_mac(mac, art + ALFA_AP120C_MAC_OFFSET, 1);
ath79_register_wmac(art + ALFA_AP120C_CAL0_OFFSET, mac);
ath79_init_mac(mac, art + ALFA_AP120C_MAC_OFFSET, 2);
ap91_pci_init(NULL, mac);
pdata = ap9x_pci_get_wmac_data(0);
if (!pdata) {
pr_err("ap120c: unable to get address of wlan data\n");
return;
}
pdata->use_eeprom = true;
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
BIT(15) | BIT(17) | BIT(19) | BIT(21));
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, art + ALFA_AP120C_MAC_OFFSET, 0);
mdiobus_register_board_info(ap120c_mdio0_info, ARRAY_SIZE(ap120c_mdio0_info));
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = ALFA_AP120C_LAN_PHYMASK;
ath79_eth0_pll_data.pll_1000 = 0x42000000;
ath79_eth0_pll_data.pll_10 = 0x00001313;
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_register_eth(0);
}
MIPS_MACHINE(ATH79_MACH_ALFA_AP120C, "ALFA-AP120C", "ALFA Network AP120C",
alfa_ap120c_init);
target/linux/ar71xx/files-4.14/arch/mips/ath79/mach-ap132.c 0 → 100644
浏览文件 @ bce04f59
/*
* Atheros AP132 reference board support
*
* Copyright (c) 2012 Qualcomm Atheros
* Copyright (c) 2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (c) 2013 Embedded Wireless GmbH <info@embeddedwireless.de>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/platform_device.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-gpio-buttons.h"
#include "dev-eth.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define AP132_GPIO_LED_USB 4
#define AP132_GPIO_LED_WLAN_5G 12
#define AP132_GPIO_LED_WLAN_2G 13
#define AP132_GPIO_LED_STATUS_RED 14
#define AP132_GPIO_LED_WPS_RED 15
#define AP132_GPIO_BTN_WPS 16
#define AP132_KEYS_POLL_INTERVAL 20 /* msecs */
#define AP132_KEYS_DEBOUNCE_INTERVAL (3 * AP132_KEYS_POLL_INTERVAL)
#define AP132_MAC0_OFFSET 0
#define AP132_WMAC_CALDATA_OFFSET 0x1000
static struct gpio_led ap132_leds_gpio[] __initdata = {
{
.name = "ap132:red:status",
.gpio = AP132_GPIO_LED_STATUS_RED,
.active_low = 1,
},
{
.name = "ap132:red:wps",
.gpio = AP132_GPIO_LED_WPS_RED,
.active_low = 1,
},
{
.name = "ap132:red:wlan-2g",
.gpio = AP132_GPIO_LED_WLAN_2G,
.active_low = 1,
},
{
.name = "ap132:red:usb",
.gpio = AP132_GPIO_LED_USB,
.active_low = 1,
}
};
static struct gpio_keys_button ap132_gpio_keys[] __initdata = {
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = AP132_KEYS_DEBOUNCE_INTERVAL,
.gpio = AP132_GPIO_BTN_WPS,
.active_low = 1,
},
};
static struct ar8327_pad_cfg ap132_ar8327_pad0_cfg;
static struct ar8327_platform_data ap132_ar8327_data = {
.pad0_cfg = &ap132_ar8327_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info ap132_mdio1_info[] = {
{
.bus_id = "ag71xx-mdio.1",
.modalias = "ap132",
.mdio_addr = 0,
.platform_data = &ap132_ar8327_data,
},
};
static void __init ap132_mdio_setup(void)
{
void __iomem *base;
u32 t;
#define GPIO_IN_ENABLE3_ADDRESS 0x0050
#define GPIO_IN_ENABLE3_MII_GE1_MDI_MASK 0x00ff0000
#define GPIO_IN_ENABLE3_MII_GE1_MDI_LSB 16
#define GPIO_IN_ENABLE3_MII_GE1_MDI_SET(x) (((x) << GPIO_IN_ENABLE3_MII_GE1_MDI_LSB) & GPIO_IN_ENABLE3_MII_GE1_MDI_MASK)
#define GPIO_OUT_FUNCTION4_ADDRESS 0x003c
#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_MASK 0xff000000
#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_LSB 24
#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_SET(x) (((x) << GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_LSB) & GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_MASK)
#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK 0x0000ff00
#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_LSB 8
#define GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_SET(x) (((x) << GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_LSB) & GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK)
base = ioremap(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE);
t = __raw_readl(base + GPIO_IN_ENABLE3_ADDRESS);
t &= ~GPIO_IN_ENABLE3_MII_GE1_MDI_MASK;
t |= GPIO_IN_ENABLE3_MII_GE1_MDI_SET(19);
__raw_writel(t, base + GPIO_IN_ENABLE3_ADDRESS);
__raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << 19), base + AR71XX_GPIO_REG_OE);
__raw_writel(__raw_readl(base + AR71XX_GPIO_REG_OE) & ~(1 << 17), base + AR71XX_GPIO_REG_OE);
t = __raw_readl(base + GPIO_OUT_FUNCTION4_ADDRESS);
t &= ~(GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_MASK | GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_MASK);
t |= GPIO_OUT_FUNCTION4_ENABLE_GPIO_19_SET(0x20) | GPIO_OUT_FUNCTION4_ENABLE_GPIO_17_SET(0x21);
__raw_writel(t, base + GPIO_OUT_FUNCTION4_ADDRESS);
iounmap(base);
}
static void __init ap132_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ap132_leds_gpio),
ap132_leds_gpio);
ath79_register_gpio_keys_polled(-1, AP132_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ap132_gpio_keys),
ap132_gpio_keys);
ath79_register_usb();
ath79_register_wmac(art + AP132_WMAC_CALDATA_OFFSET, NULL);
/* GMAC0 of the AR8327 switch is connected to GMAC1 via SGMII */
ap132_ar8327_pad0_cfg.mode = AR8327_PAD_MAC_SGMII;
ap132_ar8327_pad0_cfg.sgmii_delay_en = true;
ath79_eth1_pll_data.pll_1000 = 0x03000101;
ap132_mdio_setup();
ath79_register_mdio(1, 0x0);
ath79_init_mac(ath79_eth1_data.mac_addr, art + AP132_MAC0_OFFSET, 0);
mdiobus_register_board_info(ap132_mdio1_info,
ARRAY_SIZE(ap132_mdio1_info));
/* GMAC1 is connected to the SGMII interface */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_data.phy_mask = BIT(0);
ath79_eth1_data.mii_bus_dev = &ath79_mdio1_device.dev;
ath79_register_eth(1);
}
MIPS_MACHINE(ATH79_MACH_AP132, "AP132",
"Atheros AP132 reference board",
ap132_setup);
target/linux/ar71xx/files-4.14/arch/mips/ath79/mach-ap152.c 0 → 100644
浏览文件 @ bce04f59
/*
* Qualcomm Atheros AP152 reference board support
*
* Copyright (c) 2015 Qualcomm Atheros
* Copyright (c) 2012 Gabor Juhos <juhosg@openwrt.org>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-m25p80.h"
#include "machtypes.h"
#include "pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#define AP152_GPIO_LED_USB0 7
#define AP152_GPIO_LED_USB1 8
#define AP152_GPIO_BTN_RESET 2
#define AP152_GPIO_BTN_WPS 1
#define AP152_KEYS_POLL_INTERVAL 20 /* msecs */
#define AP152_KEYS_DEBOUNCE_INTERVAL (3 * AP152_KEYS_POLL_INTERVAL)
#define AP152_MAC0_OFFSET 0
#define AP152_WMAC_CALDATA_OFFSET 0x1000
static struct gpio_led ap152_leds_gpio[] __initdata = {
{
.name = "ap152:green:usb0",
.gpio = AP152_GPIO_LED_USB0,
.active_low = 1,
},
{
.name = "ap152:green:usb1",
.gpio = AP152_GPIO_LED_USB1,
.active_low = 1,
},
};
static struct gpio_keys_button ap152_gpio_keys[] __initdata = {
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = AP152_KEYS_DEBOUNCE_INTERVAL,
.gpio = AP152_GPIO_BTN_WPS,
.active_low = 1,
},
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = AP152_KEYS_DEBOUNCE_INTERVAL,
.gpio = AP152_GPIO_BTN_RESET,
.active_low = 1,
},
};
static struct ar8327_pad_cfg ap152_ar8337_pad0_cfg = {
.mode = AR8327_PAD_MAC_SGMII,
.sgmii_delay_en = true,
};
static struct ar8327_platform_data ap152_ar8337_data = {
.pad0_cfg = &ap152_ar8337_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info ap152_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.modalias = "ap152",
.mdio_addr = 0,
.platform_data = &ap152_ar8337_data,
},
};
static void __init ap152_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(ap152_leds_gpio),
ap152_leds_gpio);
ath79_register_gpio_keys_polled(-1, AP152_KEYS_POLL_INTERVAL,
ARRAY_SIZE(ap152_gpio_keys),
ap152_gpio_keys);
ath79_register_usb();
platform_device_register(&ath79_mdio0_device);
mdiobus_register_board_info(ap152_mdio0_info,
ARRAY_SIZE(ap152_mdio0_info));
ath79_register_wmac(art + AP152_WMAC_CALDATA_OFFSET, NULL);
ath79_register_pci();
ath79_init_mac(ath79_eth0_data.mac_addr, art + AP152_MAC0_OFFSET, 0);
/* GMAC0 is connected to an AR8337 switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_register_eth(0);
}
MIPS_MACHINE(ATH79_MACH_AP152, "AP152", "Qualcomm Atheros AP152 reference board",
ap152_setup);
target/linux/ar71xx/files-4.14/arch/mips/ath79/mach-archer-c7-v4.c 0 → 100644
浏览文件 @ bce04f59
/*
* Atheros ARCHER_C7 reference board support
*
* Copyright (c) 2017 Felix Fietkau <nbd@nbd.name>
* Copyright (c) 2014 The Linux Foundation. All rights reserved.
* Copyright (c) 2012 Gabor Juhos <juhosg@openwrt.org>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <linux/proc_fs.h>
#include <linux/gpio.h>
#include <linux/spi/spi_gpio.h>
#include <linux/spi/74x164.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-m25p80.h"
#include "machtypes.h"
#include "pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#define ARCHER_C7_GPIO_SHIFT_OE 1
#define ARCHER_C7_GPIO_SHIFT_SER 14
#define ARCHER_C7_GPIO_SHIFT_SRCLK 15
#define ARCHER_C7_GPIO_SHIFT_RCLK 16
#define ARCHER_C7_GPIO_SHIFT_SRCLR 21
#define ARCHER_C7_GPIO_BTN_RESET 5
#define ARCHER_C7_GPIO_BTN_WPS_WIFI 2
#define ARCHER_C7_GPIO_LED_WLAN5 9
#define ARCHER_C7_GPIO_LED_POWER 6
#define ARCHER_C7_GPIO_LED_USB1 7
#define ARCHER_C7_GPIO_LED_USB2 8
#define ARCHER_C7_74HC_GPIO_BASE 32
#define ARCHER_C7_GPIO_LED_WPS (ARCHER_C7_74HC_GPIO_BASE + 0)
#define ARCHER_C7_GPIO_LED_LAN1 (ARCHER_C7_74HC_GPIO_BASE + 1)
#define ARCHER_C7_GPIO_LED_LAN2 (ARCHER_C7_74HC_GPIO_BASE + 2)
#define ARCHER_C7_GPIO_LED_LAN3 (ARCHER_C7_74HC_GPIO_BASE + 3)
#define ARCHER_C7_GPIO_LED_LAN4 (ARCHER_C7_74HC_GPIO_BASE + 4)
#define ARCHER_C7_GPIO_LED_WAN_GREEN (ARCHER_C7_74HC_GPIO_BASE + 5)
#define ARCHER_C7_GPIO_LED_WAN_AMBER (ARCHER_C7_74HC_GPIO_BASE + 6)
#define ARCHER_C7_GPIO_LED_WLAN2 (ARCHER_C7_74HC_GPIO_BASE + 7)
#define ARCHER_C7_KEYS_POLL_INTERVAL 20 /* msecs */
#define ARCHER_C7_KEYS_DEBOUNCE_INTERVAL (3 * ARCHER_C7_KEYS_POLL_INTERVAL)
#define ARCHER_C7_MAC0_OFFSET 0
#define ARCHER_C7_MAC1_OFFSET 6
#define ARCHER_C7_WMAC_CALDATA_OFFSET 0x1000
#define ARCHER_C7_GPIO_MDC 3
#define ARCHER_C7_GPIO_MDIO 4
static struct spi_gpio_platform_data archer_c7_v4_spi_data = {
.sck = ARCHER_C7_GPIO_SHIFT_SRCLK,
.miso = SPI_GPIO_NO_MISO,
.mosi = ARCHER_C7_GPIO_SHIFT_SER,
.num_chipselect = 1,
};
static u8 archer_c7_v4_ssr_initdata = 0xff;
static struct gen_74x164_chip_platform_data archer_c7_v4_ssr_data = {
.base = ARCHER_C7_74HC_GPIO_BASE,
.num_registers = 1,
.init_data = &archer_c7_v4_ssr_initdata,
};
static struct platform_device archer_c7_v4_spi_device = {
.name = "spi_gpio",
.id = 1,
.dev = {
.platform_data = &archer_c7_v4_spi_data,
},
};
static struct spi_board_info archer_c7_v4_spi_info[] = {
{
.bus_num = 1,
.chip_select = 0,
.max_speed_hz = 10000000,
.modalias = "74x164",
.platform_data = &archer_c7_v4_ssr_data,
.controller_data = (void *) ARCHER_C7_GPIO_SHIFT_RCLK,
},
};
static struct gpio_led archer_c7_v4_leds_gpio[] __initdata = {
{
.name = "archer-c7-v4:green:power",
.gpio = ARCHER_C7_GPIO_LED_POWER,
.active_low = 1,
}, {
.name = "archer-c7-v4:green:wps",
.gpio = ARCHER_C7_GPIO_LED_WPS,
.active_low = 1,
}, {
.name = "archer-c7-v4:green:wlan2g",
.gpio = ARCHER_C7_GPIO_LED_WLAN2,
.active_low = 1,
}, {
.name = "archer-c7-v4:green:wlan5g",
.gpio = ARCHER_C7_GPIO_LED_WLAN5,
.active_low = 1,
}, {
.name = "archer-c7-v4:green:lan1",
.gpio = ARCHER_C7_GPIO_LED_LAN1,
.active_low = 1,
}, {
.name = "archer-c7-v4:green:lan2",
.gpio = ARCHER_C7_GPIO_LED_LAN2,
.active_low = 1,
}, {
.name = "archer-c7-v4:green:lan3",
.gpio = ARCHER_C7_GPIO_LED_LAN3,
.active_low = 1,
}, {
.name = "archer-c7-v4:green:lan4",
.gpio = ARCHER_C7_GPIO_LED_LAN4,
.active_low = 1,
}, {
.name = "archer-c7-v4:green:wan",
.gpio = ARCHER_C7_GPIO_LED_WAN_GREEN,
.active_low = 1,
}, {
.name = "archer-c7-v4:amber:wan",
.gpio = ARCHER_C7_GPIO_LED_WAN_AMBER,
.active_low = 1,
}, {
.name = "archer-c7-v4:green:usb1",
.gpio = ARCHER_C7_GPIO_LED_USB1,
.active_low = 1,
}, {
.name = "archer-c7-v4:green:usb2",
.gpio = ARCHER_C7_GPIO_LED_USB2,
.active_low = 1,
},
};
static struct gpio_keys_button archer_c7_v4_gpio_keys[] __initdata = {
{
.desc = "WPS and WIFI button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL,
.gpio = ARCHER_C7_GPIO_BTN_WPS_WIFI,
.active_low = 1,
},
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL,
.gpio = ARCHER_C7_GPIO_BTN_RESET,
.active_low = 1,
},
};
static struct ar8327_pad_cfg archer_c7_v4_ar8337_pad0_cfg = {
.mode = AR8327_PAD_MAC_SGMII,
.sgmii_delay_en = true,
};
static struct ar8327_platform_data archer_c7_v4_ar8337_data = {
.pad0_cfg = &archer_c7_v4_ar8337_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info archer_c7_v4_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.modalias = "archer_c7_v4",
.mdio_addr = 0,
.platform_data = &archer_c7_v4_ar8337_data,
},
};
static void __init archer_c7_v4_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 *mac = (u8 *) KSEG1ADDR(0x1ff00008);
ath79_register_m25p80(NULL);
spi_register_board_info(archer_c7_v4_spi_info,
ARRAY_SIZE(archer_c7_v4_spi_info));
platform_device_register(&archer_c7_v4_spi_device);
gpio_request_one(ARCHER_C7_GPIO_SHIFT_OE,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
"LED control");
gpio_request_one(ARCHER_C7_GPIO_SHIFT_SRCLR,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"LED reset");
ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c7_v4_leds_gpio),
archer_c7_v4_leds_gpio);
ath79_register_gpio_keys_polled(-1, ARCHER_C7_KEYS_POLL_INTERVAL,
ARRAY_SIZE(archer_c7_v4_gpio_keys),
archer_c7_v4_gpio_keys);
ath79_register_usb();
ath79_gpio_output_select(ARCHER_C7_GPIO_MDC, QCA956X_GPIO_OUT_MUX_GE0_MDC);
ath79_gpio_output_select(ARCHER_C7_GPIO_MDIO, QCA956X_GPIO_OUT_MUX_GE0_MDO);
ath79_register_mdio(0, 0x0);
mdiobus_register_board_info(archer_c7_v4_mdio0_info,
ARRAY_SIZE(archer_c7_v4_mdio0_info));
ath79_register_wmac(art + ARCHER_C7_WMAC_CALDATA_OFFSET, mac);
ath79_register_pci();
/* GMAC0 is connected to an AR8337 switch */
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth0_data.speed = SPEED_1000;
ath79_eth0_data.duplex = DUPLEX_FULL;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_register_eth(0);
}
MIPS_MACHINE(ATH79_MACH_ARCHER_C7_V4, "ARCHER-C7-V4", "TP-LINK Archer C7 v4",
archer_c7_v4_setup);
target/linux/ar71xx/files-4.14/arch/mips/ath79/mach-archer-c7.c 0 → 100644
浏览文件 @ bce04f59
/*
* TP-LINK Archer C5/C7/TL-WDR4900 v2 board support
*
* Copyright (c) 2013 Gabor Juhos <juhosg@openwrt.org>
* Copyright (c) 2014 施康成 <tenninjas@tenninjas.ca>
* Copyright (c) 2014 Imre Kaloz <kaloz@openwrt.org>
*
* Based on the Qualcomm Atheros AP135/AP136 reference board support code
* Copyright (c) 2012 Qualcomm Atheros
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/pci.h>
#include <linux/phy.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "pci.h"
#define ARCHER_C7_GPIO_LED_WLAN2G 12
#define ARCHER_C7_GPIO_LED_SYSTEM 14
#define ARCHER_C7_GPIO_LED_QSS 15
#define ARCHER_C7_GPIO_LED_WLAN5G 17
#define ARCHER_C7_GPIO_LED_USB1 18
#define ARCHER_C7_GPIO_LED_USB2 19
#define ARCHER_C7_GPIO_BTN_RFKILL 13
#define ARCHER_C7_V2_GPIO_BTN_RFKILL 23
#define ARCHER_C7_GPIO_BTN_RESET 16
#define ARCHER_C7_GPIO_USB1_POWER 22
#define ARCHER_C7_GPIO_USB2_POWER 21
#define ARCHER_C7_KEYS_POLL_INTERVAL 20 /* msecs */
#define ARCHER_C7_KEYS_DEBOUNCE_INTERVAL (3 * ARCHER_C7_KEYS_POLL_INTERVAL)
#define ARCHER_C7_WMAC_CALDATA_OFFSET 0x1000
#define ARCHER_C7_PCIE_CALDATA_OFFSET 0x5000
static const char *archer_c7_part_probes[] = {
"tp-link",
NULL,
};
static struct flash_platform_data archer_c7_flash_data = {
.part_probes = archer_c7_part_probes,
};
static struct gpio_led archer_c7_leds_gpio[] __initdata = {
{
.name = "tp-link:blue:qss",
.gpio = ARCHER_C7_GPIO_LED_QSS,
.active_low = 1,
},
{
.name = "tp-link:blue:system",
.gpio = ARCHER_C7_GPIO_LED_SYSTEM,
.active_low = 1,
},
{
.name = "tp-link:blue:wlan2g",
.gpio = ARCHER_C7_GPIO_LED_WLAN2G,
.active_low = 1,
},
{
.name = "tp-link:blue:wlan5g",
.gpio = ARCHER_C7_GPIO_LED_WLAN5G,
.active_low = 1,
},
{
.name = "tp-link:green:usb1",
.gpio = ARCHER_C7_GPIO_LED_USB1,
.active_low = 1,
},
{
.name = "tp-link:green:usb2",
.gpio = ARCHER_C7_GPIO_LED_USB2,
.active_low = 1,
},
};
static struct gpio_keys_button archer_c7_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL,
.gpio = ARCHER_C7_GPIO_BTN_RESET,
.active_low = 1,
},
{
.desc = "RFKILL switch",
.type = EV_SW,
.code = KEY_RFKILL,
.debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL,
.gpio = ARCHER_C7_GPIO_BTN_RFKILL,
},
};
static struct gpio_keys_button archer_c7_v2_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL,
.gpio = ARCHER_C7_GPIO_BTN_RESET,
.active_low = 1,
},
{
.desc = "RFKILL switch",
.type = EV_SW,
.code = KEY_RFKILL,
.debounce_interval = ARCHER_C7_KEYS_DEBOUNCE_INTERVAL,
.gpio = ARCHER_C7_V2_GPIO_BTN_RFKILL,
},
};
static const struct ar8327_led_info archer_c7_leds_ar8327[] = {
AR8327_LED_INFO(PHY0_0, HW, "tp-link:blue:wan"),
AR8327_LED_INFO(PHY1_0, HW, "tp-link:blue:lan1"),
AR8327_LED_INFO(PHY2_0, HW, "tp-link:blue:lan2"),
AR8327_LED_INFO(PHY3_0, HW, "tp-link:blue:lan3"),
AR8327_LED_INFO(PHY4_0, HW, "tp-link:blue:lan4"),
};
/* GMAC0 of the AR8327 switch is connected to the QCA9558 SoC via SGMII */
static struct ar8327_pad_cfg archer_c7_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_SGMII,
.sgmii_delay_en = true,
};
/* GMAC6 of the AR8327 switch is connected to the QCA9558 SoC via RGMII */
static struct ar8327_pad_cfg archer_c7_ar8327_pad6_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
};
static struct ar8327_led_cfg archer_c7_ar8327_led_cfg = {
.led_ctrl0 = 0xc737c737,
.led_ctrl1 = 0x00000000,
.led_ctrl2 = 0x00000000,
.led_ctrl3 = 0x0030c300,
.open_drain = false,
};
static struct ar8327_platform_data archer_c7_ar8327_data = {
.pad0_cfg = &archer_c7_ar8327_pad0_cfg,
.pad6_cfg = &archer_c7_ar8327_pad6_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
.port6_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
.led_cfg = &archer_c7_ar8327_led_cfg,
.num_leds = ARRAY_SIZE(archer_c7_leds_ar8327),
.leds = archer_c7_leds_ar8327,
};
static struct mdio_board_info archer_c7_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.modalias = "archer_c7",
.mdio_addr = 0,
.platform_data = &archer_c7_ar8327_data,
},
};
static void __init common_setup(bool pcie_slot)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1f01fc00);
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 tmpmac[ETH_ALEN];
ath79_register_m25p80(&archer_c7_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(archer_c7_leds_gpio),
archer_c7_leds_gpio);
ath79_init_mac(tmpmac, mac, -1);
ath79_register_wmac(art + ARCHER_C7_WMAC_CALDATA_OFFSET, tmpmac);
if (pcie_slot) {
ath79_register_pci();
} else {
ath79_init_mac(tmpmac, mac, -1);
ap9x_pci_setup_wmac_led_pin(0, 0);
ap91_pci_init(art + ARCHER_C7_PCIE_CALDATA_OFFSET, tmpmac);
}
mdiobus_register_board_info(archer_c7_mdio0_info,
ARRAY_SIZE(archer_c7_mdio0_info));
ath79_register_mdio(0, 0x0);
ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
/* GMAC0 is connected to the RMGII interface */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x56000000;
ath79_init_mac(ath79_eth0_data.mac_addr, mac, 1);
ath79_register_eth(0);
/* GMAC1 is connected to the SGMII interface */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_pll_data.pll_1000 = 0x03000101;
ath79_init_mac(ath79_eth1_data.mac_addr, mac, 0);
ath79_register_eth(1);
gpio_request_one(ARCHER_C7_GPIO_USB1_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB1 power");
gpio_request_one(ARCHER_C7_GPIO_USB2_POWER,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"USB2 power");
ath79_register_usb();
}
static void __init archer_c5_setup(void)
{
ath79_register_gpio_keys_polled(-1, ARCHER_C7_KEYS_POLL_INTERVAL,
ARRAY_SIZE(archer_c7_gpio_keys),
archer_c7_gpio_keys);
common_setup(true);
}
MIPS_MACHINE(ATH79_MACH_ARCHER_C5, "ARCHER-C5", "TP-LINK Archer C5",
archer_c5_setup);
static void __init archer_c7_setup(void)
{
ath79_register_gpio_keys_polled(-1, ARCHER_C7_KEYS_POLL_INTERVAL,
ARRAY_SIZE(archer_c7_gpio_keys),
archer_c7_gpio_keys);
common_setup(true);
}
MIPS_MACHINE(ATH79_MACH_ARCHER_C7, "ARCHER-C7", "TP-LINK Archer C7",
archer_c7_setup);
static void __init archer_c7_v2_setup(void)
{
ath79_register_gpio_keys_polled(-1, ARCHER_C7_KEYS_POLL_INTERVAL,
ARRAY_SIZE(archer_c7_v2_gpio_keys),
archer_c7_v2_gpio_keys);
common_setup(true);
}
MIPS_MACHINE(ATH79_MACH_ARCHER_C7_V2, "ARCHER-C7-V2", "TP-LINK Archer C7",
archer_c7_v2_setup);
static void __init tl_wdr4900_v2_setup(void)
{
ath79_register_gpio_keys_polled(-1, ARCHER_C7_KEYS_POLL_INTERVAL,
ARRAY_SIZE(archer_c7_gpio_keys),
archer_c7_gpio_keys);
common_setup(false);
}
MIPS_MACHINE(ATH79_MACH_TL_WDR4900_V2, "TL-WDR4900-v2", "TP-LINK TL-WDR4900 v2",
tl_wdr4900_v2_setup)
target/linux/ar71xx/files-4.14/arch/mips/ath79/mach-bhr-4grv2.c 0 → 100644
浏览文件 @ bce04f59
/*
* Buffalo BHR-4GRV2 board support
*
* Copyright (c) 2012 Qualcomm Atheros
* Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org>
* Copyright (c) 2016 FUKAUMI Naoki <naobsd@gmail.com>
*
* Based on mach-ap136.c and mach-wzr-450hp2.c
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/platform_device.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "machtypes.h"
#define BHR_4GRV2_GPIO_LED_VPN_RED 3
#define BHR_4GRV2_GPIO_LED_VPN_GREEN 18
#define BHR_4GRV2_GPIO_LED_POWER_GREEN 19
#define BHR_4GRV2_GPIO_LED_DIAG_RED 20
#define BHR_4GRV2_GPIO_BTN_RESET 17
#define BHR_4GRV2_GPIO_BTN_ECO 21
#define BHR_4GRV2_KEYS_POLL_INTERVAL 20 /* msecs */
#define BHR_4GRV2_KEYS_DEBOUNCE_INTERVAL (3 * BHR_4GRV2_KEYS_POLL_INTERVAL)
#define BHR_4GRV2_MAC0_OFFSET 0
#define BHR_4GRV2_MAC1_OFFSET 6
static struct gpio_led bhr_4grv2_leds_gpio[] __initdata = {
{
.name = "buffalo:red:vpn",
.gpio = BHR_4GRV2_GPIO_LED_VPN_RED,
.active_low = 1,
},
{
.name = "buffalo:green:vpn",
.gpio = BHR_4GRV2_GPIO_LED_VPN_GREEN,
.active_low = 1,
},
{
.name = "buffalo:green:power",
.gpio = BHR_4GRV2_GPIO_LED_POWER_GREEN,
.active_low = 1,
},
{
.name = "buffalo:red:diag",
.gpio = BHR_4GRV2_GPIO_LED_DIAG_RED,
.active_low = 1,
}
};
static struct gpio_keys_button bhr_4grv2_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = BHR_4GRV2_KEYS_DEBOUNCE_INTERVAL,
.gpio = BHR_4GRV2_GPIO_BTN_RESET,
.active_low = 1,
},
{
.desc = "ECO button",
.type = EV_KEY,
.code = BTN_0,
.debounce_interval = BHR_4GRV2_KEYS_DEBOUNCE_INTERVAL,
.gpio = BHR_4GRV2_GPIO_BTN_ECO,
.active_low = 1,
},
};
/* GMAC0 of the AR8327 switch is connected to GMAC1 via SGMII */
static struct ar8327_pad_cfg bhr_4grv2_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_SGMII,
.sgmii_delay_en = true,
};
/* GMAC6 of the AR8327 switch is connected to GMAC0 via RGMII */
static struct ar8327_pad_cfg bhr_4grv2_ar8327_pad6_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
};
static struct ar8327_platform_data bhr_4grv2_ar8327_data = {
.pad0_cfg = &bhr_4grv2_ar8327_pad0_cfg,
.pad6_cfg = &bhr_4grv2_ar8327_pad6_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
.port6_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info bhr_4grv2_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.modalias = "bhr_4grv2",
.mdio_addr = 0,
.platform_data = &bhr_4grv2_ar8327_data,
},
};
static void __init bhr_4grv2_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(bhr_4grv2_leds_gpio),
bhr_4grv2_leds_gpio);
ath79_register_gpio_keys_polled(-1, BHR_4GRV2_KEYS_POLL_INTERVAL,
ARRAY_SIZE(bhr_4grv2_gpio_keys),
bhr_4grv2_gpio_keys);
mdiobus_register_board_info(bhr_4grv2_mdio0_info,
ARRAY_SIZE(bhr_4grv2_mdio0_info));
ath79_register_mdio(0, 0x0);
ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
/* GMAC0 is connected to the RGMII interface */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x56000000;
ath79_init_mac(ath79_eth0_data.mac_addr, art + BHR_4GRV2_MAC0_OFFSET, 0);
ath79_register_eth(0);
/* GMAC1 is connected to the SGMII interface */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_pll_data.pll_1000 = 0x03000101;
ath79_init_mac(ath79_eth1_data.mac_addr, art + BHR_4GRV2_MAC1_OFFSET, 0);
ath79_register_eth(1);
}
MIPS_MACHINE(ATH79_MACH_BHR_4GRV2, "BHR-4GRV2",
"Buffalo BHR-4GRV2", bhr_4grv2_setup);
target/linux/ar71xx/files-4.14/arch/mips/ath79/mach-c60.c 0 → 100644
浏览文件 @ bce04f59
/*
* AirTight Networks C-60 board support
*
* Copyright (C) 2016 Christian Lamparter <chunkeey@googlemail.com>
*
* Based on AirTight Networks C-55 board support
*
* Copyright (C) 2014-2015 Chris Blake <chrisrblake93@gmail.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/pci.h>
#include <linux/phy.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/nand.h>
#include <linux/mtd/partitions.h>
#include <linux/mtd/physmap.h>
#include <linux/platform_device.h>
#include <linux/platform/ar934x_nfc.h>
#include <linux/ar8216_platform.h>
#include <linux/ath9k_platform.h>
#include <linux/version.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "pci.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-wmac.h"
#include "dev-usb.h"
#include "dev-nfc.h"
#include "machtypes.h"
#define C60_GPIO_LED_PWR_AMBER 11
#define C60_GPIO_LED_WLAN2_GREEN 12
#define C60_GPIO_LED_WLAN2_AMBER 13
#define C60_GPIO_LED_PWR_GREEN 16
#define C60_GPIO_BTN_RESET 17
/* GPIOs of the AR9300 PCIe chip */
#define C60_GPIO_WMAC_LED_WLAN1_AMBER 0
#define C60_GPIO_WMAC_LED_WLAN1_GREEN 3
#define C60_KEYS_POLL_INTERVAL 20 /* msecs */
#define C60_KEYS_DEBOUNCE_INTERVAL (3 * C60_KEYS_POLL_INTERVAL)
#define C60_ART_ADDR 0x1f7f0000
#define C60_ART_SIZE 0xffff
#define C60_MAC_OFFSET 0
#define C60_WMAC_CALDATA_OFFSET 0x1000
#define C60_PCIE_CALDATA_OFFSET 0x5000
static struct gpio_led c60_leds_gpio[] __initdata = {
{
.name = "c-60:amber:pwr",
.gpio = C60_GPIO_LED_PWR_AMBER,
.active_low = 1,
},
{
.name = "c-60:green:pwr",
.gpio = C60_GPIO_LED_PWR_GREEN,
.active_low = 1,
},
{
.name = "c-60:green:wlan2",
.gpio = C60_GPIO_LED_WLAN2_GREEN,
.active_low = 1,
},
{
.name = "c-60:amber:wlan2",
.gpio = C60_GPIO_LED_WLAN2_AMBER,
.active_low = 1,
},
};
static struct gpio_keys_button c60_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = C60_KEYS_DEBOUNCE_INTERVAL,
.gpio = C60_GPIO_BTN_RESET,
.active_low = 1,
},
};
static struct ar8327_pad_cfg c60_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
};
static struct ar8327_platform_data c60_ar8327_data = {
.pad0_cfg = &c60_ar8327_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
}
};
static struct mdio_board_info c60_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.modalias = "c60",
.mdio_addr = 0,
.platform_data = &c60_ar8327_data,
},
};
#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
static struct nand_ecclayout c60_nand_ecclayout = {
.eccbytes = 7,
.eccpos = { 4, 8, 9, 10, 13, 14, 15 },
.oobavail = 9,
.oobfree = { { 0, 3 }, { 6, 2 }, { 11, 2 }, }
};
#else
static int c60_ooblayout_ecc(struct mtd_info *mtd, int section,
struct mtd_oob_region *oobregion)
{
switch (section) {
case 0:
oobregion->offset = 4;
oobregion->length = 1;
return 0;
case 1:
oobregion->offset = 8;
oobregion->length = 3;
return 0;
case 2:
oobregion->offset = 13;
oobregion->length = 3;
return 0;
default:
return -ERANGE;
}
}
static int c60_ooblayout_free(struct mtd_info *mtd, int section,
struct mtd_oob_region *oobregion)
{
switch (section) {
case 0:
oobregion->offset = 0;
oobregion->length = 3;
return 0;
case 1:
oobregion->offset = 6;
oobregion->length = 2;
return 0;
case 2:
oobregion->offset = 11;
oobregion->length = 2;
return 0;
default:
return -ERANGE;
}
}
static const struct mtd_ooblayout_ops c60_nand_ecclayout_ops = {
.ecc = c60_ooblayout_ecc,
.free = c60_ooblayout_free,
};
#endif /* < 4.6 */
static int c60_nand_scan_fixup(struct mtd_info *mtd)
{
#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
struct nand_chip *chip = mtd->priv;
#else
struct nand_chip *chip = mtd_to_nand(mtd);
#endif
chip->ecc.size = 512;
chip->ecc.strength = 4;
#if LINUX_VERSION_CODE < KERNEL_VERSION(4,6,0)
chip->ecc.layout = &c60_nand_ecclayout;
#else
mtd_set_ooblayout(mtd, &c60_nand_ecclayout_ops);
#endif
return 0;
}
static struct gpio_led c60_wmac0_leds_gpio[] = {
{
.name = "c-60:amber:wlan1",
.gpio = C60_GPIO_WMAC_LED_WLAN1_AMBER,
.active_low = 1,
},
{
.name = "c-60:green:wlan1",
.gpio = C60_GPIO_WMAC_LED_WLAN1_GREEN,
.active_low = 1,
},
};
static void __init c60_setup(void)
{
u8 tmpmac[6];
u8 *art = (u8 *) KSEG1ADDR(C60_ART_ADDR);
/* NAND */
ath79_nfc_set_ecc_mode(AR934X_NFC_ECC_SOFT_BCH);
ath79_nfc_set_scan_fixup(c60_nand_scan_fixup);
ath79_register_nfc();
/* SPI Storage*/
ath79_register_m25p80(NULL);
/* AR8327 Switch Ethernet */
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
mdiobus_register_board_info(c60_mdio0_info,
ARRAY_SIZE(c60_mdio0_info));
ath79_register_mdio(0, 0x0);
/* GMAC0 is connected to an AR8327N switch */
ath79_init_mac(ath79_eth0_data.mac_addr, art + C60_MAC_OFFSET, 0);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
/* LEDs & GPIO */
ath79_register_leds_gpio(-1, ARRAY_SIZE(c60_leds_gpio),
c60_leds_gpio);
ath79_register_gpio_keys_polled(-1, C60_KEYS_POLL_INTERVAL,
ARRAY_SIZE(c60_gpio_keys),
c60_gpio_keys);
ap9x_pci_setup_wmac_leds(0, c60_wmac0_leds_gpio,
ARRAY_SIZE(c60_wmac0_leds_gpio));
/* USB */
ath79_register_usb();
/* WiFi */
ath79_init_mac(tmpmac, art + C60_MAC_OFFSET, 1);
ap91_pci_init(art + C60_PCIE_CALDATA_OFFSET, tmpmac);
ath79_init_mac(tmpmac, art + C60_MAC_OFFSET, 2);
ath79_register_wmac(art + C60_WMAC_CALDATA_OFFSET, tmpmac);
}
MIPS_MACHINE(ATH79_MACH_C60, "C-60", "AirTight Networks C-60",
c60_setup);
target/linux/ar71xx/files-4.14/arch/mips/ath79/mach-cr5000.c 0 → 100644
浏览文件 @ bce04f59
/*
* PowerCloud CR5000 support
*
* Copyright (c) 2011 Qualcomm Atheros
* Copyright (c) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
* Copyright (c) 2012-2013 PowerCloud Systems
* Copyright (c) 2015 Daniel Dickinson <openwrt@daniel.thecshore.com>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/gpio.h>
#include <linux/pci.h>
#include <linux/phy.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include <asm/mach-ath79/ath79.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define CR5000_GPIO_LED_WLAN_2G 14
#define CR5000_GPIO_LED_WPS 12
#define CR5000_GPIO_LED_POWER_AMBER 4
/* GPIO2 has to have JTAG disabled as it is also to
* power led
*/
#define CR5000_GPIO_LED_POWER_ENABLE 2
#define CR5000_GPIO_BTN_WPS 16
#define CR5000_GPIO_BTN_RESET 17
#define CR5000_KEYS_POLL_INTERVAL 20 /* msecs */
#define CR5000_KEYS_DEBOUNCE_INTERVAL (3 * CR5000_KEYS_POLL_INTERVAL)
#define CR5000_MAC0_OFFSET 0
#define CR5000_WMAC_CALDATA_OFFSET 0x1000
#define CR5000_WMAC_MAC_OFFSET 0x1002
#define CR5000_PCIE_CALDATA_OFFSET 0x5000
#define CR5000_PCIE_MAC_OFFSET 0x5002
static struct gpio_led cr5000_leds_gpio[] __initdata = {
{
.name = "pcs:amber:power",
.gpio = CR5000_GPIO_LED_POWER_AMBER,
.active_low = 1,
},
{
.name = "pcs:white:wps",
.gpio = CR5000_GPIO_LED_WPS,
.active_low = 1,
},
{
.name = "pcs:blue:wlan",
.gpio = CR5000_GPIO_LED_WLAN_2G,
.active_low = 1,
},
};
static struct gpio_keys_button cr5000_gpio_keys[] __initdata = {
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = CR5000_KEYS_DEBOUNCE_INTERVAL,
.gpio = CR5000_GPIO_BTN_WPS,
.active_low = 1,
},
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = CR5000_KEYS_DEBOUNCE_INTERVAL,
.gpio = CR5000_GPIO_BTN_RESET,
.active_low = 1,
},
};
static struct ar8327_pad_cfg cr5000_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
};
static struct ar8327_led_cfg cr5000_ar8327_led_cfg = {
.led_ctrl0 = 0x00000000,
.led_ctrl1 = 0xc737c737,
.led_ctrl2 = 0x00000000,
.led_ctrl3 = 0x00c30c00,
.open_drain = true,
};
static struct ar8327_platform_data cr5000_ar8327_data = {
.pad0_cfg = &cr5000_ar8327_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
.led_cfg = &cr5000_ar8327_led_cfg,
};
static struct mdio_board_info cr5000_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.modalias = "cr5000",
.mdio_addr = 0,
.platform_data = &cr5000_ar8327_data,
},
};
static void __init cr5000_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
ath79_gpio_function_enable(AR934X_GPIO_FUNC_JTAG_DISABLE);
gpio_request_one(CR5000_GPIO_LED_POWER_ENABLE,
GPIOF_OUT_INIT_LOW, "Power LED enable");
ath79_gpio_output_select(CR5000_GPIO_LED_POWER_AMBER, AR934X_GPIO_OUT_GPIO);
ath79_gpio_output_select(CR5000_GPIO_LED_WLAN_2G, AR934X_GPIO_OUT_GPIO);
ath79_gpio_output_select(CR5000_GPIO_LED_WPS, AR934X_GPIO_OUT_GPIO);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(cr5000_leds_gpio),
cr5000_leds_gpio);
ath79_register_gpio_keys_polled(-1, CR5000_KEYS_POLL_INTERVAL,
ARRAY_SIZE(cr5000_gpio_keys),
cr5000_gpio_keys);
ath79_register_usb();
ath79_register_wmac(art + CR5000_WMAC_CALDATA_OFFSET, art + CR5000_WMAC_MAC_OFFSET);
ap94_pci_init(NULL, NULL, NULL, art + CR5000_PCIE_MAC_OFFSET);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, art + CR5000_MAC0_OFFSET, 0);
mdiobus_register_board_info(cr5000_mdio0_info,
ARRAY_SIZE(cr5000_mdio0_info));
/* GMAC0 is connected to an AR8327 switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
}
MIPS_MACHINE(ATH79_MACH_CR5000, "CR5000", "PowerCloud CR5000",
cr5000_setup);
target/linux/ar71xx/files-4.14/arch/mips/ath79/mach-dap-2695-a1.c 0 → 100644
浏览文件 @ bce04f59
/*
* D-Link DAP-2695 rev. A1 support
*
* Copyright (c) 2012 Qualcomm Atheros
* Copyright (c) 2012-2013 Gabor Juhos <juhosg@openwrt.org>
* Copyright (c) 2016 Stijn Tintel <stijn@linux-ipv6.be>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/platform_device.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "pci.h"
#include "dev-ap9x-pci.h"
#include "dev-gpio-buttons.h"
#include "dev-eth.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "nvram.h"
#define DAP2695_GPIO_LED_GREEN_POWER 23
#define DAP2695_GPIO_LED_RED_POWER 14
#define DAP2695_GPIO_LED_WLAN_2G 13
#define DAP2695_GPIO_BTN_RESET 17
#define DAP2695_KEYS_POLL_INTERVAL 20 /* msecs */
#define DAP2695_KEYS_DEBOUNCE_INTERVAL (3 * DAP2695_KEYS_POLL_INTERVAL)
#define DAP2695_NVRAM_ADDR 0x1f040000
#define DAP2695_NVRAM_SIZE 0x10000
#define DAP2695_MAC0_OFFSET 1
#define DAP2695_MAC1_OFFSET 2
#define DAP2695_WMAC_CALDATA_OFFSET 0x1000
static struct gpio_led dap2695_leds_gpio[] __initdata = {
{
.name = "d-link:green:power",
.gpio = DAP2695_GPIO_LED_GREEN_POWER,
.active_low = 1,
},
{
.name = "d-link:red:power",
.gpio = DAP2695_GPIO_LED_RED_POWER,
.active_low = 1,
},
{
.name = "d-link:green:wlan2g",
.gpio = DAP2695_GPIO_LED_WLAN_2G,
.active_low = 1,
},
};
static struct gpio_keys_button dap2695_gpio_keys[] __initdata = {
{
.desc = "Soft reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DAP2695_KEYS_DEBOUNCE_INTERVAL,
.gpio = DAP2695_GPIO_BTN_RESET,
.active_low = 1,
},
};
static struct ar8327_pad_cfg dap2695_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
.mac06_exchange_dis = true,
};
static struct ar8327_pad_cfg dap2695_ar8327_pad6_cfg = {
.mode = AR8327_PAD_MAC_SGMII,
.sgmii_delay_en = true,
};
static struct ar8327_platform_data dap2695_ar8327_data = {
.pad0_cfg = &dap2695_ar8327_pad0_cfg,
.pad6_cfg = &dap2695_ar8327_pad6_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
.port6_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info dap2695_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.modalias = "dap2695",
.mdio_addr = 0,
.platform_data = &dap2695_ar8327_data,
},
};
static struct flash_platform_data dap2695_flash_data = {
.type = "mx25l12805d",
};
static void dap2695_get_mac(const char *name, char *mac)
{
u8 *nvram = (u8 *) KSEG1ADDR(DAP2695_NVRAM_ADDR);
int err;
err = ath79_nvram_parse_mac_addr(nvram, DAP2695_NVRAM_SIZE,
name, mac);
if (err)
pr_err("no MAC address found for %s\n", name);
}
static void __init dap2695_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 mac0[ETH_ALEN], mac1[ETH_ALEN], wmac0[ETH_ALEN];
dap2695_get_mac("lanmac=", mac0);
dap2695_get_mac("wanmac=", mac1);
dap2695_get_mac("wlanmac=", wmac0);
ath79_register_m25p80(&dap2695_flash_data);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dap2695_leds_gpio),
dap2695_leds_gpio);
ath79_register_gpio_keys_polled(-1, DAP2695_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dap2695_gpio_keys),
dap2695_gpio_keys);
ath79_register_wmac(art + DAP2695_WMAC_CALDATA_OFFSET, wmac0);
ath79_setup_qca955x_eth_cfg(QCA955X_ETH_CFG_RGMII_EN);
ath79_register_mdio(0, 0x0);
mdiobus_register_board_info(dap2695_mdio0_info,
ARRAY_SIZE(dap2695_mdio0_info));
/* GMAC0 is connected to the RGMII interface */
ath79_init_mac(ath79_eth0_data.mac_addr, mac0, DAP2695_MAC0_OFFSET);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x56000000;
ath79_register_eth(0);
/* GMAC1 is connected to the SGMII interface */
ath79_init_mac(ath79_eth1_data.mac_addr, mac1, DAP2695_MAC1_OFFSET);
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth1_data.speed = SPEED_1000;
ath79_eth1_data.duplex = DUPLEX_FULL;
ath79_eth1_pll_data.pll_1000 = 0x03000101;
ath79_register_eth(1);
ath79_register_pci();
}
MIPS_MACHINE(ATH79_MACH_DAP_2695_A1, "DAP-2695-A1",
"D-Link DAP-2695 rev. A1",
dap2695_setup);
target/linux/ar71xx/files-4.14/arch/mips/ath79/mach-dgl-5500-a1.c 0 → 100644
浏览文件 @ bce04f59
/*
* D-Link DGL-5500 board support
*
* Copyright (C) 2014 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "pci.h"
#include "dev-gpio-buttons.h"
#include "dev-eth.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define DGL_5500_A1_GPIO_LED_POWER_ORANGE 14
#define DGL_5500_A1_GPIO_LED_POWER_GREEN 19
#define DGL_5500_A1_GPIO_LED_PLANET_GREEN 22
#define DGL_5500_A1_GPIO_LED_PLANET_ORANGE 23
#define DGL_5500_A1_GPIO_BTN_WPS 16
#define DGL_5500_A1_GPIO_BTN_RESET 17
#define DGL_5500_A1_KEYS_POLL_INTERVAL 20 /* msecs */
#define DGL_5500_A1_KEYS_DEBOUNCE_INTERVAL \
(3 * DGL_5500_A1_KEYS_POLL_INTERVAL)
#define DGL_5500_A1_WMAC_CALDATA_OFFSET 0x1000
#define DGL_5500_A1_LAN_MAC_OFFSET 0x04
#define DGL_5500_A1_WAN_MAC_OFFSET 0x16
static struct gpio_led dgl_5500_a1_leds_gpio[] __initdata = {
{
.name = "d-link:green:power",
.gpio = DGL_5500_A1_GPIO_LED_POWER_GREEN,
.active_low = 1,
},
{
.name = "d-link:orange:power",
.gpio = DGL_5500_A1_GPIO_LED_POWER_ORANGE,
.active_low = 1,
},
{
.name = "d-link:green:planet",
.gpio = DGL_5500_A1_GPIO_LED_PLANET_GREEN,
.active_low = 1,
},
{
.name = "d-link:orange:planet",
.gpio = DGL_5500_A1_GPIO_LED_PLANET_ORANGE,
.active_low = 1,
},
};
static struct gpio_keys_button dgl_5500_a1_gpio_keys[] __initdata = {
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DGL_5500_A1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DGL_5500_A1_GPIO_BTN_RESET,
.active_low = 1,
},
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DGL_5500_A1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DGL_5500_A1_GPIO_BTN_WPS,
.active_low = 1,
},
};
static struct ar8327_pad_cfg dgl_5500_a1_ar8327_pad0_cfg = {
/* Use the SGMII interface for the GMAC0 of the AR8327 switch */
.mode = AR8327_PAD_MAC_SGMII,
.sgmii_delay_en = true,
};
static struct ar8327_platform_data dgl_5500_a1_ar8327_data = {
.pad0_cfg = &dgl_5500_a1_ar8327_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info dgl_5500_a1_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.modalias = "dgl_5500_a1",
.mdio_addr = 0,
.platform_data = &dgl_5500_a1_ar8327_data,
},
};
static void __init dgl_5500_a1_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000);
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 lan_mac[ETH_ALEN];
ath79_parse_ascii_mac(mac + DGL_5500_A1_LAN_MAC_OFFSET, lan_mac);
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dgl_5500_a1_leds_gpio),
dgl_5500_a1_leds_gpio);
ath79_register_gpio_keys_polled(-1, DGL_5500_A1_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dgl_5500_a1_gpio_keys),
dgl_5500_a1_gpio_keys);
ath79_register_wmac(art + DGL_5500_A1_WMAC_CALDATA_OFFSET, lan_mac);
ath79_register_mdio(0, 0x0);
mdiobus_register_board_info(dgl_5500_a1_mdio0_info,
ARRAY_SIZE(dgl_5500_a1_mdio0_info));
ath79_init_mac(ath79_eth1_data.mac_addr, lan_mac, 0);
/* GMAC1 is connected to an AR8327N switch via the SMGII interface */
ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth1_data.phy_mask = BIT(0);
ath79_eth1_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth1_pll_data.pll_1000 = 0x03000101;
ath79_register_eth(1);
ath79_register_usb();
ath79_register_pci();
}
MIPS_MACHINE(ATH79_MACH_DGL_5500_A1, "DGL-5500-A1", "D-Link DGL-5500 rev. A1",
dgl_5500_a1_setup);
target/linux/ar71xx/files-4.14/arch/mips/ath79/mach-dhp-1565-a1.c 0 → 100644
浏览文件 @ bce04f59
/*
* D-Link DHP-1565 rev. A1 board support
*
* Copyright (C) 2014 Jacek Kikiewicz
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/pci.h>
#include <linux/phy.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define DHP1565A1_GPIO_LED_BLUE_USB 11
#define DHP1565A1_GPIO_LED_AMBER_POWER 14
#define DHP1565A1_GPIO_LED_BLUE_POWER 22
#define DHP1565A1_GPIO_LED_BLUE_WPS 15
#define DHP1565A1_GPIO_LED_AMBER_PLANET 19
#define DHP1565A1_GPIO_LED_BLUE_PLANET 18
#define DHP1565A1_GPIO_LED_WLAN_2G 13
#define DHP1565A1_GPIO_WAN_LED_ENABLE 20
#define DHP1565A1_GPIO_BTN_RESET 17
#define DHP1565A1_GPIO_BTN_WPS 16
#define DHP1565A1_KEYS_POLL_INTERVAL 20 /* msecs */
#define DHP1565A1_KEYS_DEBOUNCE_INTERVAL (3 * DHP1565A1_KEYS_POLL_INTERVAL)
#define DHP1565A1_MAC0_OFFSET 0xFFA0
#define DHP1565A1_MAC1_OFFSET 0xFFB4
#define DHP1565A1_WMAC0_OFFSET 0x5
#define DHP1565A1_WMAC_CALDATA_OFFSET 0x1000
#define DHP1565A1_PCIE_CALDATA_OFFSET 0x5000
static struct gpio_led dhp1565a1_leds_gpio[] __initdata = {
{
.name = "d-link:amber:power",
.gpio = DHP1565A1_GPIO_LED_AMBER_POWER,
.active_low = 1,
},
{
.name = "d-link:green:power",
.gpio = DHP1565A1_GPIO_LED_BLUE_POWER,
.active_low = 1,
},
{
.name = "d-link:amber:planet",
.gpio = DHP1565A1_GPIO_LED_AMBER_PLANET,
.active_low = 1,
},
{
.name = "d-link:green:planet",
.gpio = DHP1565A1_GPIO_LED_BLUE_PLANET,
.active_low = 1,
},
};
static struct gpio_keys_button dhp1565a1_gpio_keys[] __initdata = {
{
.desc = "Soft reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DHP1565A1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DHP1565A1_GPIO_BTN_RESET,
.active_low = 1,
},
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DHP1565A1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DHP1565A1_GPIO_BTN_WPS,
.active_low = 1,
},
};
static struct ar8327_pad_cfg dhp1565a1_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
};
static struct ar8327_platform_data dhp1565a1_ar8327_data = {
.pad0_cfg = &dhp1565a1_ar8327_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info dhp1565a1_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.modalias = "dhp1565a1",
.mdio_addr = 0,
.platform_data = &dhp1565a1_ar8327_data,
},
};
static void __init dhp1565a1_generic_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000);
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 mac0[ETH_ALEN], mac1[ETH_ALEN];
u8 wmac0[ETH_ALEN];
ath79_parse_ascii_mac(mac + DHP1565A1_MAC0_OFFSET, mac0);
ath79_parse_ascii_mac(mac + DHP1565A1_MAC1_OFFSET, mac1);
ath79_register_m25p80(NULL);
ath79_register_gpio_keys_polled(-1, DHP1565A1_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dhp1565a1_gpio_keys),
dhp1565a1_gpio_keys);
ath79_init_mac(wmac0, mac0, 0);
ath79_register_wmac(art + DHP1565A1_WMAC_CALDATA_OFFSET, wmac0);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
mdiobus_register_board_info(dhp1565a1_mdio0_info,
ARRAY_SIZE(dhp1565a1_mdio0_info));
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 1);
/* GMAC0 is connected to an AR8327N switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
ath79_register_usb();
}
static void __init dhp1565a1_setup(void)
{
ath79_register_leds_gpio(-1, ARRAY_SIZE(dhp1565a1_leds_gpio),
dhp1565a1_leds_gpio);
dhp1565a1_generic_setup();
}
MIPS_MACHINE(ATH79_MACH_DHP_1565_A1, "DHP-1565-A1",
"D-Link DHP-1565 rev. A1",
dhp1565a1_setup);
target/linux/ar71xx/files-4.14/arch/mips/ath79/mach-dir-825-c1.c 0 → 100644
浏览文件 @ bce04f59
/*
* D-Link DIR-825 rev. C1 board support
*
* Copyright (C) 2013 Alexander Stadler
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/pci.h>
#include <linux/phy.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-spi.h"
#include "dev-usb.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define DIR825C1_GPIO_LED_BLUE_USB 11
#define DIR825C1_GPIO_LED_AMBER_POWER 14
#define DIR825C1_GPIO_LED_BLUE_POWER 22
#define DIR825C1_GPIO_LED_BLUE_WPS 15
#define DIR825C1_GPIO_LED_AMBER_PLANET 19
#define DIR825C1_GPIO_LED_BLUE_PLANET 18
#define DIR825C1_GPIO_LED_WLAN_2G 13
#define DIR825C1_GPIO_WAN_LED_ENABLE 20
#define DIR825C1_GPIO_BTN_RESET 17
#define DIR825C1_GPIO_BTN_WPS 16
#define DIR825C1_KEYS_POLL_INTERVAL 20 /* msecs */
#define DIR825C1_KEYS_DEBOUNCE_INTERVAL (3 * DIR825C1_KEYS_POLL_INTERVAL)
#define DIR825C1_MAC0_OFFSET 0x4
#define DIR825C1_MAC1_OFFSET 0x18
#define DIR825C1_WMAC_CALDATA_OFFSET 0x1000
#define DIR825C1_PCIE_CALDATA_OFFSET 0x5000
static struct gpio_led dir825c1_leds_gpio[] __initdata = {
{
.name = "d-link:blue:usb",
.gpio = DIR825C1_GPIO_LED_BLUE_USB,
.active_low = 1,
},
{
.name = "d-link:amber:power",
.gpio = DIR825C1_GPIO_LED_AMBER_POWER,
.active_low = 1,
},
{
.name = "d-link:blue:power",
.gpio = DIR825C1_GPIO_LED_BLUE_POWER,
.active_low = 1,
},
{
.name = "d-link:blue:wps",
.gpio = DIR825C1_GPIO_LED_BLUE_WPS,
.active_low = 1,
},
{
.name = "d-link:amber:planet",
.gpio = DIR825C1_GPIO_LED_AMBER_PLANET,
.active_low = 1,
},
{
.name = "d-link:blue:wlan2g",
.gpio = DIR825C1_GPIO_LED_WLAN_2G,
.active_low = 1,
},
};
static struct gpio_led dir835a1_leds_gpio[] __initdata = {
{
.name = "d-link:amber:power",
.gpio = DIR825C1_GPIO_LED_AMBER_POWER,
.active_low = 1,
},
{
.name = "d-link:green:power",
.gpio = DIR825C1_GPIO_LED_BLUE_POWER,
.active_low = 1,
},
{
.name = "d-link:blue:wps",
.gpio = DIR825C1_GPIO_LED_BLUE_WPS,
.active_low = 1,
},
{
.name = "d-link:amber:planet",
.gpio = DIR825C1_GPIO_LED_AMBER_PLANET,
.active_low = 1,
},
{
.name = "d-link:green:planet",
.gpio = DIR825C1_GPIO_LED_BLUE_PLANET,
.active_low = 1,
},
};
static struct gpio_keys_button dir825c1_gpio_keys[] __initdata = {
{
.desc = "Soft reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DIR825C1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR825C1_GPIO_BTN_RESET,
.active_low = 1,
},
{
.desc = "WPS button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DIR825C1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR825C1_GPIO_BTN_WPS,
.active_low = 1,
},
};
static struct ar8327_pad_cfg dir825c1_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = true,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
};
static struct ar8327_led_cfg dir825c1_ar8327_led_cfg = {
.led_ctrl0 = 0x00000000,
.led_ctrl1 = 0xc737c737,
.led_ctrl2 = 0x00000000,
.led_ctrl3 = 0x00c30c00,
.open_drain = true,
};
static struct ar8327_platform_data dir825c1_ar8327_data = {
.pad0_cfg = &dir825c1_ar8327_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
.led_cfg = &dir825c1_ar8327_led_cfg,
};
static struct mdio_board_info dir825c1_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.modalias = "dir825c1",
.mdio_addr = 0,
.platform_data = &dir825c1_ar8327_data,
},
};
static void __init dir825c1_generic_setup(void)
{
u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000);
u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
u8 mac0[ETH_ALEN], mac1[ETH_ALEN];
u8 wmac0[ETH_ALEN], wmac1[ETH_ALEN];
ath79_parse_ascii_mac(mac + DIR825C1_MAC0_OFFSET, mac0);
ath79_parse_ascii_mac(mac + DIR825C1_MAC1_OFFSET, mac1);
ath79_register_m25p80(NULL);
ath79_register_gpio_keys_polled(-1, DIR825C1_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dir825c1_gpio_keys),
dir825c1_gpio_keys);
ath79_init_mac(wmac0, mac0, 0);
ath79_register_wmac(art + DIR825C1_WMAC_CALDATA_OFFSET, wmac0);
ath79_init_mac(wmac1, mac1, 1);
ap91_pci_init(art + DIR825C1_PCIE_CALDATA_OFFSET, wmac1);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
mdiobus_register_board_info(dir825c1_mdio0_info,
ARRAY_SIZE(dir825c1_mdio0_info));
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0);
/* GMAC0 is connected to an AR8327N switch */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x06000000;
ath79_register_eth(0);
ath79_register_usb();
}
static void __init dir825c1_setup(void)
{
ath79_gpio_output_select(DIR825C1_GPIO_LED_BLUE_USB,
AR934X_GPIO_OUT_GPIO);
gpio_request_one(DIR825C1_GPIO_WAN_LED_ENABLE,
GPIOF_OUT_INIT_LOW, "WAN LED enable");
ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825c1_leds_gpio),
dir825c1_leds_gpio);
ap9x_pci_setup_wmac_led_pin(0, 0);
dir825c1_generic_setup();
}
static void __init dir835a1_setup(void)
{
dir825c1_ar8327_data.led_cfg = NULL;
ath79_register_leds_gpio(-1, ARRAY_SIZE(dir835a1_leds_gpio),
dir835a1_leds_gpio);
dir825c1_generic_setup();
}
MIPS_MACHINE(ATH79_MACH_DIR_825_C1, "DIR-825-C1",
"D-Link DIR-825 rev. C1",
dir825c1_setup);
MIPS_MACHINE(ATH79_MACH_DIR_835_A1, "DIR-835-A1",
"D-Link DIR-835 rev. A1",
dir835a1_setup);
target/linux/ar71xx/files-4.14/arch/mips/ath79/mach-dir-869-a1.c 0 → 100644
浏览文件 @ bce04f59
/*
* D-Link DIR-869 A1 support
*
* Copyright (C) 2015-2016 P. Wassi <p.wassi at gmx.at>
* Copyright (C) 2016 Matthias Schiffer <mschiffer@universe-factory.net>
*
* Derived from: mach-ubnt-unifiac.c
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/irq.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include <linux/platform_data/phy-at803x.h>
#include <linux/ar8216_platform.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-wmac.h"
#include "machtypes.h"
#include "nvram.h"
#define DIR869A1_GPIO_BTN_RESET 1
#define DIR869A1_GPIO_BTN_WPS 2
#define DIR869A1_GPIO_SWITCH_MODE 8
#define DIR869A1_GPIO_ENABLE_SWITCH 11
#define DIR869A1_GPIO_LED_ORANGE 15
#define DIR869A1_GPIO_LED_WHITE 16
#define DIR869A1_KEYS_POLL_INTERVAL 20 /* msecs */
#define DIR869A1_KEYS_DEBOUNCE_INTERVAL (3 * DIR869A1_KEYS_POLL_INTERVAL)
#define DIR869A1_DEVDATA_ADDR 0x1f050000
#define DIR869A1_DEVDATA_SIZE 0x10000
#define DIR869A1_EEPROM_ADDR 0x1fff0000
#define DIR869A1_WMAC_CALDATA_OFFSET 0x1000
#define DIR869A1_PCI_CALDATA_OFFSET 0x5000
static struct gpio_led dir869a1_leds_gpio[] __initdata = {
{
.name = "d-link:white:status",
.gpio = DIR869A1_GPIO_LED_WHITE,
.active_low = 1,
},
{
.name = "d-link:orange:status",
.gpio = DIR869A1_GPIO_LED_ORANGE,
.active_low = 1,
},
};
static struct gpio_keys_button dir869a1_gpio_keys[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DIR869A1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR869A1_GPIO_BTN_RESET,
.active_low = 1,
},
{
.desc = "wps",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DIR869A1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR869A1_GPIO_BTN_WPS,
.active_low = 1,
},
{
.desc = "mode",
.type = EV_SW,
.code = BTN_0,
.debounce_interval = DIR869A1_KEYS_DEBOUNCE_INTERVAL,
.gpio = DIR869A1_GPIO_SWITCH_MODE,
.active_low = 0,
},
};
static struct ar8327_pad_cfg dir869a1_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_SGMII,
.sgmii_delay_en = true,
};
static struct ar8327_platform_data dir869a1_ar8327_data = {
.pad0_cfg = &dir869a1_ar8327_pad0_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info dir869a1_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.modalias = "dir869a1",
.mdio_addr = 0,
.platform_data = &dir869a1_ar8327_data,
},
};
static void dir869a1_get_mac(const char *name, char *mac)
{
u8 *nvram = (u8 *) KSEG1ADDR(DIR869A1_DEVDATA_ADDR);
int err;
err = ath79_nvram_parse_mac_addr(nvram, DIR869A1_DEVDATA_SIZE,
name, mac);
if (err)
pr_err("no MAC address found for %s\n", name);
}
static void __init dir869a1_setup(void)
{
u8 *eeprom = (u8 *) KSEG1ADDR(DIR869A1_EEPROM_ADDR);
u8 wlan24mac[ETH_ALEN] = {}, wlan5mac[ETH_ALEN] = {};
ath79_register_m25p80(NULL);
gpio_request_one(DIR869A1_GPIO_ENABLE_SWITCH,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"Switch power");
dir869a1_get_mac("lanmac=", ath79_eth0_data.mac_addr);
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_data.phy_mask = BIT(0);
mdiobus_register_board_info(dir869a1_mdio0_info,
ARRAY_SIZE(dir869a1_mdio0_info));
ath79_register_mdio(0, 0);
ath79_register_eth(0);
dir869a1_get_mac("wlan24mac=", wlan24mac);
ath79_register_wmac(eeprom + DIR869A1_WMAC_CALDATA_OFFSET, wlan24mac);
dir869a1_get_mac("wlan5mac=", wlan5mac);
ap91_pci_init(eeprom + DIR869A1_PCI_CALDATA_OFFSET, wlan5mac);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dir869a1_leds_gpio),
dir869a1_leds_gpio);
ath79_register_gpio_keys_polled(-1, DIR869A1_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dir869a1_gpio_keys),
dir869a1_gpio_keys);
}
MIPS_MACHINE(ATH79_MACH_DIR_869_A1, "DIR-869-A1", "D-Link DIR-869 rev. A1",
dir869a1_setup);
target/linux/ar71xx/files-4.14/arch/mips/ath79/mach-dlan-pro-1200-ac.c 0 → 100644
浏览文件 @ bce04f59
/*
* devolo dLAN pro 500 Wireless+ support
*
* Copyright (c) 2013-2015 devolo AG
* Copyright (c) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
* copyright notice and this permission notice appear in all copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*
*/
#include <linux/pci.h>
#include <linux/phy.h>
#include <linux/platform_device.h>
#include <linux/ath9k_platform.h>
#include <linux/ar8216_platform.h>
#include <linux/gpio.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "common.h"
#include "dev-ap9x-pci.h"
#include "dev-eth.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-m25p80.h"
#include "dev-nfc.h"
#include "dev-spi.h"
#include "dev-wmac.h"
#include "machtypes.h"
#define DLAN_PRO_1200_AC_GPIO_DLAN_POWER_ENABLE 13
#define DLAN_PRO_1200_AC_GPIO_WLAN_POWER_ENABLE 21
#define DLAN_PRO_1200_AC_GPIO_LED_WLAN 12
#define DLAN_PRO_1200_AC_GPIO_LED_DLAN 14
#define DLAN_PRO_1200_AC_GPIO_LED_DLAN_ERR 15
#define DLAN_PRO_1200_AC_GPIO_BTN_WLAN 20
#define DLAN_PRO_1200_AC_GPIO_BTN_DLAN 22
#define DLAN_PRO_1200_AC_GPIO_BTN_RESET 4
#define DLAN_PRO_1200_AC_GPIO_DLAN_IND 17
#define DLAN_PRO_1200_AC_GPIO_DLAN_ERR_IND 16
#define DLAN_PRO_1200_AC_KEYS_POLL_INTERVAL 20 /* msecs */
#define DLAN_PRO_1200_AC_KEYS_DEBOUNCE_INTERVAL (3 * DLAN_PRO_1200_AC_KEYS_POLL_INTERVAL)
#define DLAN_PRO_1200_AC_ART_ADDRESS 0x1fff0000
#define DLAN_PRO_1200_AC_CALDATA_OFFSET 0x1000
#define DLAN_PRO_1200_AC_WIFIMAC_OFFSET 0x1002
#define DLAN_PRO_1200_AC_PCIE_CALDATA_OFFSET 0x5000
static struct gpio_led dlan_pro_1200_ac_leds_gpio[] __initdata = {
{
.name = "devolo:status:wlan",
.gpio = DLAN_PRO_1200_AC_GPIO_LED_WLAN,
.active_low = 1,
},
{
.name = "devolo:status:dlan",
.gpio = DLAN_PRO_1200_AC_GPIO_LED_DLAN,
.active_low = 1,
},
{
.name = "devolo:error:dlan",
.gpio = DLAN_PRO_1200_AC_GPIO_LED_DLAN_ERR,
.active_low = 0,
}
};
static struct gpio_keys_button dlan_pro_1200_ac_gpio_keys[] __initdata = {
{
.desc = "dLAN button",
.type = EV_KEY,
.code = BTN_0,
.debounce_interval = DLAN_PRO_1200_AC_KEYS_DEBOUNCE_INTERVAL,
.gpio = DLAN_PRO_1200_AC_GPIO_BTN_DLAN,
.active_low = 1,
},
{
.desc = "WLAN button",
.type = EV_KEY,
.code = KEY_WPS_BUTTON,
.debounce_interval = DLAN_PRO_1200_AC_KEYS_DEBOUNCE_INTERVAL,
.gpio = DLAN_PRO_1200_AC_GPIO_BTN_WLAN,
.active_low = 0,
},
{
.desc = "Reset button",
.type = EV_KEY,
.code = KEY_RESTART,
.debounce_interval = DLAN_PRO_1200_AC_KEYS_DEBOUNCE_INTERVAL,
.gpio = DLAN_PRO_1200_AC_GPIO_BTN_RESET,
.active_low = 1,
}
};
static struct ar8327_pad_cfg dlan_pro_1200_ac_ar8327_pad0_cfg = {
.mode = AR8327_PAD_MAC_RGMII,
.txclk_delay_en = true,
.rxclk_delay_en = false,
.txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
.rxclk_delay_sel = AR8327_CLK_DELAY_SEL0,
.mac06_exchange_dis = true,
};
static struct ar8327_pad_cfg dlan_pro_1200_ac_ar8327_pad5_cfg = {
.mode = 0,
.txclk_delay_en = 0,
.rxclk_delay_en = 0,
.txclk_delay_sel = 0,
.rxclk_delay_sel = 0,
};
static struct ar8327_platform_data dlan_pro_1200_ac_ar8327_data = {
.pad0_cfg = &dlan_pro_1200_ac_ar8327_pad0_cfg,
.pad5_cfg = &dlan_pro_1200_ac_ar8327_pad5_cfg,
.port0_cfg = {
.force_link = 1,
.speed = AR8327_PORT_SPEED_1000,
.duplex = 1,
.txpause = 1,
.rxpause = 1,
},
};
static struct mdio_board_info dlan_pro_1200_ac_mdio0_info[] = {
{
.bus_id = "ag71xx-mdio.0",
.modalias = "dlan_pro_1200_ac",
.mdio_addr = 0,
.platform_data = &dlan_pro_1200_ac_ar8327_data,
},
};
static void __init dlan_pro_1200_ac_setup(void)
{
u8 *art = (u8 *) KSEG1ADDR(DLAN_PRO_1200_AC_ART_ADDRESS);
u8 *cal = art + DLAN_PRO_1200_AC_CALDATA_OFFSET;
u8 *wifi_mac = art + DLAN_PRO_1200_AC_WIFIMAC_OFFSET;
ath79_register_m25p80(NULL);
ath79_register_leds_gpio(-1, ARRAY_SIZE(dlan_pro_1200_ac_leds_gpio),
dlan_pro_1200_ac_leds_gpio);
ath79_register_gpio_keys_polled(-1, DLAN_PRO_1200_AC_KEYS_POLL_INTERVAL,
ARRAY_SIZE(dlan_pro_1200_ac_gpio_keys),
dlan_pro_1200_ac_gpio_keys);
/* dLAN power must be enabled from user-space as soon as the boot-from-host daemon is running */
gpio_request_one(DLAN_PRO_1200_AC_GPIO_DLAN_POWER_ENABLE,
GPIOF_OUT_INIT_LOW | GPIOF_EXPORT_DIR_FIXED,
"dLAN power");
/* WLAN power is turned on initially to allow the PCI bus scan to succeed */
gpio_request_one(DLAN_PRO_1200_AC_GPIO_WLAN_POWER_ENABLE,
GPIOF_OUT_INIT_HIGH | GPIOF_EXPORT_DIR_FIXED,
"WLAN power");
ath79_register_wmac(cal, wifi_mac);
ap91_pci_init(art + DLAN_PRO_1200_AC_PCIE_CALDATA_OFFSET, NULL);
ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 | AR934X_ETH_CFG_SW_ONLY_MODE);
ath79_register_mdio(1, 0x0);
ath79_register_mdio(0, 0x0);
ath79_init_mac(ath79_eth0_data.mac_addr, wifi_mac, 2);
mdiobus_register_board_info(dlan_pro_1200_ac_mdio0_info,
ARRAY_SIZE(dlan_pro_1200_ac_mdio0_info));
/* GMAC0 is connected to an AR8337 */
ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ath79_eth0_data.phy_mask = BIT(0);
ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
ath79_eth0_pll_data.pll_1000 = 0x02000000;
ath79_register_eth(0);
}
MIPS_MACHINE(ATH79_MACH_DLAN_PRO_1200_AC, "dLAN-pro-1200-ac", "devolo dLAN pro 1200+ WiFi ac",
dlan_pro_1200_ac_setup);
target/linux/ar71xx/files-4.14/drivers/mtd/tplinkpart.c 0 → 100644
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target/linux/ar71xx/files-4.9/arch/mips/ath79/dev-dsa.c 0 → 100644
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target/linux/ar71xx/files-4.9/arch/mips/ath79/dev-dsa.h 0 → 100644
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target/linux/ar71xx/files-4.9/arch/mips/ath79/dev-eth.c 0 → 100644
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target/linux/ar71xx/files-4.9/arch/mips/ath79/dev-eth.h 0 → 100644
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target/linux/ar71xx/files-4.9/arch/mips/ath79/dev-nfc.c 0 → 100644
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target/linux/ar71xx/files-4.9/arch/mips/ath79/dev-nfc.h 0 → 100644
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target/linux/ar71xx/files-4.9/arch/mips/ath79/nvram.c 0 → 100644
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target/linux/ar71xx/files-4.9/arch/mips/ath79/nvram.h 0 → 100644
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target/linux/ar71xx/files-4.9/drivers/gpio/gpio-latch.c 0 → 100644
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target/linux/ar71xx/files-4.9/drivers/leds/leds-nu801.c 0 → 100644
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target/linux/ar71xx/files-4.9/drivers/leds/leds-rb750.c 0 → 100644
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target/linux/ar71xx/files-4.9/drivers/spi/spi-rb4xx.c 0 → 100644
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target/linux/ar71xx/files-4.9/drivers/spi/spi-vsc7385.c 0 → 100644
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target/linux/ar71xx/image/legacy.mk
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target/linux/ar71xx/patches-4.14/001-spi-cs-gpio.patch 0 → 100644
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target/linux/ar71xx/patches-4.14/999-ppp-function.patch 0 → 100644
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