Skip to content
体验新版
项目
组织
正在加载...
登录
切换导航
打开侧边栏
tbblgm119
lede
提交
b6f731a7
L
lede
项目概览
tbblgm119
/
lede
与 Fork 源项目一致
从无法访问的项目Fork
通知
7
Star
0
Fork
0
代码
文件
提交
分支
Tags
贡献者
分支图
Diff
Issue
0
列表
看板
标记
里程碑
合并请求
0
Wiki
0
Wiki
分析
仓库
DevOps
项目成员
Pages
L
lede
项目概览
项目概览
详情
发布
仓库
仓库
文件
提交
分支
标签
贡献者
分支图
比较
Issue
0
Issue
0
列表
看板
标记
里程碑
合并请求
0
合并请求
0
Pages
分析
分析
仓库分析
DevOps
Wiki
0
Wiki
成员
成员
收起侧边栏
关闭侧边栏
动态
分支图
创建新Issue
提交
Issue看板
体验新版 GitCode,发现更多精彩内容 >>
提交
b6f731a7
编写于
9月 21, 2017
作者:
C
coolsnowwolf
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
fix RT-AC58U spi nand ecc error drive
上级
09a92869
变更
2
隐藏空白更改
内联
并排
Showing
2 changed file
with
64 addition
and
72 deletion
+64
-72
target/linux/ipq806x/patches-4.9/860-qcom-mtd-nand-Add-bam_dma-support-in-qcom_nand-drive.patch
...com-mtd-nand-Add-bam_dma-support-in-qcom_nand-drive.patch
+12
-21
target/linux/ipq806x/patches-4.9/861-qcom-mtd-nand-Added-bam-transaction-and-support-addi.patch
...com-mtd-nand-Added-bam-transaction-and-support-addi.patch
+52
-51
未找到文件。
target/linux/ipq806x/patches-4.9/860-qcom-mtd-nand-Add-bam_dma-support-in-qcom_nand-drive.patch
浏览文件 @
b6f731a7
...
...
@@ -116,7 +116,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
compatible = "qcom,nandcs";
--- a/drivers/mtd/nand/qcom_nandc.c
+++ b/drivers/mtd/nand/qcom_nandc.c
@@ -2
26,6 +226
,7 @@
struct nandc_regs {
@@ -2
34,6 +234
,7 @@
struct nandc_regs {
* by upper layers directly
* @buf_size/count/start: markers for chip->read_buf/write_buf functions
* @reg_read_buf: local buffer for reading back registers via DMA
...
...
@@ -124,7 +124,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
* @reg_read_pos: marker for data read in reg_read_buf
*
* @regs: a contiguous chunk of memory for DMA register
@@ -2
34,7 +235
,10 @@
struct nandc_regs {
@@ -2
42,7 +243
,10 @@
struct nandc_regs {
* @cmd1/vld: some fixed controller register values
* @ecc_modes: supported ECC modes by the current controller,
* initialized via DT match data
...
...
@@ -136,7 +136,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
struct qcom_nand_controller {
struct nand_hw_control controller;
struct list_head host_list;
@@ -2
47,17 +251
,28 @@
struct qcom_nand_controller {
@@ -2
55,17 +259
,28 @@
struct qcom_nand_controller {
struct clk *core_clk;
struct clk *aon_clk;
...
...
@@ -168,7 +168,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
int reg_read_pos;
struct nandc_regs *regs;
@@ -3
16,6 +331
,17 @@
struct qcom_nand_host {
@@ -3
24,6 +339
,17 @@
struct qcom_nand_host {
u32 clrreadstatus;
};
...
...
@@ -186,16 +186,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
static inline struct qcom_nand_host *to_qcom_nand_host(struct nand_chip *chip)
{
return container_of(chip, struct qcom_nand_host, chip);
@@ -1893,7 +1919,7 @@
static int qcom_nand_host_setup(struct q
| wide_bus << WIDE_FLASH
| 1 << DEV0_CFG1_ECC_DISABLE;
- host->ecc_bch_cfg = host->bch_enabled << ECC_CFG_ECC_DISABLE
+ host->ecc_bch_cfg = !host->bch_enabled << ECC_CFG_ECC_DISABLE
| 0 << ECC_SW_RESET
| host->cw_data << ECC_NUM_DATA_BYTES
| 1 << ECC_FORCE_CLK_OPEN
@@ -1942,16 +1968,46 @@
static int qcom_nandc_alloc(struct qcom_
@@ -1949,16 +1975,46 @@
static int qcom_nandc_alloc(struct qcom_
if (!nandc->regs)
return -ENOMEM;
...
...
@@ -251,7 +242,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
}
INIT_LIST_HEAD(&nandc->desc_list);
@@ -19
64,8 +2020
,35 @@
static int qcom_nandc_alloc(struct qcom_
@@ -19
71,8 +2027
,35 @@
static int qcom_nandc_alloc(struct qcom_
static void qcom_nandc_unalloc(struct qcom_nand_controller *nandc)
{
...
...
@@ -289,7 +280,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
/* one time setup of a few nand controller registers */
static int qcom_nandc_setup(struct qcom_nand_controller *nandc)
@@ -20
02,6 +2085
,8 @@
static int qcom_nand_host_init(struct qc
@@ -20
10,6 +2093
,8 @@
static int qcom_nand_host_init(struct qc
mtd->name = devm_kasprintf(dev, GFP_KERNEL, "qcom_nand.%d", host->cs);
mtd->owner = THIS_MODULE;
mtd->dev.parent = dev;
...
...
@@ -298,7 +289,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
chip->cmdfunc = qcom_nandc_command;
chip->select_chip = qcom_nandc_select_chip;
@@ -20
49,16 +2134
,20 @@
static int qcom_nandc_parse_dt(struct pl
@@ -20
57,16 +2142
,20 @@
static int qcom_nandc_parse_dt(struct pl
struct device_node *np = nandc->dev->of_node;
int ret;
...
...
@@ -328,7 +319,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
}
return 0;
@@ -20
73,6 +2162
,7 @@
static int qcom_nandc_probe(struct platf
@@ -20
81,6 +2170
,7 @@
static int qcom_nandc_probe(struct platf
struct device_node *dn = dev->of_node, *child;
struct resource *res;
int ret;
...
...
@@ -336,7 +327,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
nandc = devm_kzalloc(&pdev->dev, sizeof(*nandc), GFP_KERNEL);
if (!nandc)
@@ -20
87,7 +2177
,10 @@
static int qcom_nandc_probe(struct platf
@@ -20
95,7 +2185
,10 @@
static int qcom_nandc_probe(struct platf
return -ENODEV;
}
...
...
@@ -348,7 +339,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
nandc->base = devm_ioremap_resource(dev, res);
@@ -21
79,7 +2272
,15 @@
static int qcom_nandc_remove(struct plat
@@ -21
87,7 +2280
,15 @@
static int qcom_nandc_remove(struct plat
return 0;
}
...
...
@@ -365,7 +356,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
/*
* data will hold a struct pointer containing more differences once we support
@@ -21
87,7 +2288
,10 @@
static int qcom_nandc_remove(struct plat
@@ -21
95,7 +2296
,10 @@
static int qcom_nandc_remove(struct plat
*/
static const struct of_device_id qcom_nandc_of_match[] = {
{ .compatible = "qcom,ipq806x-nand",
...
...
target/linux/ipq806x/patches-4.9/861-qcom-mtd-nand-Added-bam-transaction-and-support-addi.patch
浏览文件 @
b6f731a7
...
...
@@ -45,7 +45,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
/* dummy register offsets, used by write_reg_dma */
#define NAND_DEV_CMD1_RESTORE 0xdead
@@ -13
1,6 +134
,11 @@
@@ -13
5,6 +138
,11 @@
#define ERASED_PAGE (PAGE_ALL_ERASED | PAGE_ERASED)
#define ERASED_CW (CODEWORD_ALL_ERASED | CODEWORD_ERASED)
...
...
@@ -57,9 +57,9 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
/* Version Mask */
#define NAND_VERSION_MAJOR_MASK 0xf0000000
#define NAND_VERSION_MAJOR_SHIFT 28
@@ -1
48,6 +156
,9 @@
#define
FETCH_ID 0xb
#define RESET_DEVICE 0xd
@@ -1
56,6 +164
,9 @@
#define
NAND_DEV_CMD_VLD_VAL (READ_START_VLD | WRITE_START_VLD | \
ERASE_START_VLD | SEQ_READ_START_VLD)
+/* NAND_CTRL bits */
+#define BAM_MODE_EN BIT(0)
...
...
@@ -67,7 +67,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
/*
* the NAND controller performs reads/writes with ECC in 516 byte chunks.
* the driver calls the chunks 'step' or 'codeword' interchangeably
@@ -1
69,12 +180
,77 @@
@@ -1
77,12 +188
,77 @@
#define ECC_BCH_4BIT BIT(2)
#define ECC_BCH_8BIT BIT(3)
...
...
@@ -145,7 +145,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
};
/*
@@ -2
02,6 +278
,13 @@
struct nandc_regs {
@@ -2
10,6 +286
,13 @@
struct nandc_regs {
__le32 orig_vld;
__le32 ecc_buf_cfg;
...
...
@@ -159,7 +159,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
};
/*
@@ -2
17,6 +300
,7 @@
struct nandc_regs {
@@ -2
25,6 +308
,7 @@
struct nandc_regs {
* @aon_clk: another controller clock
*
* @chan: dma channel
...
...
@@ -167,7 +167,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
* @cmd_crci: ADM DMA CRCI for command flow control
* @data_crci: ADM DMA CRCI for data flow control
* @desc_list: DMA descriptor list (list of desc_infos)
@@ -2
42,6 +326
,7 @@
struct nandc_regs {
@@ -2
50,6 +334
,7 @@
struct nandc_regs {
struct qcom_nand_controller {
struct nand_hw_control controller;
struct list_head host_list;
...
...
@@ -175,7 +175,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
struct device *dev;
@@ -3
42,6 +427
,45 @@
struct qcom_nand_driver_data {
@@ -3
50,6 +435
,45 @@
struct qcom_nand_driver_data {
bool dma_bam_enabled;
};
...
...
@@ -221,7 +221,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
static inline struct qcom_nand_host *to_qcom_nand_host(struct nand_chip *chip)
{
return container_of(chip, struct qcom_nand_host, chip);
@@ -
398,6 +522
,16 @@
static __le32 *offset_to_nandc_reg(struc
@@ -
406,6 +530
,16 @@
static __le32 *offset_to_nandc_reg(struc
return ®s->orig_vld;
case NAND_EBI2_ECC_BUF_CFG:
return ®s->ecc_buf_cfg;
...
...
@@ -238,7 +238,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
default:
return NULL;
}
@@ -4
39,7 +573
,7 @@
static void update_rw_regs(struct qcom_n
@@ -4
47,7 +581
,7 @@
static void update_rw_regs(struct qcom_n
{
struct nand_chip *chip = &host->chip;
struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
...
...
@@ -247,7 +247,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
if (read) {
if (host->use_ecc)
@@ -4
56,12 +590
,20 @@
static void update_rw_regs(struct qcom_n
@@ -4
64,12 +598
,20 @@
static void update_rw_regs(struct qcom_n
cfg1 = host->cfg1;
ecc_bch_cfg = host->ecc_bch_cfg;
...
...
@@ -268,7 +268,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
}
nandc_set_reg(nandc, NAND_FLASH_CMD, cmd);
@@ -4
72,8 +614
,104 @@
static void update_rw_regs(struct qcom_n
@@ -4
80,8 +622
,104 @@
static void update_rw_regs(struct qcom_n
nandc_set_reg(nandc, NAND_FLASH_STATUS, host->clrflashstatus);
nandc_set_reg(nandc, NAND_READ_STATUS, host->clrreadstatus);
nandc_set_reg(nandc, NAND_EXEC_CMD, 1);
...
...
@@ -373,7 +373,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
static int prep_dma_desc(struct qcom_nand_controller *nandc, bool read,
int reg_off, const void *vaddr, int size,
bool flow_control)
@@ -5
52,7 +790
,7 @@
err:
@@ -5
60,7 +798
,7 @@
err:
* @num_regs: number of registers to read
*/
static int read_reg_dma(struct qcom_nand_controller *nandc, int first,
...
...
@@ -382,7 +382,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
{
bool flow_control = false;
void *vaddr;
@@ -56
1,10 +799
,18 @@
static int read_reg_dma(struct qcom_nand
@@ -56
9,10 +807
,18 @@
static int read_reg_dma(struct qcom_nand
if (first == NAND_READ_ID || first == NAND_FLASH_STATUS)
flow_control = true;
...
...
@@ -402,7 +402,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
return prep_dma_desc(nandc, true, first, vaddr, size, flow_control);
}
@@ -5
76,7 +822
,7 @@
static int read_reg_dma(struct qcom_nand
@@ -5
84,7 +830
,7 @@
static int read_reg_dma(struct qcom_nand
* @num_regs: number of registers to write
*/
static int write_reg_dma(struct qcom_nand_controller *nandc, int first,
...
...
@@ -411,7 +411,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
{
bool flow_control = false;
struct nandc_regs *regs = nandc->regs;
@@ -5
88,12 +834
,29 @@
static int write_reg_dma(struct qcom_nan
@@ -5
96,12 +842
,29 @@
static int write_reg_dma(struct qcom_nan
if (first == NAND_FLASH_CMD)
flow_control = true;
...
...
@@ -441,7 +441,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
size = num_regs * sizeof(u32);
return prep_dma_desc(nandc, false, first, vaddr, size, flow_control);
@@ -6
08,8 +871
,12 @@
static int write_reg_dma(struct qcom_nan
@@ -6
16,8 +879
,12 @@
static int write_reg_dma(struct qcom_nan
* @size: DMA transaction size in bytes
*/
static int read_data_dma(struct qcom_nand_controller *nandc, int reg_off,
...
...
@@ -455,7 +455,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
return prep_dma_desc(nandc, true, reg_off, vaddr, size, false);
}
@@ -6
22,8 +889
,12 @@
static int read_data_dma(struct qcom_nan
@@ -6
30,8 +897
,12 @@
static int read_data_dma(struct qcom_nan
* @size: DMA transaction size in bytes
*/
static int write_data_dma(struct qcom_nand_controller *nandc, int reg_off,
...
...
@@ -469,7 +469,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
return prep_dma_desc(nandc, false, reg_off, vaddr, size, false);
}
@@ -6
33,14 +904
,57 @@
static int write_data_dma(struct qcom_na
@@ -6
41,14 +912
,57 @@
static int write_data_dma(struct qcom_na
*/
static void config_cw_read(struct qcom_nand_controller *nandc)
{
...
...
@@ -533,7 +533,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
}
/*
@@ -6
49,19 +963
,20 @@
static void config_cw_read(struct qcom_n
@@ -6
57,19 +971
,20 @@
static void config_cw_read(struct qcom_n
*/
static void config_cw_write_pre(struct qcom_nand_controller *nandc)
{
...
...
@@ -561,7 +561,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
}
/*
@@ -6
75,6 +990
,8 @@
static int nandc_param(struct qcom_nand_
@@ -6
83,6 +998
,8 @@
static int nandc_param(struct qcom_nand_
struct nand_chip *chip = &host->chip;
struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
...
...
@@ -570,7 +570,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
/*
* NAND_CMD_PARAM is called before we know much about the FLASH chip
* in use. we configure the controller to perform a raw read of 512
@@ -7
08,9 +1025
,13 @@
static int nandc_param(struct qcom_nand_
@@ -7
15,9 +1032
,13 @@
static int nandc_param(struct qcom_nand_
nandc_set_reg(nandc, NAND_DEV_CMD1_RESTORE, nandc->cmd1);
nandc_set_reg(nandc, NAND_DEV_CMD_VLD_RESTORE, nandc->vld);
...
...
@@ -586,7 +586,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
nandc->buf_count = 512;
memset(nandc->data_buffer, 0xff, nandc->buf_count);
@@ -7
18,11 +1039
,12 @@
static int nandc_param(struct qcom_nand_
@@ -7
25,11 +1046
,12 @@
static int nandc_param(struct qcom_nand_
config_cw_read(nandc);
read_data_dma(nandc, FLASH_BUF_ACC, nandc->data_buffer,
...
...
@@ -602,7 +602,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
return 0;
}
@@ -7
33,6 +1055
,8 @@
static int erase_block(struct qcom_nand_
@@ -7
40,6 +1062
,8 @@
static int erase_block(struct qcom_nand_
struct nand_chip *chip = &host->chip;
struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
...
...
@@ -611,7 +611,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
nandc_set_reg(nandc, NAND_FLASH_CMD,
BLOCK_ERASE | PAGE_ACC | LAST_PAGE);
nandc_set_reg(nandc, NAND_ADDR0, page_addr);
@@ -7
44,14 +1068
,15 @@
static int erase_block(struct qcom_nand_
@@ -7
51,14 +1075
,15 @@
static int erase_block(struct qcom_nand_
nandc_set_reg(nandc, NAND_FLASH_STATUS, host->clrflashstatus);
nandc_set_reg(nandc, NAND_READ_STATUS, host->clrreadstatus);
...
...
@@ -633,7 +633,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
return 0;
}
@@ -7
65,16 +1090
,19 @@
static int read_id(struct qcom_nand_host
@@ -7
72,16 +1097
,19 @@
static int read_id(struct qcom_nand_host
if (column == -1)
return 0;
...
...
@@ -657,7 +657,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
return 0;
}
@@ -7
85,28 +1113
,108 @@
static int reset(struct qcom_nand_host *
@@ -7
92,28 +1120
,108 @@
static int reset(struct qcom_nand_host *
struct nand_chip *chip = &host->chip;
struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
...
...
@@ -771,7 +771,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
return 0;
}
@@ -8
17,7 +1225
,16 @@
static void free_descs(struct qcom_nand_
@@ -8
24,7 +1232
,16 @@
static void free_descs(struct qcom_nand_
list_for_each_entry_safe(desc, n, &nandc->desc_list, node) {
list_del(&desc->node);
...
...
@@ -789,7 +789,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
kfree(desc);
}
}
@@ -11
28,6 +1545
,9 @@
static int read_page_ecc(struct qcom_nan
@@ -11
35,6 +1552
,9 @@
static int read_page_ecc(struct qcom_nan
struct nand_ecc_ctrl *ecc = &chip->ecc;
int i, ret;
...
...
@@ -799,7 +799,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
/* queue cmd descs for each codeword */
for (i = 0; i < ecc->steps; i++) {
int data_size, oob_size;
@@ -114
1,11 +1561
,36 @@
static int read_page_ecc(struct qcom_nan
@@ -114
8,11 +1568
,36 @@
static int read_page_ecc(struct qcom_nan
oob_size = host->ecc_bytes_hw + host->spare_bytes;
}
...
...
@@ -838,7 +838,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
/*
* when ecc is enabled, the controller doesn't read the real
@@ -116
1,7 +1606
,7 @@
static int read_page_ecc(struct qcom_nan
@@ -116
8,7 +1613
,7 @@
static int read_page_ecc(struct qcom_nan
*oob_buf++ = 0xff;
read_data_dma(nandc, FLASH_BUF_ACC + data_size,
...
...
@@ -847,7 +847,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
}
if (data_buf)
@@ -120
0,10 +1645
,14 @@
static int copy_last_cw(struct qcom_nand
@@ -120
7,10 +1652
,14 @@
static int copy_last_cw(struct qcom_nand
set_address(host, host->cw_size * (ecc->steps - 1), page);
update_rw_regs(host, 1, true);
...
...
@@ -863,7 +863,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
ret = submit_descs(nandc);
if (ret)
@@ -12
26,6 +1675
,7 @@
static int qcom_nandc_read_page(struct m
@@ -12
33,6 +1682
,7 @@
static int qcom_nandc_read_page(struct m
data_buf = buf;
oob_buf = oob_required ? chip->oob_poi : NULL;
...
...
@@ -871,7 +871,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
ret = read_page_ecc(host, data_buf, oob_buf);
if (ret) {
dev_err(nandc->dev, "failure to read page\n");
@@ -12
45,13 +1695
,19 @@
static int qcom_nandc_read_page_raw(stru
@@ -12
52,13 +1702
,19 @@
static int qcom_nandc_read_page_raw(stru
u8 *data_buf, *oob_buf;
struct nand_ecc_ctrl *ecc = &chip->ecc;
int i, ret;
...
...
@@ -891,7 +891,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
for (i = 0; i < ecc->steps; i++) {
int data_size1, data_size2, oob_size1, oob_size2;
int reg_off = FLASH_BUF_ACC;
@@ -12
69,21 +1725
,49 @@
static int qcom_nandc_read_page_raw(stru
@@ -12
76,21 +1732
,49 @@
static int qcom_nandc_read_page_raw(stru
oob_size2 = host->ecc_bytes_hw + host->spare_bytes;
}
...
...
@@ -946,7 +946,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
oob_buf += oob_size2;
}
@@ -13
06,6 +1790
,7 @@
static int qcom_nandc_read_oob(struct mt
@@ -13
13,6 +1797
,7 @@
static int qcom_nandc_read_oob(struct mt
int ret;
clear_read_regs(nandc);
...
...
@@ -954,7 +954,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
host->use_ecc = true;
set_address(host, 0, page);
@@ -13
29,6 +1814
,7 @@
static int qcom_nandc_write_page(struct
@@ -13
36,6 +1821
,7 @@
static int qcom_nandc_write_page(struct
int i, ret;
clear_read_regs(nandc);
...
...
@@ -962,7 +962,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
data_buf = (u8 *)buf;
oob_buf = chip->oob_poi;
@@ -135
0,7 +1836
,8 @@
static int qcom_nandc_write_page(struct
@@ -135
7,7 +1843
,8 @@
static int qcom_nandc_write_page(struct
config_cw_write_pre(nandc);
...
...
@@ -972,7 +972,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
/*
* when ECC is enabled, we don't really need to write anything
@@ -13
63,7 +1850
,7 @@
static int qcom_nandc_write_page(struct
@@ -13
70,7 +1857
,7 @@
static int qcom_nandc_write_page(struct
oob_buf += host->bbm_size;
write_data_dma(nandc, FLASH_BUF_ACC + data_size,
...
...
@@ -981,7 +981,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
}
config_cw_write_post(nandc);
@@ -1
393,6 +1880
,7 @@
static int qcom_nandc_write_page_raw(str
@@ -1
400,6 +1887
,7 @@
static int qcom_nandc_write_page_raw(str
int i, ret;
clear_read_regs(nandc);
...
...
@@ -989,7 +989,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
data_buf = (u8 *)buf;
oob_buf = chip->oob_poi;
@@ -14
19,19 +1907
,22 @@
static int qcom_nandc_write_page_raw(str
@@ -14
26,19 +1914
,22 @@
static int qcom_nandc_write_page_raw(str
config_cw_write_pre(nandc);
...
...
@@ -1016,7 +1016,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
oob_buf += oob_size2;
config_cw_write_post(nandc);
@@ -14
67,6 +1958
,7 @@
static int qcom_nandc_write_oob(struct m
@@ -14
74,6 +1965
,7 @@
static int qcom_nandc_write_oob(struct m
host->use_ecc = true;
...
...
@@ -1024,7 +1024,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
ret = copy_last_cw(host, page);
if (ret)
return ret;
@@ -14
86,7 +1978
,7 @@
static int qcom_nandc_write_oob(struct m
@@ -14
93,7 +1985
,7 @@
static int qcom_nandc_write_oob(struct m
config_cw_write_pre(nandc);
write_data_dma(nandc, FLASH_BUF_ACC, nandc->data_buffer,
...
...
@@ -1033,7 +1033,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
config_cw_write_post(nandc);
ret = submit_descs(nandc);
@@ -15
24,6 +2016
,7 @@
static int qcom_nandc_block_bad(struct m
@@ -15
31,6 +2023
,7 @@
static int qcom_nandc_block_bad(struct m
*/
host->use_ecc = false;
...
...
@@ -1041,7 +1041,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
ret = copy_last_cw(host, page);
if (ret)
goto err;
@@ -15
54,6 +2047
,7 @@
static int qcom_nandc_block_markbad(stru
@@ -15
61,6 +2054
,7 @@
static int qcom_nandc_block_markbad(stru
int page, ret, status = 0;
clear_read_regs(nandc);
...
...
@@ -1049,7 +1049,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
/*
* to mark the BBM as bad, we flash the entire last codeword with 0s.
@@ -157
0,7 +2064
,8 @@
static int qcom_nandc_block_markbad(stru
@@ -157
7,7 +2071
,8 @@
static int qcom_nandc_block_markbad(stru
update_rw_regs(host, 1, false);
config_cw_write_pre(nandc);
...
...
@@ -1059,7 +1059,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
config_cw_write_post(nandc);
ret = submit_descs(nandc);
@@ -193
0,6 +2425
,8 @@
static int qcom_nand_host_setup(struct q
@@ -193
7,6 +2432
,8 @@
static int qcom_nand_host_setup(struct q
host->clrflashstatus = FS_READY_BSY_N;
host->clrreadstatus = 0xc0;
...
...
@@ -1068,7 +1068,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
dev_dbg(nandc->dev,
"cfg0 %x cfg1 %x ecc_buf_cfg %x ecc_bch cfg %x cw_size %d cw_data %d strength %d parity_bytes %d steps %d\n",
@@ -20
08,6 +2505
,12 @@
static int qcom_nandc_alloc(struct qcom_
@@ -20
15,6 +2512
,12 @@
static int qcom_nandc_alloc(struct qcom_
dev_err(nandc->dev, "failed to request cmd channel\n");
return -ENODEV;
}
...
...
@@ -1081,7 +1081,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
}
INIT_LIST_HEAD(&nandc->desc_list);
@@ -20
43,6 +2546
,9 @@
static void qcom_nandc_unalloc(struct qc
@@ -20
50,6 +2553
,9 @@
static void qcom_nandc_unalloc(struct qc
devm_kfree(nandc->dev, nandc->reg_read_buf);
}
...
...
@@ -1091,7 +1091,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
if (nandc->regs)
devm_kfree(nandc->dev, nandc->regs);
@@ -20
53,11 +2559,18
@@
static void qcom_nandc_unalloc(struct qc
@@ -20
60,12 +2566,19
@@
static void qcom_nandc_unalloc(struct qc
/* one time setup of a few nand controller registers */
static int qcom_nandc_setup(struct qcom_nand_controller *nandc)
{
...
...
@@ -1099,6 +1099,7 @@ Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
+
/* kill onenand */
nandc_write(nandc, SFLASHC_BURST_CFG, 0);
nandc_write(nandc, NAND_DEV_CMD_VLD, NAND_DEV_CMD_VLD_VAL);
- /* enable ADM DMA */
- nandc_write(nandc, NAND_FLASH_CHIP_SELECT, DM_EN);
...
...
编辑
预览
Markdown
is supported
0%
请重试
或
添加新附件
.
添加附件
取消
You are about to add
0
people
to the discussion. Proceed with caution.
先完成此消息的编辑!
取消
想要评论请
注册
或
登录