Merge pull request #581 from imbrolla/master

fix tp-link 941nv7

target/linux/ar71xx/config-4.14

@@ -239,7 +239,7 @@ CONFIG_ATH79=y
 # CONFIG_ATH79_MACH_TL_WR940N_V4 is not set
 # CONFIG_ATH79_MACH_TL_WR941ND is not set
 # CONFIG_ATH79_MACH_TL_WR941ND_V6 is not set
-# CONFIG_ATH79_MACH_TL_WR941N_V7 is not set
+CONFIG_ATH79_MACH_TL_WR941N_V7=y
 # CONFIG_ATH79_MACH_TL_WR942N_V1 is not set
 # CONFIG_ATH79_MACH_TS_D084 is not set
 # CONFIG_ATH79_MACH_TUBE2H is not set

target/linux/ar71xx/config-4.9

@@ -239,7 +239,7 @@ CONFIG_ATH79=y
 # CONFIG_ATH79_MACH_TL_WR940N_V4 is not set
 # CONFIG_ATH79_MACH_TL_WR941ND is not set
 # CONFIG_ATH79_MACH_TL_WR941ND_V6 is not set
-# CONFIG_ATH79_MACH_TL_WR941N_V7 is not set
+CONFIG_ATH79_MACH_TL_WR941N_V7=y
 # CONFIG_ATH79_MACH_TL_WR942N_V1 is not set
 # CONFIG_ATH79_MACH_TS_D084 is not set
 # CONFIG_ATH79_MACH_TUBE2H is not set

target/linux/ar71xx/image/generic-tp-link.mk

@@ -511,3 +511,12 @@ define Device/tl-wr942n-v1
   SUPPORTED_DEVICES := tl-wr942n-v1
 endef
 TARGET_DEVICES += tl-wr942n-v1
+
+define Device/tl-wr941n-v7
+  $(Device/tplink-8mlzma)
+  DEVICE_TITLE := TP-LINK TL-WR941N/ND v7
+  BOARDNAME := TL-WR941N-v7
+  DEVICE_PROFILE := TLWR941
+  TPLINK_HWID := 0x09410007
+endef
+TARGET_DEVICES += tl-wr941n-v7

target/linux/ar71xx/patches-4.14/601-MIPS-ath79-add-more-register-defines.patch

@@ -217,7 +217,7 @@
  #define AR71XX_GPIO_COUNT		16
  #define AR7240_GPIO_COUNT		18
  #define AR7241_GPIO_COUNT		20
-@@ -570,4 +681,235 @@
+@@ -570,4 +681,237 @@
  #define AR934X_SRIF_DPLL2_OUTDIV_SHIFT	13
  #define AR934X_SRIF_DPLL2_OUTDIV_MASK	0x7
  
@@ -433,6 +433,8 @@
 +#define QCA955X_GMAC_REG_ETH_CFG	0x00
 +
 +#define QCA955X_ETH_CFG_RGMII_EN	BIT(0)
++#define QCA955X_ETH_CFG_GE0_MII_EN	BIT(1)
++#define QCA955X_ETH_CFG_GE0_MII_SLAVE	BIT(4)
 +#define QCA955X_ETH_CFG_MII_GE0		BIT(1)
 +#define QCA955X_ETH_CFG_GMII_GE0	BIT(2)
 +#define QCA955X_ETH_CFG_MII_GE0_MASTER	BIT(3)

target/linux/ar71xx/patches-4.9/601-MIPS-ath79-add-more-register-defines.patch

@@ -217,7 +217,7 @@
  #define AR71XX_GPIO_COUNT		16
  #define AR7240_GPIO_COUNT		18
  #define AR7241_GPIO_COUNT		20
-@@ -570,4 +681,235 @@
+@@ -570,4 +681,237 @@
  #define AR934X_SRIF_DPLL2_OUTDIV_SHIFT	13
  #define AR934X_SRIF_DPLL2_OUTDIV_MASK	0x7
  
@@ -433,6 +433,8 @@
 +#define QCA955X_GMAC_REG_ETH_CFG	0x00
 +
 +#define QCA955X_ETH_CFG_RGMII_EN	BIT(0)
++#define QCA955X_ETH_CFG_GE0_MII_EN	BIT(1)
++#define QCA955X_ETH_CFG_GE0_MII_SLAVE	BIT(4)
 +#define QCA955X_ETH_CFG_MII_GE0		BIT(1)
 +#define QCA955X_ETH_CFG_GMII_GE0	BIT(2)
 +#define QCA955X_ETH_CFG_MII_GE0_MASTER	BIT(3)