- 14 6月, 2017 2 次提交
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由 Joey Babcock 提交于
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由 Arvind Ravulavaru 提交于
* added OTA Update S3 example with a sample bin * Update as per comments
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- 04 6月, 2017 3 次提交
- 03 6月, 2017 1 次提交
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由 Fabian Affolter 提交于
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- 02 6月, 2017 3 次提交
- 29 5月, 2017 2 次提交
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- 23 5月, 2017 2 次提交
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由 bbx10 提交于
WiFiTelnetToSerial is also a test for hasClient().
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- 22 5月, 2017 6 次提交
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由 me-no-dev 提交于
This needs proper testing! Fixes: https://github.com/espressif/arduino-esp32/issues/353
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由 me-no-dev 提交于
- call esp_wifi_start() - separate tcp initialization to prepare for Ethernet - setup dhcp addresses when using custom IP config for SoftAP
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由 me-no-dev 提交于
Thanks @miomir1981
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由 bbx10 提交于
* Add setNoDelay and getNoDelay to WiFiServer class * Remote TCP disconnect not detected
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- 19 5月, 2017 2 次提交
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由 copercini 提交于
* Fix possible infinite loop in the example * Remove workaround of sockets always return -76 Remove workaround of sockets always return -76 (because it's fixed on IDF now) Remove delay during handshake (improving stability) * Remove unusable mbedtls_net of context creation * Fix bad destructor * Compatibility with WiFiClient for HTTPClient * Initial port from ESP8266 Changed SHA1 fingerprint by Root CA verification Changed log system * Remove deprecated function
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由 Max 提交于
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- 16 5月, 2017 4 次提交
- 13 5月, 2017 1 次提交
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由 Max 提交于
Board from AI-Thinker
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- 12 5月, 2017 1 次提交
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由 MangoGeek 提交于
* add support for widora-air board * change widora-air f_cpu error,from 400M to 240M
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- 09 5月, 2017 1 次提交
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由 Limor "Ladyada" Fried 提交于
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- 08 5月, 2017 1 次提交
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由 WEMOS Electronics 提交于
* Add ESP.getChipId() function to get ESP32's ChipID. * change getChipId() to getEfuseMac() * * Change board:Lolin32 to LOLIN32 * Update LED_BUILTIN pin for LOLIN32
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- 07 5月, 2017 1 次提交
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由 Me No Dev 提交于
* Update IDF to 65acd99 * Update platformio and arduino build paths and libs * Update esptool binaries
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- 06 5月, 2017 5 次提交
- 05 5月, 2017 3 次提交
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由 WEMOS Electronics 提交于
* Add ESP.getChipId() function to get ESP32's ChipID. * change getChipId() to getEfuseMac()
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由 Severin Smith 提交于
It appears that the configurations for `ck_out_edge` were inverted for `SPI_MODE2` and `SPI_MODE3`. You can check the technical reference manual on page 76, table 23 "Clock Polarity and Phase, and Corresponding SPI Register Values for SPI Master". I've check with my oscilloscope that the current configuration is wrong and this fix corrects the issue.
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由 tzxespressio 提交于
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- 28 4月, 2017 1 次提交
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由 Martin Sloup 提交于
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- 22 4月, 2017 1 次提交
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由 Ahmed Talaat 提交于
fixing github url.
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