Skip to content
体验新版
项目
组织
正在加载...
登录
切换导航
打开侧边栏
RT-Thread
rt-thread
提交
bff97ce2
R
rt-thread
项目概览
RT-Thread
/
rt-thread
9 个月 前同步成功
通知
752
Star
8909
Fork
4735
代码
文件
提交
分支
Tags
贡献者
分支图
Diff
Issue
0
列表
看板
标记
里程碑
合并请求
0
DevOps
流水线
流水线任务
计划
Wiki
0
Wiki
分析
仓库
DevOps
项目成员
Pages
R
rt-thread
项目概览
项目概览
详情
发布
仓库
仓库
文件
提交
分支
标签
贡献者
分支图
比较
Issue
0
Issue
0
列表
看板
标记
里程碑
合并请求
0
合并请求
0
Pages
DevOps
DevOps
流水线
流水线任务
计划
分析
分析
仓库分析
DevOps
Wiki
0
Wiki
成员
成员
收起侧边栏
关闭侧边栏
动态
分支图
创建新Issue
流水线任务
提交
Issue看板
前往新版Gitcode,体验更适合开发者的 AI 搜索 >>
提交
bff97ce2
编写于
8月 31, 2022
作者:
鹅福哥
提交者:
guo
9月 02, 2022
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
修正bsp中.c/.h中的格式以及多余的末尾空格
上级
75133af2
变更
53
隐藏空白更改
内联
并排
Showing
53 changed file
with
305 addition
and
298 deletion
+305
-298
bsp/mm32/libraries/HAL_Drivers/config/mm32f3277g8p/dma_config.h
...32/libraries/HAL_Drivers/config/mm32f3277g8p/dma_config.h
+3
-3
bsp/mm32/libraries/HAL_Drivers/config/mm32f3277g8p/spi_config.h
...32/libraries/HAL_Drivers/config/mm32f3277g8p/spi_config.h
+6
-6
bsp/mm32/libraries/HAL_Drivers/config/mm32f3277g8p/uart_config.h
...2/libraries/HAL_Drivers/config/mm32f3277g8p/uart_config.h
+3
-3
bsp/mm32/libraries/HAL_Drivers/drv_common.c
bsp/mm32/libraries/HAL_Drivers/drv_common.c
+1
-1
bsp/mm32/libraries/HAL_Drivers/drv_dma.h
bsp/mm32/libraries/HAL_Drivers/drv_dma.h
+3
-3
bsp/mm32/libraries/HAL_Drivers/drv_gpio.c
bsp/mm32/libraries/HAL_Drivers/drv_gpio.c
+3
-3
bsp/mm32/libraries/HAL_Drivers/drv_spi.c
bsp/mm32/libraries/HAL_Drivers/drv_spi.c
+11
-11
bsp/mm32/libraries/HAL_Drivers/drv_spi.h
bsp/mm32/libraries/HAL_Drivers/drv_spi.h
+4
-4
bsp/mm32/libraries/HAL_Drivers/drv_uart.c
bsp/mm32/libraries/HAL_Drivers/drv_uart.c
+3
-3
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/arm_common_tables.h
...libraries/MM32F3270_HAL/CMSIS/Include/arm_common_tables.h
+65
-65
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/arm_math.h
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/arm_math.h
+4
-4
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/cmsis_armcc.h
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/cmsis_armcc.h
+3
-3
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/cmsis_armclang.h
...32/libraries/MM32F3270_HAL/CMSIS/Include/cmsis_armclang.h
+2
-2
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/cmsis_armclang_ltm.h
...ibraries/MM32F3270_HAL/CMSIS/Include/cmsis_armclang_ltm.h
+2
-2
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/cmsis_gcc.h
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/cmsis_gcc.h
+12
-12
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/cmsis_iccarm.h
...mm32/libraries/MM32F3270_HAL/CMSIS/Include/cmsis_iccarm.h
+1
-1
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_armv81mml.h
...32/libraries/MM32F3270_HAL/CMSIS/Include/core_armv81mml.h
+9
-9
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_cm0.h
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_cm0.h
+1
-1
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_cm0plus.h
...mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_cm0plus.h
+1
-1
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_cm1.h
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_cm1.h
+1
-1
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_cm23.h
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_cm23.h
+3
-3
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_cm33.h
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_cm33.h
+2
-2
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_cm35p.h
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_cm35p.h
+2
-2
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_cm7.h
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_cm7.h
+6
-6
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/mpu_armv7.h
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/mpu_armv7.h
+15
-15
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/mpu_armv8.h
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/mpu_armv8.h
+16
-16
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/tz_context.h
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/tz_context.h
+9
-9
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_common.h
...aries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_common.h
+2
-1
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_dac.h
...ibraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_dac.h
+23
-22
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_iwdg.h
...braries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_iwdg.h
+4
-4
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_spi.h
...ibraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_spi.h
+2
-1
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_tim_16b.h
...ries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_tim_16b.h
+9
-9
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_tim_32b.h
...ries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_tim_32b.h
+7
-7
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_tim_adv.h
...ries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_tim_adv.h
+14
-14
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_tim_basic.h
...es/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_tim_basic.h
+4
-4
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_usb.h
...ibraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_usb.h
+1
-1
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_dac.c
...ibraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_dac.c
+3
-2
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_dma.c
...ibraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_dma.c
+5
-5
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_exti.c
...braries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_exti.c
+3
-2
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_fsmc.c
...braries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_fsmc.c
+4
-3
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_i2c.c
...ibraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_i2c.c
+2
-2
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_iwdg.c
...braries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_iwdg.c
+4
-4
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_rtc.c
...ibraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_rtc.c
+3
-3
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_spi.c
...ibraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_spi.c
+2
-1
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_tim_16b.c
...ries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_tim_16b.c
+1
-1
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_tim_32b.c
...ries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_tim_32b.c
+1
-1
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_tim_adv.c
...ries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_tim_adv.c
+4
-4
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_tim_basic.c
...es/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_tim_basic.c
+2
-2
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_usb.c
...ibraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_usb.c
+1
-1
bsp/mm32/mm32f3270-100ask-pitaya/applications/main.c
bsp/mm32/mm32f3270-100ask-pitaya/applications/main.c
+1
-1
bsp/mm32/mm32f3270-100ask-pitaya/board/board.c
bsp/mm32/mm32f3270-100ask-pitaya/board/board.c
+8
-8
bsp/mm32/mm32f3270-100ask-pitaya/board/board.h
bsp/mm32/mm32f3270-100ask-pitaya/board/board.h
+1
-1
bsp/mm32/mm32f3270-100ask-pitaya/board/mm32f3277g8p_msp.c
bsp/mm32/mm32f3270-100ask-pitaya/board/mm32f3277g8p_msp.c
+3
-3
未找到文件。
bsp/mm32/libraries/HAL_Drivers/config/mm32f3277g8p/dma_config.h
浏览文件 @
bff97ce2
/**
* @file dma_config.h
* @author 100ask development team
* @brief
* @brief
* @version 0.1
* @date 2022-06-16
*
*
* @copyright Copyright (c) 2022 Chongqing 100ASK Technology Co., LTD
*
*
*/
#ifndef __DMA_CONFIG_H__
...
...
bsp/mm32/libraries/HAL_Drivers/config/mm32f3277g8p/spi_config.h
浏览文件 @
bff97ce2
/**
* @file spi_config.h
* @author 100ask development team
* @brief
* @brief
* @version 0.1
* @date 2022-06-16
*
*
* @copyright Copyright (c) 2022 Chongqing 100ASK Technology Co., LTD
*
*
*/
...
...
@@ -28,7 +28,7 @@ extern "C" {
}
#endif
/* SPI1_BUS_CONFIG */
#endif
/* BSP_USING_SPI1 */
#ifdef BSP_SPI1_TX_USING_DMA
#ifndef SPI1_TX_DMA_CONFIG
#define SPI1_TX_DMA_CONFIG \
...
...
@@ -61,7 +61,7 @@ extern "C" {
}
#endif
/* SPI2_BUS_CONFIG */
#endif
/* BSP_USING_SPI2 */
#ifdef BSP_SPI2_TX_USING_DMA
#ifndef SPI2_TX_DMA_CONFIG
#define SPI2_TX_DMA_CONFIG \
...
...
@@ -93,7 +93,7 @@ extern "C" {
}
#endif
/* SPI3_BUS_CONFIG */
#endif
/* BSP_USING_SPI3 */
#ifdef BSP_SPI3_TX_USING_DMA
#ifndef SPI3_TX_DMA_CONFIG
#define SPI3_TX_DMA_CONFIG \
...
...
bsp/mm32/libraries/HAL_Drivers/config/mm32f3277g8p/uart_config.h
浏览文件 @
bff97ce2
...
...
@@ -69,7 +69,7 @@ extern "C" {
}
#endif
/* UART5_CONFIG */
#endif
/* BSP_USING_UART5 */
#if defined(BSP_USING_UART6)
#ifndef UART6_CONFIG
#define UART6_CONFIG \
...
...
@@ -80,7 +80,7 @@ extern "C" {
}
#endif
/* UART5_CONFIG */
#endif
/* BSP_USING_UART5 */
#if defined(BSP_USING_UART7)
#ifndef UART7_CONFIG
#define UART7_CONFIG \
...
...
@@ -91,7 +91,7 @@ extern "C" {
}
#endif
/* UART5_CONFIG */
#endif
/* BSP_USING_UART5 */
#if defined(BSP_USING_UART8)
#ifndef UART8_CONFIG
#define UART8_CONFIG \
...
...
bsp/mm32/libraries/HAL_Drivers/drv_common.c
浏览文件 @
bff97ce2
...
...
@@ -135,7 +135,7 @@ RT_WEAK void rt_hw_board_init()
/* System clock initialization */
SystemClock_Config
();
rt_hw_systick_init
();
/* Heap initialization */
...
...
bsp/mm32/libraries/HAL_Drivers/drv_dma.h
浏览文件 @
bff97ce2
/**
* @file drv_dma.h
* @author 100ask development team
* @brief
* @brief
* @version 0.1
* @date 2022-06-16
*
*
* @copyright Copyright (c) 2022 Chongqing 100ASK Technology Co., LTD
*
*
*/
#ifndef __DRV_DMA_H_
...
...
bsp/mm32/libraries/HAL_Drivers/drv_gpio.c
浏览文件 @
bff97ce2
...
...
@@ -38,7 +38,7 @@
#define PIN_STPORT_MAX __MM32_PORT_MAX
#define GET_EXTI_PORT(PORT)
#define GET_EXTI_PORT(PORT)
static
const
struct
pin_irq_map
pin_irq_map
[]
=
{
...
...
@@ -323,7 +323,7 @@ static rt_err_t mm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
GPIO_InitStruct
.
Speed
=
GPIO_Speed_50MHz
;
GPIO_InitStruct
.
PinMode
=
GPIO_PinMode_In_PullUp
;
GPIO_Init
(
PIN_STPORT
(
pin
),
&
GPIO_InitStruct
);
SYSCFG_SetExtIntMux
(
SYSCFG_EXTIPort_GPIOA
+
(
0
==
(
rt_uint32_t
)
PIN_PORT
(
pin
)
?
0
:
PIN_PORT
(
pin
)
/
GPIOB_BASE
),
irqmap
->
syscfg_extiline
);
switch
(
pin_irq_hdr_tab
[
irqindex
].
mode
)
{
...
...
@@ -338,7 +338,7 @@ static rt_err_t mm32_pin_irq_enable(struct rt_device *device, rt_base_t pin,
break
;
}
EXTI_EnableLineInterrupt
(
EXTI
,
irqmap
->
extiline
,
true
);
NVIC_SetPriority
(
irqmap
->
irqno
,
NVIC_EncodePriority
(
4
,
5
,
0
));
NVIC_EnableIRQ
(
irqmap
->
irqno
);
pin_irq_enable_mask
|=
irqmap
->
pinbit
;
...
...
bsp/mm32/libraries/HAL_Drivers/drv_spi.c
浏览文件 @
bff97ce2
/**
* @file drv_spi.c
* @author 100ask development team
* @brief
* @brief
* @version 0.1
* @date 2022-06-16
*
*
* @copyright Copyright (c) 2022 Chongqing 100ASK Technology Co., LTD
*
*
*/
#include <rtthread.h>
...
...
@@ -148,7 +148,7 @@ static rt_err_t mm32_spi_init(struct mm32_spi *spi_drv, struct rt_spi_configurat
spi_drv
->
config
->
dma_rx
->
dma_rcc
,
\
spi_drv
->
dma
.
rx_buf_len
,
\
spi_drv
->
dma
.
rx_buf
);
if
(
ret
==
-
1
)
if
(
ret
==
-
1
)
{
LOG_D
(
"%s init DMA failed.
\r\n
"
,
spi_drv
->
config
->
bus_name
);
return
RT_ERROR
;
...
...
@@ -162,10 +162,10 @@ static rt_err_t mm32_spi_init(struct mm32_spi *spi_drv, struct rt_spi_configurat
spi_drv
->
config
->
dma_tx
->
Instance
,
\
spi_drv
->
config
->
dma_tx
->
dma_req
,
\
spi_drv
->
config
->
dma_tx
->
dma_irq
,
\
spi_drv
->
config
->
dma_tx
->
dma_rcc
,
spi_drv
->
config
->
dma_tx
->
dma_rcc
,
spi_drv
->
dma
.
tx_buf_len
,
\
spi_drv
->
dma
.
tx_buf
);
if
(
ret
==
-
1
)
if
(
ret
==
-
1
)
{
LOG_D
(
"%s init DMA failed.
\r\n
"
,
spi_drv
->
config
->
bus_name
);
return
RT_ERROR
;
...
...
@@ -229,7 +229,7 @@ static rt_uint32_t spixfer(struct rt_spi_device *device, struct rt_spi_message *
already_send_length
=
message
->
length
-
send_length
-
message_length
;
send_buf
=
(
rt_uint8_t
*
)
message
->
send_buf
+
already_send_length
;
recv_buf
=
(
rt_uint8_t
*
)
message
->
recv_buf
+
already_send_length
;
/* start once data exchange in DMA mode */
if
(
message
->
send_buf
&&
message
->
recv_buf
)
{
...
...
@@ -796,23 +796,23 @@ static void mm32_get_dma_info(void)
}
#if defined(SOC_SERIES_STM32F0)
void
SPI1_DMA_RX_TX_IRQHandler
(
void
)
void
SPI1_DMA_RX_TX_IRQHandler
(
void
)
{
#if defined(BSP_USING_SPI1) && defined(BSP_SPI1_TX_USING_DMA)
SPI1_DMA_TX_IRQHandler
();
#endif
#if defined(BSP_USING_SPI1) && defined(BSP_SPI1_RX_USING_DMA)
SPI1_DMA_RX_IRQHandler
();
#endif
}
void
SPI2_DMA_RX_TX_IRQHandler
(
void
)
void
SPI2_DMA_RX_TX_IRQHandler
(
void
)
{
#if defined(BSP_USING_SPI2) && defined(BSP_SPI2_TX_USING_DMA)
SPI2_DMA_TX_IRQHandler
();
#endif
#if defined(BSP_USING_SPI2) && defined(BSP_SPI2_RX_USING_DMA)
SPI2_DMA_RX_IRQHandler
();
#endif
...
...
bsp/mm32/libraries/HAL_Drivers/drv_spi.h
浏览文件 @
bff97ce2
/**
* @file drv_spi.h
* @author 100ask development team
* @brief
* @brief
* @version 0.1
* @date 2022-06-16
*
*
* @copyright Copyright (c) 2022 Chongqing 100ASK Technology Co., LTD
*
*
*/
#ifndef __DRV_SPI_H_
...
...
@@ -59,7 +59,7 @@ struct mm32_spi
rt_uint8_t
*
tx_buf
;
DMA_Channel_Init_Type
handle_tx
;
}
dma
;
rt_uint8_t
spi_dma_flag
;
struct
rt_spi_bus
spi_bus
;
};
...
...
bsp/mm32/libraries/HAL_Drivers/drv_uart.c
浏览文件 @
bff97ce2
...
...
@@ -218,12 +218,12 @@ static rt_err_t mm32_control(struct rt_serial_device *serial, int cmd, void *arg
#ifdef RT_SERIAL_USING_DMA
case
RT_DEVICE_CTRL_CONFIG
:
break
;
#endif
case
RT_DEVICE_CTRL_CLOSE
:
break
;
}
...
...
@@ -338,7 +338,7 @@ static void uart_isr(struct rt_serial_device *serial)
{
__HAL_UART_CLEAR_FLAG
(
uart
->
config
->
Instance
,
UART_STATUS_TX_EMPTY
);
}
if
(
__HAL_UART_GET_INT_FLAG
(
uart
->
config
->
Instance
,
UART_INT_RX_DONE
)
!=
0
)
{
__HAL_UART_CLEAR_INT_FLAG
(
uart
->
config
->
Instance
,
UART_INT_RX_DONE
);
...
...
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/arm_common_tables.h
浏览文件 @
bff97ce2
...
...
@@ -31,7 +31,7 @@
#include "arm_math.h"
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_ALLOW_TABLES)
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREV_1024)
extern
const
uint16_t
armBitRevTable
[
1024
];
...
...
@@ -40,234 +40,234 @@
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_16)
extern
const
float32_t
twiddleCoef_16
[
32
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_32)
extern
const
float32_t
twiddleCoef_32
[
64
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_64)
extern
const
float32_t
twiddleCoef_64
[
128
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_128)
extern
const
float32_t
twiddleCoef_128
[
256
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_256)
extern
const
float32_t
twiddleCoef_256
[
512
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_512)
extern
const
float32_t
twiddleCoef_512
[
1024
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_1024)
extern
const
float32_t
twiddleCoef_1024
[
2048
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_2048)
extern
const
float32_t
twiddleCoef_2048
[
4096
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_F32_4096)
extern
const
float32_t
twiddleCoef_4096
[
8192
];
#define twiddleCoef twiddleCoef_4096
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_16)
extern
const
q31_t
twiddleCoef_16_q31
[
24
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_32)
extern
const
q31_t
twiddleCoef_32_q31
[
48
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_64)
extern
const
q31_t
twiddleCoef_64_q31
[
96
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_128)
extern
const
q31_t
twiddleCoef_128_q31
[
192
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_256)
extern
const
q31_t
twiddleCoef_256_q31
[
384
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_512)
extern
const
q31_t
twiddleCoef_512_q31
[
768
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_1024)
extern
const
q31_t
twiddleCoef_1024_q31
[
1536
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_2048)
extern
const
q31_t
twiddleCoef_2048_q31
[
3072
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q31_4096)
extern
const
q31_t
twiddleCoef_4096_q31
[
6144
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_16)
extern
const
q15_t
twiddleCoef_16_q15
[
24
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_32)
extern
const
q15_t
twiddleCoef_32_q15
[
48
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_64)
extern
const
q15_t
twiddleCoef_64_q15
[
96
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_128)
extern
const
q15_t
twiddleCoef_128_q15
[
192
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_256)
extern
const
q15_t
twiddleCoef_256_q15
[
384
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_512)
extern
const
q15_t
twiddleCoef_512_q15
[
768
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_1024)
extern
const
q15_t
twiddleCoef_1024_q15
[
1536
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_2048)
extern
const
q15_t
twiddleCoef_2048_q15
[
3072
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_Q15_4096)
extern
const
q15_t
twiddleCoef_4096_q15
[
6144
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_32)
extern
const
float32_t
twiddleCoef_rfft_32
[
32
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_64)
extern
const
float32_t
twiddleCoef_rfft_64
[
64
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_128)
extern
const
float32_t
twiddleCoef_rfft_128
[
128
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_256)
extern
const
float32_t
twiddleCoef_rfft_256
[
256
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_512)
extern
const
float32_t
twiddleCoef_rfft_512
[
512
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_1024)
extern
const
float32_t
twiddleCoef_rfft_1024
[
1024
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_2048)
extern
const
float32_t
twiddleCoef_rfft_2048
[
2048
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_TWIDDLECOEF_RFFT_F32_4096)
extern
const
float32_t
twiddleCoef_rfft_4096
[
4096
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
/* floating-point bit reversal tables */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_16)
#define ARMBITREVINDEXTABLE_16_TABLE_LENGTH ((uint16_t)20)
extern
const
uint16_t
armBitRevIndexTable16
[
ARMBITREVINDEXTABLE_16_TABLE_LENGTH
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_32)
#define ARMBITREVINDEXTABLE_32_TABLE_LENGTH ((uint16_t)48)
extern
const
uint16_t
armBitRevIndexTable32
[
ARMBITREVINDEXTABLE_32_TABLE_LENGTH
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_64)
#define ARMBITREVINDEXTABLE_64_TABLE_LENGTH ((uint16_t)56)
extern
const
uint16_t
armBitRevIndexTable64
[
ARMBITREVINDEXTABLE_64_TABLE_LENGTH
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_128)
#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208)
extern
const
uint16_t
armBitRevIndexTable128
[
ARMBITREVINDEXTABLE_128_TABLE_LENGTH
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_256)
#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440)
extern
const
uint16_t
armBitRevIndexTable256
[
ARMBITREVINDEXTABLE_256_TABLE_LENGTH
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_512)
#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448)
extern
const
uint16_t
armBitRevIndexTable512
[
ARMBITREVINDEXTABLE_512_TABLE_LENGTH
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_1024)
#define ARMBITREVINDEXTABLE_1024_TABLE_LENGTH ((uint16_t)1800)
extern
const
uint16_t
armBitRevIndexTable1024
[
ARMBITREVINDEXTABLE_1024_TABLE_LENGTH
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_2048)
#define ARMBITREVINDEXTABLE_2048_TABLE_LENGTH ((uint16_t)3808)
extern
const
uint16_t
armBitRevIndexTable2048
[
ARMBITREVINDEXTABLE_2048_TABLE_LENGTH
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FLT_4096)
#define ARMBITREVINDEXTABLE_4096_TABLE_LENGTH ((uint16_t)4032)
extern
const
uint16_t
armBitRevIndexTable4096
[
ARMBITREVINDEXTABLE_4096_TABLE_LENGTH
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
/* fixed-point bit reversal tables */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_16)
#define ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH ((uint16_t)12)
extern
const
uint16_t
armBitRevIndexTable_fixed_16
[
ARMBITREVINDEXTABLE_FIXED_16_TABLE_LENGTH
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_32)
#define ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH ((uint16_t)24)
extern
const
uint16_t
armBitRevIndexTable_fixed_32
[
ARMBITREVINDEXTABLE_FIXED_32_TABLE_LENGTH
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_64)
#define ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH ((uint16_t)56)
extern
const
uint16_t
armBitRevIndexTable_fixed_64
[
ARMBITREVINDEXTABLE_FIXED_64_TABLE_LENGTH
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_128)
#define ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH ((uint16_t)112)
extern
const
uint16_t
armBitRevIndexTable_fixed_128
[
ARMBITREVINDEXTABLE_FIXED_128_TABLE_LENGTH
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_256)
#define ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH ((uint16_t)240)
extern
const
uint16_t
armBitRevIndexTable_fixed_256
[
ARMBITREVINDEXTABLE_FIXED_256_TABLE_LENGTH
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_512)
#define ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH ((uint16_t)480)
extern
const
uint16_t
armBitRevIndexTable_fixed_512
[
ARMBITREVINDEXTABLE_FIXED_512_TABLE_LENGTH
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_1024)
#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992)
extern
const
uint16_t
armBitRevIndexTable_fixed_1024
[
ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_2048)
#define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
extern
const
uint16_t
armBitRevIndexTable_fixed_2048
[
ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_BITREVIDX_FXT_4096)
#define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
extern
const
uint16_t
armBitRevIndexTable_fixed_4096
[
ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH
];
...
...
@@ -328,26 +328,26 @@
extern
const
q15_t
cos_factorsQ15_8192
[
8192
];
#endif
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_128)
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_128)
extern
const
q31_t
WeightsQ31_128
[
256
];
extern
const
q31_t
cos_factorsQ31_128
[
128
];
#endif
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_512)
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_512)
extern
const
q31_t
WeightsQ31_512
[
1024
];
extern
const
q31_t
cos_factorsQ31_512
[
512
];
#endif
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_2048)
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_2048)
extern
const
q31_t
WeightsQ31_2048
[
4096
];
extern
const
q31_t
cos_factorsQ31_2048
[
2048
];
#endif
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_8192)
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FFT_TABLES) || defined(ARM_TABLE_DCT4_Q31_8192)
extern
const
q31_t
WeightsQ31_8192
[
16384
];
extern
const
q31_t
cos_factorsQ31_8192
[
8192
];
#endif
#endif
/* if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FFT_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_FAST_ALLOW_TABLES)
...
...
@@ -355,20 +355,20 @@
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q15)
extern
const
q15_t
armRecipTableQ15
[
64
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_RECIP_Q31)
extern
const
q31_t
armRecipTableQ31
[
64
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
/* Tables for Fast Math Sine and Cosine */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_F32)
extern
const
float32_t
sinTable_f32
[
FAST_MATH_TABLE_SIZE
+
1
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q31)
extern
const
q31_t
sinTable_q31
[
FAST_MATH_TABLE_SIZE
+
1
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
#if !defined(ARM_DSP_CONFIG_TABLES) || defined(ARM_ALL_FAST_TABLES) || defined(ARM_TABLE_SIN_Q15)
extern
const
q15_t
sinTable_q15
[
FAST_MATH_TABLE_SIZE
+
1
];
#endif
/* !defined(ARM_DSP_CONFIG_TABLES) defined(ARM_ALL_FAST_TABLES) */
...
...
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/arm_math.h
浏览文件 @
bff97ce2
...
...
@@ -119,12 +119,12 @@
* - ARM_MATH_NEON:
*
* Define macro ARM_MATH_NEON to enable Neon versions of the DSP functions.
* It is not enabled by default when Neon is available because performances are
* It is not enabled by default when Neon is available because performances are
* dependent on the compiler and target architecture.
*
* - ARM_MATH_NEON_EXPERIMENTAL:
*
* Define macro ARM_MATH_NEON_EXPERIMENTAL to enable experimental Neon versions of
* Define macro ARM_MATH_NEON_EXPERIMENTAL to enable experimental Neon versions of
* of some DSP functions. Experimental Neon versions currently do not have better
* performances than the scalar versions.
*
...
...
@@ -314,7 +314,7 @@
#define __ALIGNED(x) __declspec(align(x))
#define LOW_OPTIMIZATION_ENTER
#define LOW_OPTIMIZATION_EXIT
#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
#define IAR_ONLY_LOW_OPTIMIZATION_ENTER
#define IAR_ONLY_LOW_OPTIMIZATION_EXIT
#endif
...
...
@@ -3818,7 +3818,7 @@ arm_status arm_fir_decimate_init_f32(
uint32_t
blockSize
);
#if defined(ARM_MATH_NEON)
#if defined(ARM_MATH_NEON)
void
arm_biquad_cascade_df2T_compute_coefs_f32
(
arm_biquad_cascade_df2T_instance_f32
*
S
,
uint8_t
numStages
,
...
...
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/cmsis_armcc.h
浏览文件 @
bff97ce2
...
...
@@ -62,9 +62,9 @@
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static __inline
#endif
#ifndef __STATIC_FORCEINLINE
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE static __forceinline
#endif
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __declspec(noreturn)
#endif
...
...
@@ -472,7 +472,7 @@ __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
__schedule_barrier();\
} while (0U)
/**
\brief Reverse byte order (32 bit)
\details Reverses the byte order in unsigned integer value. For example, 0x12345678 becomes 0x78563412.
...
...
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/cmsis_armclang.h
浏览文件 @
bff97ce2
...
...
@@ -594,7 +594,7 @@ __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always in non-secure
mode.
\details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
\return PSPLIM Register value
*/
...
...
@@ -640,7 +640,7 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored in non-secure
mode.
\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
*/
...
...
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/cmsis_armclang_ltm.h
浏览文件 @
bff97ce2
...
...
@@ -595,7 +595,7 @@ __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always in non-secure
mode.
\details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
\return PSPLIM Register value
*/
...
...
@@ -641,7 +641,7 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored in non-secure
mode.
\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
*/
...
...
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/cmsis_gcc.h
浏览文件 @
bff97ce2
...
...
@@ -46,9 +46,9 @@
#ifndef __STATIC_INLINE
#define __STATIC_INLINE static inline
#endif
#ifndef __STATIC_FORCEINLINE
#ifndef __STATIC_FORCEINLINE
#define __STATIC_FORCEINLINE __attribute__((always_inline)) static inline
#endif
#endif
#ifndef __NO_RETURN
#define __NO_RETURN __attribute__((__noreturn__))
#endif
...
...
@@ -126,23 +126,23 @@
\details This default implementations initialized all data and additional bss
sections relying on .copy.table and .zero.table specified properly
in the used linker script.
*/
__STATIC_FORCEINLINE
__NO_RETURN
void
__cmsis_start
(
void
)
{
extern
void
_start
(
void
)
__NO_RETURN
;
typedef
struct
{
uint32_t
const
*
src
;
uint32_t
*
dest
;
uint32_t
wlen
;
}
__copy_table_t
;
typedef
struct
{
uint32_t
*
dest
;
uint32_t
wlen
;
}
__zero_table_t
;
extern
const
__copy_table_t
__copy_table_start__
;
extern
const
__copy_table_t
__copy_table_end__
;
extern
const
__zero_table_t
__zero_table_start__
;
...
...
@@ -153,16 +153,16 @@ __STATIC_FORCEINLINE __NO_RETURN void __cmsis_start(void)
pTable
->
dest
[
i
]
=
pTable
->
src
[
i
];
}
}
for
(
__zero_table_t
const
*
pTable
=
&
__zero_table_start__
;
pTable
<
&
__zero_table_end__
;
++
pTable
)
{
for
(
uint32_t
i
=
0u
;
i
<
pTable
->
wlen
;
++
i
)
{
pTable
->
dest
[
i
]
=
0u
;
}
}
_start
();
}
#define __PROGRAM_START __cmsis_start
#endif
...
...
@@ -652,7 +652,7 @@ __STATIC_FORCEINLINE void __TZ_set_FAULTMASK_NS(uint32_t faultMask)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence zero is returned always in non-secure
mode.
\details Returns the current value of the Process Stack Pointer Limit (PSPLIM).
\return PSPLIM Register value
*/
...
...
@@ -697,7 +697,7 @@ __STATIC_FORCEINLINE uint32_t __TZ_get_PSPLIM_NS(void)
Devices without ARMv8-M Main Extensions (i.e. Cortex-M23) lack the non-secure
Stack Pointer Limit register hence the write is silently ignored in non-secure
mode.
\details Assigns the given value to the Process Stack Pointer Limit (PSPLIM).
\param [in] ProcStackPtrLimit Process Stack Pointer Limit value to set
*/
...
...
@@ -834,7 +834,7 @@ __STATIC_FORCEINLINE uint32_t __get_FPSCR(void)
{
#if ((defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)) && \
(defined (__FPU_USED ) && (__FPU_USED == 1U)) )
#if __has_builtin(__builtin_arm_get_fpscr)
#if __has_builtin(__builtin_arm_get_fpscr)
// Re-enable using built-in when GCC has been fixed
// || (__GNUC__ > 7) || (__GNUC__ == 7 && __GNUC_MINOR__ >= 2)
/* see https://gcc.gnu.org/ml/gcc-patches/2017-04/msg00443.html */
...
...
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/cmsis_iccarm.h
浏览文件 @
bff97ce2
...
...
@@ -8,7 +8,7 @@
//------------------------------------------------------------------------------
//
// Copyright (c) 2017-2019 IAR Systems
// Copyright (c) 2017-2019 Arm Limited. All rights reserved.
// Copyright (c) 2017-2019 Arm Limited. All rights reserved.
//
// Licensed under the Apache License, Version 2.0 (the "License")
// you may not use this file except in compliance with the License.
...
...
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_armv81mml.h
浏览文件 @
bff97ce2
...
...
@@ -61,7 +61,7 @@
*/
#include "cmsis_version.h"
#define __ARM_ARCH_8M_MAIN__ 1 // patching for now
/* CMSIS ARMV81MML definitions */
#define __ARMv81MML_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN)
/*!< \deprecated [31:16] CMSIS HAL main version */
...
...
@@ -91,12 +91,12 @@
#define __DSP_USED 1U
#else
#error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
#define __DSP_USED 0U
#define __DSP_USED 0U
#endif
#else
#define __DSP_USED 0U
#endif
#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
#if defined __ARM_FP
#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
...
...
@@ -114,7 +114,7 @@
#define __DSP_USED 1U
#else
#error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
#define __DSP_USED 0U
#define __DSP_USED 0U
#endif
#else
#define __DSP_USED 0U
...
...
@@ -131,18 +131,18 @@
#else
#define __FPU_USED 0U
#endif
#if defined(__ARM_FEATURE_DSP)
#if defined(__DSP_PRESENT) && (__DSP_PRESENT == 1U)
#define __DSP_USED 1U
#else
#error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
#define __DSP_USED 0U
#define __DSP_USED 0U
#endif
#else
#define __DSP_USED 0U
#endif
#elif defined ( __ICCARM__ )
#if defined __ARMVFP__
#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
...
...
@@ -160,12 +160,12 @@
#define __DSP_USED 1U
#else
#error "Compiler generates DSP (SIMD) instructions for a devices without DSP extensions (check __DSP_PRESENT)"
#define __DSP_USED 0U
#define __DSP_USED 0U
#endif
#else
#define __DSP_USED 0U
#endif
#elif defined ( __TI_ARM__ )
#if defined __TI_VFP_SUPPORT__
#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
...
...
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_cm0.h
浏览文件 @
bff97ce2
...
...
@@ -61,7 +61,7 @@
*/
#include "cmsis_version.h"
/* CMSIS CM0 definitions */
#define __CM0_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN)
/*!< \deprecated [31:16] CMSIS HAL main version */
#define __CM0_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB)
/*!< \deprecated [15:0] CMSIS HAL sub version */
...
...
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_cm0plus.h
浏览文件 @
bff97ce2
...
...
@@ -61,7 +61,7 @@
*/
#include "cmsis_version.h"
/* CMSIS CM0+ definitions */
#define __CM0PLUS_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN)
/*!< \deprecated [31:16] CMSIS HAL main version */
#define __CM0PLUS_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB)
/*!< \deprecated [15:0] CMSIS HAL sub version */
...
...
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_cm1.h
浏览文件 @
bff97ce2
...
...
@@ -61,7 +61,7 @@
*/
#include "cmsis_version.h"
/* CMSIS CM1 definitions */
#define __CM1_CMSIS_VERSION_MAIN (__CM_CMSIS_VERSION_MAIN)
/*!< \deprecated [31:16] CMSIS HAL main version */
#define __CM1_CMSIS_VERSION_SUB (__CM_CMSIS_VERSION_SUB)
/*!< \deprecated [15:0] CMSIS HAL sub version */
...
...
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_cm23.h
浏览文件 @
bff97ce2
...
...
@@ -1289,7 +1289,7 @@ typedef struct
/* Special LR values for Secure/Non-Secure call handling and exception handling */
/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */
/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */
#define FNC_RETURN (0xFEFFFFFFUL)
/* bit [0] ignored when processing a branch */
/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
...
...
@@ -1304,11 +1304,11 @@ typedef struct
/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */
#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
/* Value for processors with floating-point extension: */
#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL)
/* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */
#else
#else
#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL)
/* Value for processors without floating-point extension */
#endif
/* Interrupt Priorities are WORD accessible only under Armv6-M */
/* The following MACROS handle generation of the register offset and byte masks */
#define _BIT_SHIFT(IRQn) ( ((((uint32_t)(int32_t)(IRQn)) ) & 0x03UL) * 8UL)
...
...
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_cm33.h
浏览文件 @
bff97ce2
...
...
@@ -2064,7 +2064,7 @@ typedef struct
/* Special LR values for Secure/Non-Secure call handling and exception handling */
/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */
/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */
#define FNC_RETURN (0xFEFFFFFFUL)
/* bit [0] ignored when processing a branch */
/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
...
...
@@ -2079,7 +2079,7 @@ typedef struct
/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */
#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
/* Value for processors with floating-point extension: */
#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL)
/* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */
#else
#else
#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL)
/* Value for processors without floating-point extension */
#endif
...
...
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_cm35p.h
浏览文件 @
bff97ce2
...
...
@@ -2064,7 +2064,7 @@ typedef struct
/* Special LR values for Secure/Non-Secure call handling and exception handling */
/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */
/* Function Return Payload (from ARMv8-M Architecture Reference Manual) LR value on entry from Secure BLXNS */
#define FNC_RETURN (0xFEFFFFFFUL)
/* bit [0] ignored when processing a branch */
/* The following EXC_RETURN mask values are used to evaluate the LR on exception entry */
...
...
@@ -2079,7 +2079,7 @@ typedef struct
/* Integrity Signature (from ARMv8-M Architecture Reference Manual) for exception context stacking */
#if defined (__FPU_PRESENT) && (__FPU_PRESENT == 1U)
/* Value for processors with floating-point extension: */
#define EXC_INTEGRITY_SIGNATURE (0xFEFA125AUL)
/* bit [0] SFTC must match LR bit[4] EXC_RETURN_FTYPE */
#else
#else
#define EXC_INTEGRITY_SIGNATURE (0xFEFA125BUL)
/* Value for processors without floating-point extension */
#endif
...
...
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/core_cm7.h
浏览文件 @
bff97ce2
...
...
@@ -2512,10 +2512,10 @@ __STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void)
__STATIC_FORCEINLINE
void
SCB_InvalidateDCache_by_Addr
(
void
*
addr
,
int32_t
dsize
)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
if
(
dsize
>
0
)
{
if
(
dsize
>
0
)
{
int32_t
op_size
=
dsize
+
(((
uint32_t
)
addr
)
&
(
__SCB_DCACHE_LINE_SIZE
-
1U
));
uint32_t
op_addr
=
(
uint32_t
)
addr
/* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */
;
__DSB
();
do
{
...
...
@@ -2542,10 +2542,10 @@ __STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (void *addr, int32_t dsiz
__STATIC_FORCEINLINE
void
SCB_CleanDCache_by_Addr
(
uint32_t
*
addr
,
int32_t
dsize
)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
if
(
dsize
>
0
)
{
if
(
dsize
>
0
)
{
int32_t
op_size
=
dsize
+
(((
uint32_t
)
addr
)
&
(
__SCB_DCACHE_LINE_SIZE
-
1U
));
uint32_t
op_addr
=
(
uint32_t
)
addr
/* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */
;
__DSB
();
do
{
...
...
@@ -2572,10 +2572,10 @@ __STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (uint32_t *addr, int32_t dsize
__STATIC_FORCEINLINE
void
SCB_CleanInvalidateDCache_by_Addr
(
uint32_t
*
addr
,
int32_t
dsize
)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
if
(
dsize
>
0
)
{
if
(
dsize
>
0
)
{
int32_t
op_size
=
dsize
+
(((
uint32_t
)
addr
)
&
(
__SCB_DCACHE_LINE_SIZE
-
1U
));
uint32_t
op_addr
=
(
uint32_t
)
addr
/* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */
;
__DSB
();
do
{
...
...
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/mpu_armv7.h
浏览文件 @
bff97ce2
...
...
@@ -21,13 +21,13 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include
/* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header
/* treat file as system include file */
#endif
#ifndef ARM_MPU_ARMV7_H
#define ARM_MPU_ARMV7_H
...
...
@@ -79,12 +79,12 @@
/**
* MPU Memory Access Attributes
*
*
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
* \param IsShareable Region is shareable between multiple bus masters.
* \param IsCacheable Region is cacheable, i.e. its value may be kept in cache.
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
*/
*/
#define ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable) \
((((TypeExtField) << MPU_RASR_TEX_Pos) & MPU_RASR_TEX_Msk) | \
(((IsShareable) << MPU_RASR_S_Pos) & MPU_RASR_S_Msk) | \
...
...
@@ -93,7 +93,7 @@
/**
* MPU Region Attribute and Size Register Value
*
*
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
* \param AccessAttributes Memory access attribution, see \ref ARM_MPU_ACCESS_.
...
...
@@ -110,7 +110,7 @@
/**
* MPU Region Attribute and Size Register Value
*
*
* \param DisableExec Instruction access disable bit, 1= disable instruction fetches.
* \param AccessPermission Data access permissions, allows you to configure read/write access for User and Privileged mode.
* \param TypeExtField Type extension field, allows you to configure memory access type, for example strongly ordered, peripheral.
...
...
@@ -119,7 +119,7 @@
* \param IsBufferable Region is bufferable, i.e. using write-back caching. Cacheable but non-bufferable regions use write-through policy.
* \param SubRegionDisable Sub-region disable field.
* \param Size Region size of the region to be configured, for example 4K, 8K.
*/
*/
#define ARM_MPU_RASR(DisableExec, AccessPermission, TypeExtField, IsShareable, IsCacheable, IsBufferable, SubRegionDisable, Size) \
ARM_MPU_RASR_EX(DisableExec, AccessPermission, ARM_MPU_ACCESS_(TypeExtField, IsShareable, IsCacheable, IsBufferable), SubRegionDisable, Size)
...
...
@@ -129,7 +129,7 @@
* - Shareable
* - Non-cacheable
* - Non-bufferable
*/
*/
#define ARM_MPU_ACCESS_ORDERED ARM_MPU_ACCESS_(0U, 1U, 0U, 0U)
/**
...
...
@@ -140,7 +140,7 @@
* - Bufferable (if shareable) or non-bufferable (if non-shareable)
*
* \param IsShareable Configures the device memory as shareable or non-shareable.
*/
*/
#define ARM_MPU_ACCESS_DEVICE(IsShareable) ((IsShareable) ? ARM_MPU_ACCESS_(0U, 1U, 0U, 1U) : ARM_MPU_ACCESS_(2U, 0U, 0U, 0U))
/**
...
...
@@ -153,7 +153,7 @@
* \param OuterCp Configures the outer cache policy.
* \param InnerCp Configures the inner cache policy.
* \param IsShareable Configures the memory as shareable or non-shareable.
*/
*/
#define ARM_MPU_ACCESS_NORMAL(OuterCp, InnerCp, IsShareable) ARM_MPU_ACCESS_((4U | (OuterCp)), IsShareable, ((InnerCp) & 2U), ((InnerCp) & 1U))
/**
...
...
@@ -184,7 +184,7 @@ typedef struct {
uint32_t
RBAR
;
//!< The region base address register value (RBAR)
uint32_t
RASR
;
//!< The region attribute and size register value (RASR) \ref MPU_RASR
}
ARM_MPU_Region_t
;
/** Enable the MPU.
* \param MPU_Control Default access permissions for unconfigured regions.
*/
...
...
@@ -221,7 +221,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
/** Configure an MPU region.
* \param rbar Value for RBAR register.
* \param rsar Value for RSAR register.
*/
*/
__STATIC_INLINE
void
ARM_MPU_SetRegion
(
uint32_t
rbar
,
uint32_t
rasr
)
{
MPU
->
RBAR
=
rbar
;
...
...
@@ -232,7 +232,7 @@ __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rbar, uint32_t rasr)
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rsar Value for RSAR register.
*/
*/
__STATIC_INLINE
void
ARM_MPU_SetRegionEx
(
uint32_t
rnr
,
uint32_t
rbar
,
uint32_t
rasr
)
{
MPU
->
RNR
=
rnr
;
...
...
@@ -248,7 +248,7 @@ __STATIC_INLINE void ARM_MPU_SetRegionEx(uint32_t rnr, uint32_t rbar, uint32_t r
__STATIC_INLINE
void
ARM_MPU_OrderedMemcpy
(
volatile
uint32_t
*
dst
,
const
uint32_t
*
__RESTRICT
src
,
uint32_t
len
)
{
uint32_t
i
;
for
(
i
=
0U
;
i
<
len
;
++
i
)
for
(
i
=
0U
;
i
<
len
;
++
i
)
{
dst
[
i
]
=
src
[
i
];
}
...
...
@@ -258,7 +258,7 @@ __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE
void
ARM_MPU_Load
(
ARM_MPU_Region_t
const
*
table
,
uint32_t
cnt
)
__STATIC_INLINE
void
ARM_MPU_Load
(
ARM_MPU_Region_t
const
*
table
,
uint32_t
cnt
)
{
const
uint32_t
rowWordSize
=
sizeof
(
ARM_MPU_Region_t
)
/
4U
;
while
(
cnt
>
MPU_TYPE_RALIASES
)
{
...
...
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/mpu_armv8.h
浏览文件 @
bff97ce2
...
...
@@ -102,7 +102,7 @@
(MPU_RLAR_EN_Msk))
#if defined(MPU_RLAR_PXN_Pos)
/** \brief Region Limit Address Register with PXN value
* \param LIMIT The limit address bits [31:5] for this memory region. The value is one extended.
* \param PXN Privileged execute never. Defines whether code can be executed from this privileged region.
...
...
@@ -113,7 +113,7 @@
((PXN << MPU_RLAR_PXN_Pos) & MPU_RLAR_PXN_Msk) | \
((IDX << MPU_RLAR_AttrIndx_Pos) & MPU_RLAR_AttrIndx_Msk) | \
(MPU_RLAR_EN_Msk))
#endif
/**
...
...
@@ -123,7 +123,7 @@ typedef struct {
uint32_t
RBAR
;
/*!< Region Base Address Register value */
uint32_t
RLAR
;
/*!< Region Limit Address Register value */
}
ARM_MPU_Region_t
;
/** Enable the MPU.
* \param MPU_Control Default access permissions for unconfigured regions.
*/
...
...
@@ -184,11 +184,11 @@ __STATIC_INLINE void ARM_MPU_SetMemAttrEx(MPU_Type* mpu, uint8_t idx, uint8_t at
const
uint8_t
reg
=
idx
/
4U
;
const
uint32_t
pos
=
((
idx
%
4U
)
*
8U
);
const
uint32_t
mask
=
0xFFU
<<
pos
;
if
(
reg
>=
(
sizeof
(
mpu
->
MAIR
)
/
sizeof
(
mpu
->
MAIR
[
0
])))
{
return
;
// invalid index
}
mpu
->
MAIR
[
reg
]
=
((
mpu
->
MAIR
[
reg
]
&
~
mask
)
|
((
attr
<<
pos
)
&
mask
));
}
...
...
@@ -235,7 +235,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion(uint32_t rnr)
* \param rnr Region number to be cleared.
*/
__STATIC_INLINE
void
ARM_MPU_ClrRegion_NS
(
uint32_t
rnr
)
{
{
ARM_MPU_ClrRegionEx
(
MPU_NS
,
rnr
);
}
#endif
...
...
@@ -245,7 +245,7 @@ __STATIC_INLINE void ARM_MPU_ClrRegion_NS(uint32_t rnr)
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rlar Value for RLAR register.
*/
*/
__STATIC_INLINE
void
ARM_MPU_SetRegionEx
(
MPU_Type
*
mpu
,
uint32_t
rnr
,
uint32_t
rbar
,
uint32_t
rlar
)
{
mpu
->
RNR
=
rnr
;
...
...
@@ -257,7 +257,7 @@ __STATIC_INLINE void ARM_MPU_SetRegionEx(MPU_Type* mpu, uint32_t rnr, uint32_t r
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rlar Value for RLAR register.
*/
*/
__STATIC_INLINE
void
ARM_MPU_SetRegion
(
uint32_t
rnr
,
uint32_t
rbar
,
uint32_t
rlar
)
{
ARM_MPU_SetRegionEx
(
MPU
,
rnr
,
rbar
,
rlar
);
...
...
@@ -268,10 +268,10 @@ __STATIC_INLINE void ARM_MPU_SetRegion(uint32_t rnr, uint32_t rbar, uint32_t rla
* \param rnr Region number to be configured.
* \param rbar Value for RBAR register.
* \param rlar Value for RLAR register.
*/
*/
__STATIC_INLINE
void
ARM_MPU_SetRegion_NS
(
uint32_t
rnr
,
uint32_t
rbar
,
uint32_t
rlar
)
{
ARM_MPU_SetRegionEx
(
MPU_NS
,
rnr
,
rbar
,
rlar
);
ARM_MPU_SetRegionEx
(
MPU_NS
,
rnr
,
rbar
,
rlar
);
}
#endif
...
...
@@ -283,7 +283,7 @@ __STATIC_INLINE void ARM_MPU_SetRegion_NS(uint32_t rnr, uint32_t rbar, uint32_t
__STATIC_INLINE
void
ARM_MPU_OrderedMemcpy
(
volatile
uint32_t
*
dst
,
const
uint32_t
*
__RESTRICT
src
,
uint32_t
len
)
{
uint32_t
i
;
for
(
i
=
0U
;
i
<
len
;
++
i
)
for
(
i
=
0U
;
i
<
len
;
++
i
)
{
dst
[
i
]
=
src
[
i
];
}
...
...
@@ -295,7 +295,7 @@ __STATIC_INLINE void ARM_MPU_OrderedMemcpy(volatile uint32_t* dst, const uint32_
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE
void
ARM_MPU_LoadEx
(
MPU_Type
*
mpu
,
uint32_t
rnr
,
ARM_MPU_Region_t
const
*
table
,
uint32_t
cnt
)
__STATIC_INLINE
void
ARM_MPU_LoadEx
(
MPU_Type
*
mpu
,
uint32_t
rnr
,
ARM_MPU_Region_t
const
*
table
,
uint32_t
cnt
)
{
const
uint32_t
rowWordSize
=
sizeof
(
ARM_MPU_Region_t
)
/
4U
;
if
(
cnt
==
1U
)
{
...
...
@@ -304,7 +304,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_
}
else
{
uint32_t
rnrBase
=
rnr
&
~
(
MPU_TYPE_RALIASES
-
1U
);
uint32_t
rnrOffset
=
rnr
%
MPU_TYPE_RALIASES
;
mpu
->
RNR
=
rnrBase
;
while
((
rnrOffset
+
cnt
)
>
MPU_TYPE_RALIASES
)
{
uint32_t
c
=
MPU_TYPE_RALIASES
-
rnrOffset
;
...
...
@@ -315,7 +315,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_
rnrBase
+=
MPU_TYPE_RALIASES
;
mpu
->
RNR
=
rnrBase
;
}
ARM_MPU_OrderedMemcpy
(
&
(
mpu
->
RBAR
)
+
(
rnrOffset
*
2U
),
&
(
table
->
RBAR
),
cnt
*
rowWordSize
);
}
}
...
...
@@ -325,7 +325,7 @@ __STATIC_INLINE void ARM_MPU_LoadEx(MPU_Type* mpu, uint32_t rnr, ARM_MPU_Region_
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE
void
ARM_MPU_Load
(
uint32_t
rnr
,
ARM_MPU_Region_t
const
*
table
,
uint32_t
cnt
)
__STATIC_INLINE
void
ARM_MPU_Load
(
uint32_t
rnr
,
ARM_MPU_Region_t
const
*
table
,
uint32_t
cnt
)
{
ARM_MPU_LoadEx
(
MPU
,
rnr
,
table
,
cnt
);
}
...
...
@@ -336,7 +336,7 @@ __STATIC_INLINE void ARM_MPU_Load(uint32_t rnr, ARM_MPU_Region_t const* table, u
* \param table Pointer to the MPU configuration table.
* \param cnt Amount of regions to be configured.
*/
__STATIC_INLINE
void
ARM_MPU_Load_NS
(
uint32_t
rnr
,
ARM_MPU_Region_t
const
*
table
,
uint32_t
cnt
)
__STATIC_INLINE
void
ARM_MPU_Load_NS
(
uint32_t
rnr
,
ARM_MPU_Region_t
const
*
table
,
uint32_t
cnt
)
{
ARM_MPU_LoadEx
(
MPU_NS
,
rnr
,
table
,
cnt
);
}
...
...
bsp/mm32/libraries/MM32F3270_HAL/CMSIS/Include/tz_context.h
浏览文件 @
bff97ce2
...
...
@@ -30,41 +30,41 @@
#ifndef TZ_CONTEXT_H
#define TZ_CONTEXT_H
#include <stdint.h>
#ifndef TZ_MODULEID_T
#define TZ_MODULEID_T
/// \details Data type that identifies secure software modules called by a process.
typedef
uint32_t
TZ_ModuleId_t
;
#endif
/// \details TZ Memory ID identifies an allocated memory slot.
typedef
uint32_t
TZ_MemoryId_t
;
/// Initialize secure context memory system
/// \return execution status (1: success, 0: error)
uint32_t
TZ_InitContextSystem_S
(
void
);
/// Allocate context memory for calling secure software modules in TrustZone
/// \param[in] module identifies software modules called from non-secure mode
/// \return value != 0 id TrustZone memory slot identifier
/// \return value 0 no memory available or internal error
TZ_MemoryId_t
TZ_AllocModuleContext_S
(
TZ_ModuleId_t
module
);
/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S
/// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error)
uint32_t
TZ_FreeModuleContext_S
(
TZ_MemoryId_t
id
);
/// Load secure context (called on RTOS thread context switch)
/// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error)
uint32_t
TZ_LoadContext_S
(
TZ_MemoryId_t
id
);
/// Store secure context (called on RTOS thread context switch)
/// \param[in] id TrustZone memory slot identifier
/// \return execution status (1: success, 0: error)
uint32_t
TZ_StoreContext_S
(
TZ_MemoryId_t
id
);
#endif // TZ_CONTEXT_H
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_common.h
浏览文件 @
bff97ce2
...
...
@@ -3,7 +3,8 @@
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
*/
#ifndef __HAL_COMMON_H__
#define __HAL_COMMON_H__
...
...
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_dac.h
浏览文件 @
bff97ce2
...
...
@@ -3,7 +3,8 @@
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
*/
#ifndef __HAL_DAC_H__
#define __HAL_DAC_H__
...
...
@@ -62,7 +63,7 @@ typedef enum
/*!
* @brief DAC LFSR unmask bit selector type for adding noise wave.
*/
typedef
enum
typedef
enum
{
DAC_AddNoise_LFSRUnMask_0
=
0u
,
/*!< Unmask DAC channel LFSR bit0. */
DAC_AddNoise_LFSRUnMask_1
=
1u
,
/*!< Unmask DAC channel LFSR bit[1:0]. */
...
...
@@ -81,7 +82,7 @@ typedef enum
/*!
* @brief DAC triangle amplitude selector type for adding triangle wave.
*/
typedef
enum
typedef
enum
{
DAC_AddTriangle_LFSRAmplitude_1
=
0u
,
/*!< Max triangle amplitude of 1. */
DAC_AddTriangle_LFSRAmplitude_3
=
1u
,
/*!< Max triangle amplitude of 3. */
...
...
@@ -124,7 +125,7 @@ typedef struct
/*!
* @brief Initialize the DAC module.
*
*
* @param DACx DAC instance.
* @param channel Indicated DAC channel. See to @ref DAC_CHANNEL_SELECTION.
* @param init Pointer to the initialization structure. See to @ref DAC_Init_Type.
...
...
@@ -136,7 +137,7 @@ void DAC_Init(DAC_Type * DACx, uint32_t channel, DAC_Init_Type * init);
* @brief Enable the DAC module.
*
* The DAC module should be enabled before outputting voltage.
*
*
* @param DACx DAC instance.
* @param channel Indicated DAC channel. See to @ref DAC_CHANNEL_SELECTION.
* @param enable 'true' to enable the module, 'false' to disable the module.
...
...
@@ -148,7 +149,7 @@ void DAC_Enable(DAC_Type * DACx, uint32_t channel, bool enable);
* @brief Get the echo data from the output of the indicated DAC channel.
*
* The value in DAC_DORx register takes effect on the actual output of DAC.
*
*
* @param DACx DAC instance.
* @param channel Indicated DAC channel. See to @ref DAC_CHANNEL_SELECTION.
* @return The indicated DAC channel data output value.
...
...
@@ -159,7 +160,7 @@ uint32_t DAC_GetData(DAC_Type * DACx, uint32_t channel);
* @brief Put the value into the indicated channel of the DAC module with the alignment.
*
* The value in DAC_DORx register takes effect on the actual output of DAC.
*
*
* @param DACx DAC instance.
* @param channel Indicated DAC channel. See to @ref DAC_CHANNEL_SELECTION.
* @param value Data value to be put in indicated DAC channel for conversion.
...
...
@@ -170,9 +171,9 @@ uint32_t DAC_PutData(DAC_Type * DACx, uint32_t channel, uint32_t value, DAC_Alig
/*!
* @brief Enable the feature of generating noise wave from the DAC module.
*
*
* If enable additional noise wave, the output value will depend on the the unmask LFSR bit and input of the indicated channel.
*
*
* @param DACx DAC instance.
* @param channel Indicated DAC channel. See to @ref DAC_CHANNEL_SELECTION.
* @param init Pointer to the initialization structure. See to @ref DAC_AddNoise_Init_Type. If null, disable the wave generation.
...
...
@@ -182,10 +183,10 @@ void DAC_EnableAddNoise(DAC_Type * DACx, uint32_t channel, DAC_AddNoise_Init_Typ
/*!
* @brief Enable the feature of generating triangle wave from the DAC module.
*
*
* Defaultedly, DAC does not generate any wave.
* If enable additional triangle wave, the output value will depend on the the indicated amplitude and input of the indicated channel.
*
*
* @param DACx DAC instance.
* @param channel Indicated DAC channel. See to @ref DAC_CHANNEL_SELECTION.
* @param init Pointer to the initialization structure. See to @ref DAC_AddTriangle_Init_Type. If null, disable the wave generation.
...
...
@@ -197,7 +198,7 @@ void DAC_EnableAddTriangle(DAC_Type * DACx, uint32_t channel, DAC_AddTriangle_In
* @brief Enable the DMA trigger from the DAC module.
*
* The DMA trigger events are the same as the intertupts.
*
*
* @param DACx DAC instance.
* @param channel Indicated DAC channel. See to @ref DAC_CHANNEL_SELECTION.
* @param enable 'true' to enable the DMA trigger, 'false' to disable the DMA trigger.
...
...
@@ -247,10 +248,10 @@ void DAC_PutData8bRightAlign(DAC_Type * DACx, uint32_t channel, uint32_t value);
/*!
* @brief Put the 12-bit value into indicated channel of the DAC module.
*
*
* The low 12-bit of the setting value here will be output after 4-bit right shift.
* If the value is 0x1ff, the output will be 0x1f.
*
*
* @param DACx DAC instance.
* @param channel Indicated DAC channel. See to @ref DAC_CHANNEL_SELECTION.
* @param value Data value to be put in indicated DAC channel for conversion.
...
...
@@ -260,9 +261,9 @@ void DAC_PutData12bLeftAlign(DAC_Type * DACx, uint32_t channel, uint32_t value);
/*!
* @brief Put the current data into indicated channel of the DAC module.
*
*
* The low 12-bit of the setting value here will output with the original value.
*
*
* @param DACx DAC instance.
* @param channel Indicated DAC channel. See to @ref DAC_CHANNEL_SELECTION.
* @param value Data value to be put in indicated DAC channel for conversion.
...
...
@@ -272,10 +273,10 @@ void DAC_PutData12bRightAlign(DAC_Type * DACx, uint32_t channel, uint32_t value)
/*!
* @brief Respectively put the value into the dual channels of the DAC module 8b right aligned.
*
*
* Simultaneously output the low 8-bit of the low 16-bit and high 16-bit of the 32-bit value seperately with a 4-bit left shift.
* If value is 0x011f01ff, the output of each channel will be 0xff0 ( channel 1 ) and 0x1f0 ( channel 2 ).
*
*
* @param DACx DAC instance.
* @param value Data value to be put in DAC channel 1 and DAC channel 2 for conversion.
* @return None.
...
...
@@ -284,10 +285,10 @@ void DAC_PutDualChannelData8bRightAlign(DAC_Type * DACx, uint32_t value);
/*!
* @brief Put the data into the dual channel of the DAC module 12b left aligned.
*
*
* Simultaneously output the high 12-bit of the low 16-bit and high 16-bit of the 32-bit value seperately after 4-bit right shift.
* If value is 0x011f01ff, the output of each channel will be 0x01f ( channel 1 ) and 0x011 ( channel 2 ).
*
*
* @param DACx DAC instance.
* @param value Data value to be put in DAC channel 1 and DAC channel 2 for conversion.
* @return None.
...
...
@@ -296,9 +297,9 @@ void DAC_PutDualChannelData12bLeftAlign(DAC_Type * DACx, uint32_t value);
/*!
* @brief Put the data into the dual channel of the DAC module 12b right aligned.
*
*
* Simultaneously output the low 12-bit of the low 16-bit and high 16-bit of the 32-bit value seperately.
*
*
* @param DACx DAC instance.
* @param value Data value to be put in DAC channel 1 and DAC channel 2 for conversion.
* @return None.
...
...
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_iwdg.h
浏览文件 @
bff97ce2
...
...
@@ -26,14 +26,14 @@
#define IWDG_KEY_ENABLE 0xCCCC
/*!< IWDG Peripheral Enable . */
#define IWDG_KEY_RELOAD 0xAAAA
/*!< IWDG Reload Counter Enable. */
#define IWDG_KEY_UNLOCK 0x5555
/*!< IWDG KR Write Access Enable*/
/*!
* @addtogroup IWDG_STATUS
* @{
*/
#define IWDG_STATUS_RELOAD_UPDATE IWDG_SR_RVU_MASK
/*!< Status flag when IWDG counter reload value update, can not be cleared. */
#define IWDG_STATUS_PRESCALER_UPDATE IWDG_SR_PVU_MASK
/*!< Status flag when IWDG prescaler value update, can not be cleared. */
#define IWDG_STATUS_ALMOST_TIMEOUT IWDG_SR_IVU_MASK
/*!< Status flag when IWDG almost timeout. */
#define IWDG_STATUS_ALMOST_TIMEOUT IWDG_SR_IVU_MASK
/*!< Status flag when IWDG almost timeout. */
/*!
* @}
*/
...
...
@@ -46,7 +46,7 @@
/*!
* @}
*/
/*!
* @brief IWDG prescaler type.
*
...
...
@@ -110,7 +110,7 @@ void IWDG_ClearStatus(IWDG_Type * IWDGx, uint32_t status);
/*!
* @brief Do reload IWDG counter (i.e. "feed dog").
*
*
* @param IWDGx IWDG instance.
* @return None.
*/
...
...
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_spi.h
浏览文件 @
bff97ce2
...
...
@@ -3,7 +3,8 @@
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
*/
#ifndef __HAL_SPI_H__
#define __HAL_SPI_H__
...
...
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_tim_16b.h
浏览文件 @
bff97ce2
...
...
@@ -136,13 +136,13 @@ typedef enum
/*!
* @brief TIM input capture active edge selection and output compare active polarity selection.
*
*
* | conf | TIM_16B_PinPolarity_Rising | TIM_16B_PinPolarity_Falling |
* | -------------- | -------------------------- | --------------------------- |
* | input capture | detects rising edge | detects falling edge |
* | output compare | high polarity is active | low polarity is active |
* | encoder mode | input remains | input reverses |
*
*
*/
typedef
enum
{
...
...
@@ -526,7 +526,7 @@ void TIM_16B_ClearInterruptStatus(TIM_16B_Type * TIMx, uint32_t status);
* @brief Enable the output compare feature of indicated timer channel.
*
* If need to change the IO mode of the working channel, channel must be disabled first, then modify.
*
*
* @param TIMx TIM_16B_Type instance.
* @param channel Output channel instance. See to @ref TIM_16B_CHANNEL_SELECTION.
* @param conf Pointer to the configuration structure. See to @ref TIM_16B_OutputCompareConf_Type.
...
...
@@ -538,7 +538,7 @@ void TIM_16B_EnableOutputCompare(TIM_16B_Type * TIMx, uint32_t channel, TIM_16B_
* @brief Enable the input capture feature of indicated timer channel.
*
* If need to change the IO mode of the working channel, channel must be disabled first, then modify.
*
*
* @param TIMx TIM_16B_Type instance.
* @param channel Input channel instance. See to @ref TIM_16B_CHANNEL_SELECTION.
* @param conf Pointer to the configuration structure. See to @ref TIM_16B_InputCaptureConf_Type.
...
...
@@ -550,7 +550,7 @@ void TIM_16B_EnableInputCapture(TIM_16B_Type * TIMx, uint32_t channel, TIM_16B_I
* @brief Get the value of the indicated timer channel.
*
* When capture event happens, counter value will be kept in its indicated channel.
*
*
* @param TIMx TIM_16B_Type instance.
* @param channel Channel instance to get the value. See to @ref TIM_16B_CHANNEL_SELECTION.
* @return Value of the indiacted timer channel.
...
...
@@ -561,7 +561,7 @@ uint16_t TIM_16B_GetChannelValue(TIM_16B_Type * TIMx, uint32_t channel);
* @brief Put the value into the indicated timer channel.
*
* When in output compare, channel value would be the compared with counter value.
*
*
* @param TIMx TIM_16B_Type instance.
* @param channel Channel instance to put the value. See to @ref TIM_16B_CHANNEL_SELECTION.
* @param value The value to be set in the indicated timer channel.
...
...
@@ -582,7 +582,7 @@ void TIM_16B_EnableDeadArea(TIM_16B_Type * TIMx, TIM_16B_DeadAreaConf_Type * con
* @brief Enable the master mode of the indicated timer.
*
* Master mode transfer the timer signal to other timers.
*
*
* @param TIMx TIM_16B_Type instance.
* @param conf Pointer to the configuration structure. See to @ref TIM_16B_MasterModeConf_Type.
* @return None.
...
...
@@ -593,7 +593,7 @@ void TIM_16B_EnableMasterMode(TIM_16B_Type * TIMx, TIM_16B_MasterModeConf_Type *
* @brief Enable the slave mode of the indicated timer.
*
* Slave mode can control the working state of counter.
*
*
* @param TIMx TIM_16B_Type instance.
* @param conf Pointer to the configuration structure. See to @ref TIM_16B_SlaveModeConf_Type.
* @return None.
...
...
@@ -605,7 +605,7 @@ void TIM_16B_EnableSlaveMode(TIM_16B_Type * TIMx, TIM_16B_SlaveModeConf_Type * c
*
* External trigger signal will trigger counter do addition.
* Its div and filter along with the counter StepFreqHz will affect.
*
*
* @param TIMx TIM_16B_Type instance.
* @param conf Pointer to the configuration structure. See to @ref TIM_16B_ExtTriggerInConf_Type.
* @return None.
...
...
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_tim_32b.h
浏览文件 @
bff97ce2
...
...
@@ -524,7 +524,7 @@ void TIM_32B_ClearInterruptStatus(TIM_32B_Type * TIMx, uint32_t status);
* @brief Enable the output compare feature of indicated timer channel.
*
* If need to change the IO mode of the working channel, channel must be disabled first, then modify.
*
*
* @param TIMx TIM_32B_Type instance.
* @param channel Output channel instance. See to @ref TIM_32B_CHANNEL_SELECTION.
* @param conf Pointer to the configuration structure. See to @ref TIM_32B_OutputCompareConf_Type.
...
...
@@ -536,7 +536,7 @@ void TIM_32B_EnableOutputCompare(TIM_32B_Type * TIMx, uint32_t channel, TIM_32B_
* @brief Enable the input capture feature of indicated timer channel.
*
* If need to change the IO mode of the working channel, channel must be disabled first, then modify.
*
*
* @param TIMx TIM_32B_Type instance.
* @param channel Input channel instance. See to @ref TIM_32B_CHANNEL_SELECTION.
* @param conf Pointer to the configuration structure. See to @ref TIM_32B_InputCaptureConf_Type.
...
...
@@ -548,7 +548,7 @@ void TIM_32B_EnableInputCapture(TIM_32B_Type * TIMx, uint32_t channel, TIM_32B_I
* @brief Get the value of the indicated timer channel.
*
* When capture event happens, counter value will be kept in its indicated channel.
*
*
* @param TIMx TIM_32B_Type instance.
* @param channel Channel instance to get the value. See to @ref TIM_32B_CHANNEL_SELECTION.
* @return Value of the indiacted timer channel.
...
...
@@ -559,7 +559,7 @@ uint32_t TIM_32B_GetChannelValue(TIM_32B_Type * TIMx, uint32_t channel);
* @brief Put the value into the indicated timer channel.
*
* When in output compare, channel value would be the compared with counter value.
*
*
* @param TIMx TIM_32B_Type instance.
* @param channel Channel instance to put the value. See to @ref TIM_32B_CHANNEL_SELECTION.
* @param value The value to be set in the indicated timer channel.
...
...
@@ -580,7 +580,7 @@ void TIM_32B_EnableDeadArea(TIM_32B_Type * TIMx, TIM_32B_DeadAreaConf_Type * con
* @brief Enable the master mode of the indicated timer.
*
* Master mode transfer the timer signal to other timers.
*
*
* @param TIMx TIM_32B_Type instance.
* @param conf Pointer to the configuration structure. See to @ref TIM_32B_MasterModeConf_Type.
* @return None.
...
...
@@ -591,7 +591,7 @@ void TIM_32B_EnableMasterMode(TIM_32B_Type * TIMx, TIM_32B_MasterModeConf_Type *
* @brief Enable the slave mode of the indicated timer.
*
* Slave mode can control the working state of counter.
*
*
* @param TIMx TIM_32B_Type instance.
* @param conf Pointer to the configuration structure. See to @ref TIM_32B_SlaveModeConf_Type.
* @return None.
...
...
@@ -603,7 +603,7 @@ void TIM_32B_EnableSlaveMode(TIM_32B_Type * TIMx, TIM_32B_SlaveModeConf_Type * c
*
* External trigger signal will trigger counter do addition.
* Its div and filter along with the counter StepFreqHz will affect.
*
*
* @param TIMx TIM_32B_Type instance.
* @param conf Pointer to the configuration structure. See to @ref TIM_32B_ExtTriggerInConf_Type.
* @return None.
...
...
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_tim_adv.h
浏览文件 @
bff97ce2
...
...
@@ -145,7 +145,7 @@ typedef enum
}
TIM_ADV_OutputCompareRefOut_Type
;
/*!
* @brief TIM input capture active edge selection and output compare active polarity selection.
* @brief TIM input capture active edge selection and output compare active polarity selection.
* | conf | TIM_ADV_PinPolarity_Rising | TIM_ADV_PinPolarity_Falling |
* | ----------------------- | -------------------------- | --------------------------- |
* | input capture | detects rising edge | detects falling edge |
...
...
@@ -416,7 +416,7 @@ typedef struct
* | ------------ | --------------------------------------------------- |
* | 0xxxxxxx | DeadAreaCoef * DeadAreaStep |
* | 10xxxxxx | ( 64 + DeadAreaCoef[5:0] ) * ( 2 * DeadAreaStep ) |
* | 110xxxxx | ( 32 + DeadAreaCoef[4:0] ) * ( 8 * DeadAreaStep
)
|
* | 110xxxxx | ( 32 + DeadAreaCoef[4:0] ) * ( 8 * DeadAreaStep
)
|
* | 111xxxxx | ( 32 + DeadAreaCoef[4:0] ) * ( 16 * DeadAreaStep ) |
*/
typedef
struct
...
...
@@ -573,7 +573,7 @@ void TIM_ADV_ClearInterruptStatus(TIM_ADV_Type * TIMx, uint32_t status);
* @brief Set up the output compare feature of indicated timer channel.
*
* If need to change the IO mode of the working channel, channel must be disabled first, then modify.
*
*
* @param TIMx TIM_ADV_Type instance.
* @param channel Output channel instance. See to @ref TIM_ADV_CHANNEL_SELECTION.
* @param conf Pointer to the configuration structure. See to @ref TIM_ADV_OutputCompareConf_Type.
...
...
@@ -594,7 +594,7 @@ void TIM_ADV_EnableOutputCompareSwitch(TIM_ADV_Type * TIMx, bool enable);
* @brief Enable the input capture feature of indicated timer channel.
*
* If need to change the IO mode of the working channel, channel must be disabled first, then modify.
*
*
* @param TIMx TIM_ADV_Type instance.
* @param channel Input channel instance. See to @ref TIM_ADV_CHANNEL_SELECTION.
* @param conf Pointer to the configuration structure. See to @ref TIM_ADV_InputCaptureConf_Type.
...
...
@@ -606,7 +606,7 @@ void TIM_ADV_EnableInputCapture(TIM_ADV_Type * TIMx, uint32_t channel, TIM_ADV_I
* @brief Get the value of the indicated timer channel.
*
* When capture event happens, counter value will be kept in its indicated channel.
*
*
* @param TIMx TIM_ADV_Type instance.
* @param channel Channel instance to get the value. See to @ref TIM_ADV_CHANNEL_SELECTION.
* @return Value of the indiacted timer channel.
...
...
@@ -617,7 +617,7 @@ uint16_t TIM_ADV_GetChannelValue(TIM_ADV_Type * TIMx, uint32_t channel);
* @brief Put the value into the indicated timer channel.
*
* When in output compare, channel value would be the compared with counter value.
*
*
* @param TIMx TIM_ADV_Type instance.
* @param channel Channel instance to put the value. See to @ref TIM_ADV_CHANNEL_SELECTION.
* @param value The value to be set in the indicated timer channel.
...
...
@@ -638,7 +638,7 @@ void TIM_ADV_EnableDeadArea(TIM_ADV_Type * TIMx, TIM_ADV_DeadAreaConf_Type * con
* @brief Enable the master mode of the indicated timer.
*
* Master mode transfer the timer signal to other timers.
*
*
* @param TIMx TIM_ADV_Type instance.
* @param conf Pointer to the configuration structure. See to @ref TIM_ADV_MasterModeConf_Type.
* @return None.
...
...
@@ -649,7 +649,7 @@ void TIM_ADV_EnableMasterMode(TIM_ADV_Type * TIMx, TIM_ADV_MasterModeConf_Type *
* @brief Enable the slave mode of the indicated timer.
*
* Slave mode can control the working state of counter.
*
*
* @param TIMx TIM_ADV_Type instance.
* @param conf Pointer to the configuration structure. See to @ref TIM_ADV_SlaveModeConf_Type.
* @return None.
...
...
@@ -661,7 +661,7 @@ void TIM_ADV_EnableSlaveMode(TIM_ADV_Type * TIMx, TIM_ADV_SlaveModeConf_Type * c
*
* External trigger signal will trigger counter do addition.
* Its div and filter along with the counter StepFreqHz will affect.
*
*
* @param TIMx TIM_ADV_Type instance.
* @param conf Pointer to the configuration structure. See to @ref TIM_ADV_ExtTriggerInConf_Type.
* @return None.
...
...
@@ -699,7 +699,7 @@ void TIM_ADV_SetRepCounter(TIM_ADV_Type * TIMx, uint8_t value);
* @brief Get the indicated TIMx Counter value.
*
* Real repetition's times number, meaning left repetition period times to run.
*
*
* @param TIMx TIM_ADV_Type instance.
* @return The current value of the counter register.
*/
...
...
@@ -707,7 +707,7 @@ uint8_t TIM_ADV_GetRepCounterValue(TIM_ADV_Type * TIMx);
/*!
* @brief Set the channel idle state output when switch off the output compare.
*
*
* @param TIMx TIM_ADV_Type instance.
* @param channel Channel instance to set the idle state output. See to @ref TIM_ADV_CHANNEL_SELECTION.
* @param conf Pointer to the configuration structure. See to @ref TIM_ADV_IdleOut_Type.
...
...
@@ -717,7 +717,7 @@ void TIM_ADV_EnableIdleOut(TIM_ADV_Type * TIMx, uint32_t channel, TIM_ADV_IdleOu
/*!
* @brief Set the lock level for protecting the timer config setting.
*
*
* @param TIMx TIM_ADV_Type instance.
* @param lock Lock level to be set for protecting Timer set. See to @ref TIM_ADV_LockLevel_Type.
* @return None.
...
...
@@ -726,7 +726,7 @@ void TIM_ADV_EnableLock(TIM_ADV_Type * TIMx, TIM_ADV_LockLevel_Type lock);
/*!
* @brief Set the break input of the timer.
*
*
* @param TIMx TIM_ADV_Type instance.
* @param conf Pointer to the configuration structure. See to @ref TIM_ADV_BreakIn_Type.
* @return None.
...
...
@@ -735,7 +735,7 @@ void TIM_ADV_EnableBreakIn(TIM_ADV_Type * TIMx, TIM_ADV_BreakIn_Type * conf);
/*!
* @brief Set the PWM shift of the indicated channel.
*
*
* @param TIMx TIM_ADV_Type instance.
* @param channel Channel instance to set the pwm shift. See to @ref TIM_ADV_CHANNEL_SELECTION.
* @param value The counter time when need pwm output shift. If val equals the channel value, disable the shift.
...
...
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_tim_basic.h
浏览文件 @
bff97ce2
...
...
@@ -83,7 +83,7 @@ typedef struct
/*!
* @brief Set the timer's step for indicated TIM module.
*
*
* @param TIMx TIM_BASIC instance.
* @param init Pointer to the initialization structure. See to @ref TIM_BASIC_Init_Type.
* @return 'true' to set the timer's step successfully, 'false' to fail because the invalid StepFreqHz.
...
...
@@ -92,7 +92,7 @@ bool TIM_BASIC_Init(TIM_BASIC_Type * TIMx, TIM_BASIC_Init_Type * init);
/*!
* @brief Start counting.
*
*
* @param TIMx TIM_BASIC instance.
* @return None.
*/
...
...
@@ -100,7 +100,7 @@ void TIM_BASIC_Start(TIM_BASIC_Type * TIMx);
/*!
* @brief Stop counting immediately.
*
*
* @param TIMx TIM_BASIC instance.
* @return None.
*/
...
...
@@ -138,7 +138,7 @@ void TIM_BASIC_EnableDMA(TIM_BASIC_Type *TIMx, uint32_t dmas, bool enable);
* @brief Software trigger events to call interrupts or DMAs.
*
* Can simultaneously trigger multiple events.
*
*
* @param TIMx TIM_BASIC instance. See to @ref TIM_BASIC_SWTRG.
* @param swtrgs Trigger the events to generate interrupts.
*/
...
...
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Inc/hal_usb.h
浏览文件 @
bff97ce2
...
...
@@ -29,7 +29,7 @@
*/
#define USB_INT_RESET USB_INTSTAT_USBRST_MASK
/*!< USB Interrupt: USB bus reset. */
#define USB_INT_ERROR USB_INTSTAT_ERROR_MASK
/*!< USB Interrupt: Error happend. */
#define USB_INT_SOFTOK USB_INTSTAT_SOFTOK_MASK
/*!< USB Interrupt: Recv a SOF_Tok. */
#define USB_INT_SOFTOK USB_INTSTAT_SOFTOK_MASK
/*!< USB Interrupt: Recv a SOF_Tok. */
#define USB_INT_TOKENDONE USB_INTSTAT_TOKDNE_MASK
/*!< USB Interrupt: Token done. */
#define USB_INT_SLEEP USB_INTSTAT_SLEEP_MASK
/*!< USB Interrupt: Sleep. */
#define USB_INT_RESUME USB_INTSTAT_RESUME_MASK
/*!< USB Interrupt: Resume. */
...
...
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_dac.c
浏览文件 @
bff97ce2
...
...
@@ -3,7 +3,8 @@
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
*/
#include "hal_dac.h"
void
DAC_Init
(
DAC_Type
*
DACx
,
uint32_t
channel
,
DAC_Init_Type
*
init
)
...
...
@@ -155,7 +156,7 @@ void DAC_DoSwTrigger(DAC_Type * DACx, uint32_t channel)
void
DAC_DoDualChannelSwTrigger
(
DAC_Type
*
DACx
)
{
DACx
->
SWTRIGR
|=
DAC_SWTRIGR_SWTRIG1_MASK
DACx
->
SWTRIGR
|=
DAC_SWTRIGR_SWTRIG1_MASK
|
DAC_SWTRIGR_SWTRIG2_MASK
;
}
...
...
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_dma.c
浏览文件 @
bff97ce2
...
...
@@ -11,19 +11,19 @@
uint32_t
DMA_InitChannel
(
DMA_Type
*
DMAx
,
uint32_t
channel
,
DMA_Channel_Init_Type
*
init
)
{
uint32_t
ccr
=
0u
;
if
(
(
init
->
XferMode
==
DMA_XferMode_MemoryToPeriph
)
||
(
init
->
XferMode
==
DMA_XferMode_MemoryToPeriphBurst
)
)
{
ccr
|=
DMA_CCR_DIR_MASK
;
}
if
(
(
init
->
XferMode
==
DMA_XferMode_PeriphToMemoryBurst
)
||
(
init
->
XferMode
==
DMA_XferMode_MemoryToPeriphBurst
)
)
{
ccr
|=
DMA_CCR_MEM2MEM_MASK
;
}
if
(
init
->
ReloadMode
==
DMA_ReloadMode_AutoReload
)
{
ccr
|=
DMA_CCR_ARE_MASK
;
...
...
@@ -39,12 +39,12 @@ uint32_t DMA_InitChannel(DMA_Type * DMAx, uint32_t channel, DMA_Channel_Init_Typ
|
DMA_CCR_MSIZE
(
init
->
XferWidth
)
|
DMA_CCR_PL
(
init
->
Priority
)
;
DMAx
->
CH
[
channel
].
CCR
=
ccr
;
DMAx
->
CH
[
channel
].
CNDTR
=
init
->
XferCount
;
DMAx
->
CH
[
channel
].
CPAR
=
init
->
PeriphAddr
;
DMAx
->
CH
[
channel
].
CMAR
=
init
->
MemAddr
;
return
0u
;
}
...
...
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_exti.c
浏览文件 @
bff97ce2
...
...
@@ -3,7 +3,8 @@
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
*/
#include "hal_exti.h"
void
EXTI_EnableLineInterrupt
(
EXTI_Type
*
EXTIx
,
uint32_t
lines
,
bool
enable
)
...
...
@@ -40,7 +41,7 @@ void EXTI_SetTriggerIn(EXTI_Type * EXTIx, uint32_t lines, EXTI_TriggerIn_Type tr
break
;
case
EXTI_TriggerIn_RisingEdge
:
EXTI
->
RTSR
|=
lines
;
EXTIx
->
FTSR
&=
~
lines
;
EXTIx
->
FTSR
&=
~
lines
;
break
;
case
EXTI_TriggerIn_FallingEdge
:
EXTI
->
RTSR
&=
~
lines
;
...
...
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_fsmc.c
浏览文件 @
bff97ce2
...
...
@@ -3,10 +3,11 @@
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
*/
#include "hal_fsmc.h"
const
uint32_t
FSMC_BankBases
[]
=
const
uint32_t
FSMC_BankBases
[]
=
{
FSMC_BANK0_BASE
,
FSMC_BANK1_BASE
,
...
...
@@ -67,7 +68,7 @@ void FSMC_EnableConf(FSMC_Type * FSMCx, uint32_t index)
FSMCx
->
SMSKR0
=
(
(
FSMCx
->
SMSKR0
&
~
FSMC_SMSKR0_REGSELECT_MASK
)
|
FSMC_SMSKR0_REGSELECT
(
index
)
)
;
}
}
void
FSMC_PutData32
(
FSMC_Type
*
FSMCx
,
uint32_t
bankn
,
uint32_t
offset
,
uint32_t
data
)
{
...
...
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_i2c.c
浏览文件 @
bff97ce2
...
...
@@ -10,7 +10,7 @@
/* Configure I2C speed to ordinary speed. */
static
bool
I2C_CalcBandrate
(
I2C_Type
*
I2Cx
,
uint32_t
clk
,
uint32_t
bandrate
)
{
/*
/*
* SCLH = (xSHR + 12) * I2C_CLK + tSYNC1;
* SCLL = (xSLR + 1) * I2C_CLK + tSYNC2;
* tSYNC1 & tSYNC2 equal 0 ~ 1 clk.
...
...
@@ -41,7 +41,7 @@ bool I2C_InitMaster(I2C_Type * I2Cx, I2C_Master_Init_Type * init)
}
I2Cx
->
CR
=
I2C_CR_SPEED
(
1u
);
/* Setup I2C. */
I2Cx
->
CR
&=
~
I2C_CR_MASTER10_MASK
;
/* Address format. */
I2Cx
->
CR
|=
I2C_CR_RESTART_MASK
/* Generate restart signal. */
...
...
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_iwdg.c
浏览文件 @
bff97ce2
...
...
@@ -8,12 +8,12 @@
#include "hal_iwdg.h"
void
IWDG_Init
(
IWDG_Type
*
IWDGx
,
IWDG_Init_Type
*
init
)
{
{
if
(
NULL
!=
init
)
{
IWDGx
->
KR
=
IWDG_KEY_UNLOCK
;
IWDGx
->
KR
=
IWDG_KEY_UNLOCK
;
IWDGx
->
PR
=
init
->
Prescaler
;
IWDGx
->
KR
=
IWDG_KEY_UNLOCK
;
IWDGx
->
RLR
=
init
->
Relaod
;
...
...
@@ -56,4 +56,4 @@ void IWDG_ClearStatus(IWDG_Type * IWDGx, uint32_t status)
}
}
/* EOF. */
\ No newline at end of file
/* EOF. */
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_rtc.c
浏览文件 @
bff97ce2
...
...
@@ -21,7 +21,7 @@ void RTC_Init(void)
RCC
->
BDCR
|=
RCC_BDCR_RTCSEL
(
1u
);
RCC
->
BDCR
&=
~
RCC_BDCR_LSEON_MASK
;
RCC
->
BDCR
|=
RCC_BDCR_LSEON_MASK
;
/* Clear register synchronization status. */
RTC
->
CRL
&=
~
RTC_CRL_RSF_MASK
;
}
...
...
@@ -179,12 +179,12 @@ bool RTC_JudgeLeapYear(uint16_t years)
}
else
{
return
false
;
return
false
;
}
}
else
{
return
true
;
/* Ordinary leap year. */
return
true
;
/* Ordinary leap year. */
}
}
else
...
...
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_spi.c
浏览文件 @
bff97ce2
...
...
@@ -3,7 +3,8 @@
* All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
*/
#include "hal_spi.h"
void
SPI_SetBaudrate
(
SPI_Type
*
SPIx
,
uint32_t
src_clk
,
uint32_t
baudrate
)
...
...
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_tim_16b.c
浏览文件 @
bff97ce2
...
...
@@ -37,7 +37,7 @@ bool TIM_16B_Init(TIM_16B_Type * TIMx, TIM_16B_Init_Type * init)
}
TIMx
->
CR1
=
cr1
;
/* Check the vadility of StepFreqHz. */
if
(
(
init
->
StepFreqHz
==
0u
)
||
(
init
->
StepFreqHz
>
init
->
ClockFreqHz
)
)
if
(
(
init
->
StepFreqHz
==
0u
)
||
(
init
->
StepFreqHz
>
init
->
ClockFreqHz
)
)
{
return
false
;
}
...
...
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_tim_32b.c
浏览文件 @
bff97ce2
...
...
@@ -37,7 +37,7 @@ bool TIM_32B_Init(TIM_32B_Type * TIMx, TIM_32B_Init_Type * init)
}
TIMx
->
CR1
=
cr1
;
/* Check the vadility of StepFreqHz. */
if
(
(
init
->
StepFreqHz
==
0u
)
||
(
init
->
StepFreqHz
>
init
->
ClockFreqHz
)
)
if
(
(
init
->
StepFreqHz
==
0u
)
||
(
init
->
StepFreqHz
>
init
->
ClockFreqHz
)
)
{
return
false
;
}
...
...
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_tim_adv.c
浏览文件 @
bff97ce2
...
...
@@ -37,7 +37,7 @@ bool TIM_ADV_Init(TIM_ADV_Type * TIMx, TIM_ADV_Init_Type * init)
}
TIMx
->
CR1
=
cr1
;
/* Check the vadility of StepFreqHz. */
if
(
(
init
->
StepFreqHz
==
0u
)
||
(
init
->
StepFreqHz
>
init
->
ClockFreqHz
)
)
if
(
(
init
->
StepFreqHz
==
0u
)
||
(
init
->
StepFreqHz
>
init
->
ClockFreqHz
)
)
{
return
false
;
}
...
...
@@ -153,9 +153,9 @@ void TIM_ADV_EnableOutputCompare(TIM_ADV_Type * TIMx, uint32_t channel, TIM_ADV_
;
_TIM_ADV_WriteChannelCtrlReg
(
TIMx
,
channel
,
regval
);
TIM_ADV_PutChannelValue
(
TIMx
,
channel
,
conf
->
ChannelValue
);
switch
(
conf
->
PinPolarity
)
{
case
TIM_ADV_PinPolarity_Disable
:
...
...
@@ -353,7 +353,7 @@ void TIM_ADV_EnableIdleOut(TIM_ADV_Type * TIMx, uint32_t channel, TIM_ADV_IdleOu
{
uint32_t
cr2
=
TIMx
->
CR2
&
~
(
(
TIM_ADV_CR2_OIS1_MASK
|
TIM_ADV_CR2_OIS1N_MASK
)
<<
(
channel
<<
1u
)
)
<<
(
channel
<<
1u
)
);
if
(
conf
->
PinPolarity
==
TIM_ADV_PinPolarity_Rising
)
{
...
...
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_tim_basic.c
浏览文件 @
bff97ce2
...
...
@@ -15,12 +15,12 @@ bool TIM_BASIC_Init(TIM_BASIC_Type * TIMx, TIM_BASIC_Init_Type * init)
;
/* Check StepFreqHz validity. */
if
(
(
init
->
StepFreqHz
==
0u
)
||
(
init
->
StepFreqHz
>
init
->
ClockFreqHz
)
)
if
(
(
init
->
StepFreqHz
==
0u
)
||
(
init
->
StepFreqHz
>
init
->
ClockFreqHz
)
)
{
return
false
;
}
/* Calculate prescaler of the timer.*/
TIMx
->
PSC
=
init
->
ClockFreqHz
/
init
->
StepFreqHz
-
1u
;
TIMx
->
PSC
=
init
->
ClockFreqHz
/
init
->
StepFreqHz
-
1u
;
/* Set the period length. */
TIMx
->
ARR
=
init
->
Period
;
return
true
;
...
...
bsp/mm32/libraries/MM32F3270_HAL/MM32F3270_HAL_Driver/Src/hal_usb.c
浏览文件 @
bff97ce2
...
...
@@ -141,7 +141,7 @@ void USB_EnableSuspend(USB_Type * USBx, bool enable)
}
}
void
USB_SetDeviceAddr
(
USB_Type
*
USBx
,
uint8_t
addr
)
{
...
...
bsp/mm32/mm32f3270-100ask-pitaya/applications/main.c
浏览文件 @
bff97ce2
...
...
@@ -18,7 +18,7 @@ int main(void)
{
/* set LED0 pin mode to output */
rt_pin_mode
(
LED0_PIN
,
PIN_MODE_OUTPUT
);
while
(
1
)
{
rt_pin_write
(
LED0_PIN
,
PIN_HIGH
);
...
...
bsp/mm32/mm32f3270-100ask-pitaya/board/board.c
浏览文件 @
bff97ce2
...
...
@@ -24,18 +24,18 @@ void SystemClock_Config(void)
/* 使能总线外设时钟 */
RCC
->
AHB1ENR
|=
(
1u
<<
13u
);
// 使能FLASH外设
FLASH
->
ACR
|=
(
4
<<
0
);
// 设置Flash的等待周期
/* 使能PWR/DBG */
RCC
->
APB1ENR
|=
(
1
<<
28
);
PWR
->
CR1
&=
~
(
2
<<
14
);
PWR
->
CR1
|=
(
2
<<
14
);
// 如果系统时钟需要达到最大频率 120MHz,需要将 VOS 设置为 2’b10 即 1.7V
RCC
->
CR
&=
~
((
1
<<
16
)
|
(
1
<<
24
)
);
// 关闭HSE/PLL
/* 配置HSE和PLL */
RCC
->
CR
|=
(
1
<<
16
);
// 使能HSE
while
(
0
==
((
RCC
->
CR
)
&
(
1
<<
17
)));
// 等待HSE稳定
RCC
->
PLLCFGR
|=
(
1
<<
0
);
// 配置PLL的时钟源HSE
RCC
->
PLLCFGR
&=
~
(
1
<<
1
);
// 配置PLL的时钟源HSE不分频后再作为时钟输入源
RCC
->
PLLCFGR
&=
~
(
0x7F
<<
16
);
...
...
@@ -54,7 +54,7 @@ void SystemClock_Config(void)
RCC
->
CFGR
|=
(
7
<<
24
);
// PLL输出时钟2分频后输出到MCO
RCC
->
CFGR
|=
(
2
<<
0
);
// 选择PLL输出用作系统时钟
while
(
0
==
(
RCC
->
CFGR
&
(
2
<<
2
)));
// 等待PLL输出用作系统时钟稳定
update_systemclock
();
update_ahb_clock
();
update_apb1_clock
();
...
...
@@ -65,7 +65,7 @@ static void update_systemclock(void)
{
uint32_t
tmpreg
=
0U
,
prediv
=
0U
,
pllclk
=
0U
,
pllmul
=
0U
;
uint32_t
sysclockfreq
=
HSI_VALUE
;
tmpreg
=
RCC
->
CFGR
;
/* 获取系统时钟源 */
switch
(
tmpreg
&
RCC_CFGR_SWS_MASK
)
...
...
@@ -106,12 +106,12 @@ static void update_systemclock(void)
prediv
=
(
RCC
->
PLLCFGR
>>
8
)
&
0x07
;
// PLL的分频系数:PLLCFGR[10:8]
pllmul
=
(
RCC
->
PLLCFGR
>>
16
)
&
0x7F
;
// PLL的倍频系数: PLLCFGR[22:16]
sysclockfreq
=
pllclk
*
(
pllmul
+
1
)
/
(
prediv
+
1
);
break
;
}
default:
break
;
}
SystemClockFreq
=
sysclockfreq
;
}
...
...
bsp/mm32/mm32f3270-100ask-pitaya/board/board.h
浏览文件 @
bff97ce2
...
...
@@ -45,7 +45,7 @@ extern int __bss_end;
#define __USE_HSE_PLL (1)
#define __USE_HSI_PLL (0)
#define RCC_CFGR_SWS_Pos (2U)
#define RCC_CFGR_SWS_Pos (2U)
#define RCC_CFGR_SWS_Msk (0x3UL << RCC_CFGR_SWS_Pos)
/*!< 0x0000000C */
#define RCC_CFGR_SWS_HSI 0x00000000U
/*!< HSI oscillator used as system clock */
...
...
bsp/mm32/mm32f3270-100ask-pitaya/board/mm32f3277g8p_msp.c
浏览文件 @
bff97ce2
...
...
@@ -29,7 +29,7 @@ void UART_MspInit(UART_Type *muart)
gpio_init
.
Speed
=
GPIO_Speed_50MHz
;
GPIO_Init
(
GPIOB
,
&
gpio_init
);
GPIO_PinAFConf
(
GPIOB
,
gpio_init
.
Pins
,
GPIO_AF_7
);
gpio_init
.
Pins
=
GPIO_PIN_7
;
gpio_init
.
PinMode
=
GPIO_PinMode_In_Floating
;
gpio_init
.
Speed
=
GPIO_Speed_50MHz
;
...
...
@@ -46,7 +46,7 @@ void UART_MspInit(UART_Type *muart)
gpio_init
.
Speed
=
GPIO_Speed_50MHz
;
GPIO_Init
(
GPIOD
,
&
gpio_init
);
GPIO_PinAFConf
(
GPIOD
,
gpio_init
.
Pins
,
GPIO_AF_7
);
gpio_init
.
Pins
=
GPIO_PIN_6
;
gpio_init
.
PinMode
=
GPIO_PinMode_In_Floating
;
gpio_init
.
Speed
=
GPIO_Speed_50MHz
;
...
...
@@ -63,7 +63,7 @@ void UART_MspInit(UART_Type *muart)
gpio_init
.
Speed
=
GPIO_Speed_50MHz
;
GPIO_Init
(
GPIOB
,
&
gpio_init
);
GPIO_PinAFConf
(
GPIOB
,
gpio_init
.
Pins
,
GPIO_AF_7
);
gpio_init
.
Pins
=
GPIO_PIN_11
;
gpio_init
.
PinMode
=
GPIO_PinMode_In_Floating
;
gpio_init
.
Speed
=
GPIO_Speed_50MHz
;
...
...
编辑
预览
Markdown
is supported
0%
请重试
或
添加新附件
.
添加附件
取消
You are about to add
0
people
to the discussion. Proceed with caution.
先完成此消息的编辑!
取消
想要评论请
注册
或
登录