stm32f7xx_hal_tim_ex.c 68.9 KB
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/**
  ******************************************************************************
  * @file    stm32f7xx_hal_tim_ex.c
  * @author  MCD Application Team
  * @brief   TIM HAL module driver.
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  *          This file provides firmware functions to manage the following
  *          functionalities of the Timer Extended peripheral:
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  *           + Time Hall Sensor Interface Initialization
  *           + Time Hall Sensor Interface Start
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  *           + Time Complementary signal break and dead time configuration
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  *           + Time Master and Slave synchronization configuration
  *           + Time Output Compare/PWM Channel Configuration (for channels 5 and 6)
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  *           + Timer remapping capabilities configuration
  @verbatim
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  ==============================================================================
                      ##### TIMER Extended features #####
  ==============================================================================
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  [..]
    The Timer Extended features include:
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    (#) Complementary outputs with programmable dead-time for :
        (++) Output Compare
        (++) PWM generation (Edge and Center-aligned Mode)
        (++) One-pulse mode output
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    (#) Synchronization circuit to control the timer with external signals and to
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        interconnect several timers together.
    (#) Break input to put the timer output signals in reset state or in a known state.
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    (#) Supports incremental (quadrature) encoder and hall-sensor circuitry for
        positioning purposes

            ##### How to use this driver #####
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  ==============================================================================
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    [..]
     (#) Initialize the TIM low level resources by implementing the following functions
         depending on the selected feature:
           (++) Hall Sensor output : HAL_TIMEx_HallSensor_MspInit()

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     (#) Initialize the TIM low level resources :
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        (##) Enable the TIM interface clock using __HAL_RCC_TIMx_CLK_ENABLE();
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        (##) TIM pins configuration
            (+++) Enable the clock for the TIM GPIOs using the following function:
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              __HAL_RCC_GPIOx_CLK_ENABLE();
            (+++) Configure these TIM pins in Alternate function mode using HAL_GPIO_Init();
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     (#) The external Clock can be configured, if needed (the default clock is the
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         internal clock from the APBx), using the following function:
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         HAL_TIM_ConfigClockSource, the clock configuration should be done before
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         any start function.
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     (#) Configure the TIM in the desired functioning mode using one of the
         initialization function of this driver:
          (++) HAL_TIMEx_HallSensor_Init() and HAL_TIMEx_ConfigCommutEvent(): to use the
               Timer Hall Sensor Interface and the commutation event with the corresponding
               Interrupt and DMA request if needed (Note that One Timer is used to interface
               with the Hall sensor Interface and another Timer should be used to use
               the commutation event).

     (#) Activate the TIM peripheral using one of the start functions:
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           (++) Complementary Output Compare : HAL_TIMEx_OCN_Start(), HAL_TIMEx_OCN_Start_DMA(), HAL_TIMEx_OC_Start_IT()
           (++) Complementary PWM generation : HAL_TIMEx_PWMN_Start(), HAL_TIMEx_PWMN_Start_DMA(), HAL_TIMEx_PWMN_Start_IT()
           (++) Complementary One-pulse mode output : HAL_TIMEx_OnePulseN_Start(), HAL_TIMEx_OnePulseN_Start_IT()
           (++) Hall Sensor output : HAL_TIMEx_HallSensor_Start(), HAL_TIMEx_HallSensor_Start_DMA(), HAL_TIMEx_HallSensor_Start_IT().

  @endverbatim
  ******************************************************************************
  * @attention
  *
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  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  * All rights reserved.</center></h2>
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  *
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  * This software component is licensed by ST under BSD 3-Clause license,
  * the "License"; You may not use this file except in compliance with the
  * License. You may obtain a copy of the License at:
  *                        opensource.org/licenses/BSD-3-Clause
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  *
  ******************************************************************************
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*/
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/* Includes ------------------------------------------------------------------*/
#include "stm32f7xx_hal.h"

/** @addtogroup STM32F7xx_HAL_Driver
  * @{
  */

/** @defgroup TIMEx TIMEx
  * @brief TIM Extended HAL module driver
  * @{
  */

#ifdef HAL_TIM_MODULE_ENABLED

/* Private typedef -----------------------------------------------------------*/
/* Private define ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private function prototypes -----------------------------------------------*/
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static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState);
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/* Exported functions --------------------------------------------------------*/
/** @defgroup TIMEx_Exported_Functions TIM Extended Exported Functions
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  * @{
  */

/** @defgroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
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  * @brief    Timer Hall Sensor functions
  *
@verbatim
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  ==============================================================================
                      ##### Timer Hall Sensor functions #####
  ==============================================================================
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  [..]
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    This section provides functions allowing to:
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    (+) Initialize and configure TIM HAL Sensor.
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    (+) De-initialize TIM HAL Sensor.
    (+) Start the Hall Sensor Interface.
    (+) Stop the Hall Sensor Interface.
    (+) Start the Hall Sensor Interface and enable interrupts.
    (+) Stop the Hall Sensor Interface and disable interrupts.
    (+) Start the Hall Sensor Interface and enable DMA transfers.
    (+) Stop the Hall Sensor Interface and disable DMA transfers.
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@endverbatim
  * @{
  */
/**
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  * @brief  Initializes the TIM Hall Sensor Interface and initialize the associated handle.
  * @param  htim TIM Hall Sensor Interface handle
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  * @param  sConfig TIM Hall Sensor configuration structure
  * @retval HAL status
  */
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HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig)
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{
  TIM_OC_InitTypeDef OC_Config;
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  /* Check the TIM handle allocation */
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  if (htim == NULL)
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  {
    return HAL_ERROR;
  }
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  /* Check the parameters */
  assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));
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  assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode));
  assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision));
  assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload));
  assert_param(IS_TIM_IC_POLARITY(sConfig->IC1Polarity));
  assert_param(IS_TIM_IC_PRESCALER(sConfig->IC1Prescaler));
  assert_param(IS_TIM_IC_FILTER(sConfig->IC1Filter));

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  if (htim->State == HAL_TIM_STATE_RESET)
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  {
    /* Allocate lock resource and initialize it */
    htim->Lock = HAL_UNLOCKED;

#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
    /* Reset interrupt callbacks to legacy week callbacks */
    TIM_ResetCallback(htim);

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    if (htim->HallSensor_MspInitCallback == NULL)
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    {
      htim->HallSensor_MspInitCallback = HAL_TIMEx_HallSensor_MspInit;
    }
    /* Init the low level hardware : GPIO, CLOCK, NVIC */
    htim->HallSensor_MspInitCallback(htim);
#else
    /* Init the low level hardware : GPIO, CLOCK, NVIC and DMA */
    HAL_TIMEx_HallSensor_MspInit(htim);
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
  }

  /* Set the TIM state */
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  htim->State = HAL_TIM_STATE_BUSY;
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  /* Configure the Time base in the Encoder Mode */
  TIM_Base_SetConfig(htim->Instance, &htim->Init);
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  /* Configure the Channel 1 as Input Channel to interface with the three Outputs of the  Hall sensor */
  TIM_TI1_SetConfig(htim->Instance, sConfig->IC1Polarity, TIM_ICSELECTION_TRC, sConfig->IC1Filter);
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  /* Reset the IC1PSC Bits */
  htim->Instance->CCMR1 &= ~TIM_CCMR1_IC1PSC;
  /* Set the IC1PSC value */
  htim->Instance->CCMR1 |= sConfig->IC1Prescaler;
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  /* Enable the Hall sensor interface (XOR function of the three inputs) */
  htim->Instance->CR2 |= TIM_CR2_TI1S;
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  /* Select the TIM_TS_TI1F_ED signal as Input trigger for the TIM */
  htim->Instance->SMCR &= ~TIM_SMCR_TS;
  htim->Instance->SMCR |= TIM_TS_TI1F_ED;
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  /* Use the TIM_TS_TI1F_ED signal to reset the TIM counter each edge detection */
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  htim->Instance->SMCR &= ~TIM_SMCR_SMS;
  htim->Instance->SMCR |= TIM_SLAVEMODE_RESET;
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  /* Program channel 2 in PWM 2 mode with the desired Commutation_Delay*/
  OC_Config.OCFastMode = TIM_OCFAST_DISABLE;
  OC_Config.OCIdleState = TIM_OCIDLESTATE_RESET;
  OC_Config.OCMode = TIM_OCMODE_PWM2;
  OC_Config.OCNIdleState = TIM_OCNIDLESTATE_RESET;
  OC_Config.OCNPolarity = TIM_OCNPOLARITY_HIGH;
  OC_Config.OCPolarity = TIM_OCPOLARITY_HIGH;
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  OC_Config.Pulse = sConfig->Commutation_Delay;

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  TIM_OC2_SetConfig(htim->Instance, &OC_Config);
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  /* Select OC2REF as trigger output on TRGO: write the MMS bits in the TIMx_CR2
    register to 101 */
  htim->Instance->CR2 &= ~TIM_CR2_MMS;
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  htim->Instance->CR2 |= TIM_TRGO_OC2REF;

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  /* Initialize the TIM state*/
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  htim->State = HAL_TIM_STATE_READY;
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  return HAL_OK;
}

/**
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  * @brief  DeInitializes the TIM Hall Sensor interface
  * @param  htim TIM Hall Sensor Interface handle
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  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim)
{
  /* Check the parameters */
  assert_param(IS_TIM_INSTANCE(htim->Instance));

  htim->State = HAL_TIM_STATE_BUSY;
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  /* Disable the TIM Peripheral Clock */
  __HAL_TIM_DISABLE(htim);

#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
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  if (htim->HallSensor_MspDeInitCallback == NULL)
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  {
    htim->HallSensor_MspDeInitCallback = HAL_TIMEx_HallSensor_MspDeInit;
  }
  /* DeInit the low level hardware */
  htim->HallSensor_MspDeInitCallback(htim);
#else
  /* DeInit the low level hardware: GPIO, CLOCK, NVIC */
  HAL_TIMEx_HallSensor_MspDeInit(htim);
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */

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  /* Change TIM state */
  htim->State = HAL_TIM_STATE_RESET;
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  /* Release Lock */
  __HAL_UNLOCK(htim);

  return HAL_OK;
}

/**
  * @brief  Initializes the TIM Hall Sensor MSP.
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  * @param  htim TIM Hall Sensor Interface handle
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  * @retval None
  */
__weak void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim)
{
  /* Prevent unused argument(s) compilation warning */
  UNUSED(htim);
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  /* NOTE : This function should not be modified, when the callback is needed,
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            the HAL_TIMEx_HallSensor_MspInit could be implemented in the user file
   */
}

/**
  * @brief  DeInitializes TIM Hall Sensor MSP.
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  * @param  htim TIM Hall Sensor Interface handle
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  * @retval None
  */
__weak void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim)
{
  /* Prevent unused argument(s) compilation warning */
  UNUSED(htim);
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  /* NOTE : This function should not be modified, when the callback is needed,
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            the HAL_TIMEx_HallSensor_MspDeInit could be implemented in the user file
   */
}

/**
  * @brief  Starts the TIM Hall Sensor Interface.
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  * @param  htim TIM Hall Sensor Interface handle
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  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim)
{
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  uint32_t tmpsmcr;

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  /* Check the parameters */
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  assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));

  /* Enable the Input Capture channel 1
    (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);

  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  {
    __HAL_TIM_ENABLE(htim);
  }

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  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Stops the TIM Hall sensor Interface.
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  * @param  htim TIM Hall Sensor Interface handle
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  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim)
{
  /* Check the parameters */
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  assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));

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  /* Disable the Input Capture channels 1, 2 and 3
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    (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);
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  /* Disable the Peripheral */
  __HAL_TIM_DISABLE(htim);
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  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Starts the TIM Hall Sensor Interface in interrupt mode.
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  * @param  htim TIM Hall Sensor Interface handle
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  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim)
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{
  uint32_t tmpsmcr;

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  /* Check the parameters */
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  assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));

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  /* Enable the capture compare Interrupts 1 event */
  __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
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  /* Enable the Input Capture channel 1
    (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);

  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  {
    __HAL_TIM_ENABLE(htim);
  }

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  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Stops the TIM Hall Sensor Interface in interrupt mode.
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  * @param  htim TIM Hall Sensor Interface handle
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  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim)
{
  /* Check the parameters */
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  assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));

  /* Disable the Input Capture channel 1
    (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);

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  /* Disable the capture compare Interrupts event */
  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
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  /* Disable the Peripheral */
  __HAL_TIM_DISABLE(htim);
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  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Starts the TIM Hall Sensor Interface in DMA mode.
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  * @param  htim TIM Hall Sensor Interface handle
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  * @param  pData The destination Buffer address.
  * @param  Length The length of data to be transferred from TIM peripheral to memory.
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length)
{
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  uint32_t tmpsmcr;

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  /* Check the parameters */
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  assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));

  if ((htim->State == HAL_TIM_STATE_BUSY))
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  {
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    return HAL_BUSY;
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  }
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  else if ((htim->State == HAL_TIM_STATE_READY))
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  {
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    if (((uint32_t)pData == 0U) && (Length > 0U))
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    {
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      return HAL_ERROR;
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    }
    else
    {
      htim->State = HAL_TIM_STATE_BUSY;
    }
  }
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  else
  {
    /* nothing to do */
  }
  /* Enable the Input Capture channel 1
    (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_ENABLE);

  /* Set the DMA Input Capture 1 Callbacks */
  htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMACaptureCplt;
  htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMACaptureHalfCplt;
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  /* Set the DMA error callback */
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  htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;

  /* Enable the DMA stream for Capture 1*/
  if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)&htim->Instance->CCR1, (uint32_t)pData, Length) != HAL_OK)
  {
    return HAL_ERROR;
  }
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  /* Enable the capture compare 1 Interrupt */
  __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
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  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  {
    __HAL_TIM_ENABLE(htim);
  }

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  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Stops the TIM Hall Sensor Interface in DMA mode.
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  * @param  htim TIM Hall Sensor Interface handle
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  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim)
{
  /* Check the parameters */
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  assert_param(IS_TIM_HALL_SENSOR_INTERFACE_INSTANCE(htim->Instance));

  /* Disable the Input Capture channel 1
    (in the Hall Sensor Interface the three possible channels that can be used are TIM_CHANNEL_1, TIM_CHANNEL_2 and TIM_CHANNEL_3) */
  TIM_CCxChannelCmd(htim->Instance, TIM_CHANNEL_1, TIM_CCx_DISABLE);


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  /* Disable the capture compare Interrupts 1 event */
  __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
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  (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
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  /* Disable the Peripheral */
  __HAL_TIM_DISABLE(htim);
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  /* Return function status */
  return HAL_OK;
}

/**
  * @}
  */
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/** @defgroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
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  *  @brief   Timer Complementary Output Compare functions
  *
@verbatim
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  ==============================================================================
              ##### Timer Complementary Output Compare functions #####
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  ==============================================================================
  [..]
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    This section provides functions allowing to:
    (+) Start the Complementary Output Compare/PWM.
    (+) Stop the Complementary Output Compare/PWM.
    (+) Start the Complementary Output Compare/PWM and enable interrupts.
    (+) Stop the Complementary Output Compare/PWM and disable interrupts.
    (+) Start the Complementary Output Compare/PWM and enable DMA transfers.
    (+) Stop the Complementary Output Compare/PWM and disable DMA transfers.
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@endverbatim
  * @{
  */
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/**
  * @brief  Starts the TIM Output Compare signal generation on the complementary
  *         output.
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  * @param  htim TIM Output Compare handle
  * @param  Channel TIM Channel to be enabled
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  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
{
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  uint32_t tmpsmcr;

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  /* Check the parameters */
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  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

  /* Enable the Capture compare channel N */
  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);

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  /* Enable the Main Output */
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  __HAL_TIM_MOE_ENABLE(htim);

  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  {
    __HAL_TIM_ENABLE(htim);
  }
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  /* Return function status */
  return HAL_OK;
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}
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/**
  * @brief  Stops the TIM Output Compare signal generation on the complementary
  *         output.
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  * @param  htim TIM handle
  * @param  Channel TIM Channel to be disabled
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  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
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{
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  /* Check the parameters */
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  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

  /* Disable the Capture compare channel N */
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  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
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  /* Disable the Main Output */
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  __HAL_TIM_MOE_DISABLE(htim);
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  /* Disable the Peripheral */
  __HAL_TIM_DISABLE(htim);
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  /* Return function status */
  return HAL_OK;
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}
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/**
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  * @brief  Starts the TIM Output Compare signal generation in interrupt mode
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  *         on the complementary output.
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  * @param  htim TIM OC handle
  * @param  Channel TIM Channel to be enabled
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  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
{
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  uint32_t tmpsmcr;

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  /* Check the parameters */
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  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

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  switch (Channel)
  {
    case TIM_CHANNEL_1:
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    {
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      /* Enable the TIM Output Compare interrupt */
      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
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      break;
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    }
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    case TIM_CHANNEL_2:
    {
      /* Enable the TIM Output Compare interrupt */
      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
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      break;
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    }
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    case TIM_CHANNEL_3:
    {
      /* Enable the TIM Output Compare interrupt */
      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
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      break;
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    }
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    default:
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      break;
  }

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  /* Enable the TIM Break interrupt */
  __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
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  /* Enable the Capture compare channel N */
  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);

  /* Enable the Main Output */
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  __HAL_TIM_MOE_ENABLE(htim);

  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  {
    __HAL_TIM_ENABLE(htim);
  }
623 624 625

  /* Return function status */
  return HAL_OK;
626
}
627 628

/**
629
  * @brief  Stops the TIM Output Compare signal generation in interrupt mode
630
  *         on the complementary output.
631 632
  * @param  htim TIM Output Compare handle
  * @param  Channel TIM Channel to be disabled
633 634 635 636 637 638 639 640
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
{
641
  uint32_t tmpccer;
642
  /* Check the parameters */
643 644
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

645 646 647
  switch (Channel)
  {
    case TIM_CHANNEL_1:
648
    {
649 650
      /* Disable the TIM Output Compare interrupt */
      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
651
      break;
652
    }
653

654 655 656 657
    case TIM_CHANNEL_2:
    {
      /* Disable the TIM Output Compare interrupt */
      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
658
      break;
659
    }
660

661 662 663 664
    case TIM_CHANNEL_3:
    {
      /* Disable the TIM Output Compare interrupt */
      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
665
      break;
666
    }
667

668
    default:
669
      break;
670 671 672 673 674 675 676
  }

  /* Disable the Capture compare channel N */
  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);

  /* Disable the TIM Break interrupt (only if no more channel is active) */
  tmpccer = htim->Instance->CCER;
677
  if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
678 679 680 681 682 683 684 685 686
  {
    __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
  }

  /* Disable the Main Output */
  __HAL_TIM_MOE_DISABLE(htim);

  /* Disable the Peripheral */
  __HAL_TIM_DISABLE(htim);
687

688 689
  /* Return function status */
  return HAL_OK;
690
}
691 692

/**
693
  * @brief  Starts the TIM Output Compare signal generation in DMA mode
694
  *         on the complementary output.
695 696
  * @param  htim TIM Output Compare handle
  * @param  Channel TIM Channel to be enabled
697 698 699 700 701 702 703 704 705 706
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  * @param  pData The source Buffer address.
  * @param  Length The length of data to be transferred from memory to TIM peripheral
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
{
707 708
  uint32_t tmpsmcr;

709
  /* Check the parameters */
710 711 712
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

  if ((htim->State == HAL_TIM_STATE_BUSY))
713
  {
714
    return HAL_BUSY;
715
  }
716
  else if ((htim->State == HAL_TIM_STATE_READY))
717
  {
718
    if (((uint32_t)pData == 0U) && (Length > 0U))
719
    {
720
      return HAL_ERROR;
721 722 723 724 725
    }
    else
    {
      htim->State = HAL_TIM_STATE_BUSY;
    }
726 727 728 729 730 731
  }
  else
  {
    /* nothing to do  */
  }

732 733 734
  switch (Channel)
  {
    case TIM_CHANNEL_1:
735 736 737 738 739
    {
      /* Set the DMA compare callbacks */
      htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
      htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;

740
      /* Set the DMA error callback */
741 742 743 744 745 746 747
      htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;

      /* Enable the DMA stream */
      if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK)
      {
        return HAL_ERROR;
      }
748 749
      /* Enable the TIM Output Compare DMA request */
      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
750
      break;
751
    }
752

753 754
    case TIM_CHANNEL_2:
    {
755 756 757 758
      /* Set the DMA compare callbacks */
      htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
      htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;

759
      /* Set the DMA error callback */
760 761 762 763 764 765 766
      htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;

      /* Enable the DMA stream */
      if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK)
      {
        return HAL_ERROR;
      }
767 768
      /* Enable the TIM Output Compare DMA request */
      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
769
      break;
770
    }
771

772 773
    case TIM_CHANNEL_3:
    {
774 775 776 777
      /* Set the DMA compare callbacks */
      htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
      htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;

778
      /* Set the DMA error callback */
779 780 781 782 783 784 785
      htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;

      /* Enable the DMA stream */
      if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK)
      {
        return HAL_ERROR;
      }
786
      /* Enable the TIM Output Compare DMA request */
787 788
      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
      break;
789
    }
790

791
    default:
792
      break;
793 794 795 796
  }

  /* Enable the Capture compare channel N */
  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
797

798 799
  /* Enable the Main Output */
  __HAL_TIM_MOE_ENABLE(htim);
800 801 802 803 804 805 806 807

  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  {
    __HAL_TIM_ENABLE(htim);
  }

808 809 810 811 812
  /* Return function status */
  return HAL_OK;
}

/**
813
  * @brief  Stops the TIM Output Compare signal generation in DMA mode
814
  *         on the complementary output.
815 816
  * @param  htim TIM Output Compare handle
  * @param  Channel TIM Channel to be disabled
817 818 819 820 821 822 823 824 825
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
{
  /* Check the parameters */
826 827
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

828 829 830
  switch (Channel)
  {
    case TIM_CHANNEL_1:
831
    {
832 833
      /* Disable the TIM Output Compare DMA request */
      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
834 835
      (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
      break;
836
    }
837

838 839 840 841
    case TIM_CHANNEL_2:
    {
      /* Disable the TIM Output Compare DMA request */
      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
842 843
      (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
      break;
844
    }
845

846 847 848 849
    case TIM_CHANNEL_3:
    {
      /* Disable the TIM Output Compare DMA request */
      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
850 851
      (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
      break;
852
    }
853

854
    default:
855 856 857
      break;
  }

858 859
  /* Disable the Capture compare channel N */
  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
860

861 862
  /* Disable the Main Output */
  __HAL_TIM_MOE_DISABLE(htim);
863

864 865
  /* Disable the Peripheral */
  __HAL_TIM_DISABLE(htim);
866

867 868
  /* Change the htim state */
  htim->State = HAL_TIM_STATE_READY;
869

870 871 872 873 874 875 876
  /* Return function status */
  return HAL_OK;
}

/**
  * @}
  */
877

878
/** @defgroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
879 880 881
  * @brief    Timer Complementary PWM functions
  *
@verbatim
882 883
  ==============================================================================
                 ##### Timer Complementary PWM functions #####
884 885
  ==============================================================================
  [..]
886 887 888 889 890 891 892 893 894 895 896 897 898 899 900 901 902
    This section provides functions allowing to:
    (+) Start the Complementary PWM.
    (+) Stop the Complementary PWM.
    (+) Start the Complementary PWM and enable interrupts.
    (+) Stop the Complementary PWM and disable interrupts.
    (+) Start the Complementary PWM and enable DMA transfers.
    (+) Stop the Complementary PWM and disable DMA transfers.
    (+) Start the Complementary Input Capture measurement.
    (+) Stop the Complementary Input Capture.
    (+) Start the Complementary Input Capture and enable interrupts.
    (+) Stop the Complementary Input Capture and disable interrupts.
    (+) Start the Complementary Input Capture and enable DMA transfers.
    (+) Stop the Complementary Input Capture and disable DMA transfers.
    (+) Start the Complementary One Pulse generation.
    (+) Stop the Complementary One Pulse.
    (+) Start the Complementary One Pulse and enable interrupts.
    (+) Stop the Complementary One Pulse and disable interrupts.
903

904 905 906 907 908 909
@endverbatim
  * @{
  */

/**
  * @brief  Starts the PWM signal generation on the complementary output.
910 911
  * @param  htim TIM handle
  * @param  Channel TIM Channel to be enabled
912 913 914 915 916 917 918 919
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel)
{
920 921
  uint32_t tmpsmcr;

922
  /* Check the parameters */
923 924
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

925 926
  /* Enable the complementary PWM output  */
  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
927

928 929
  /* Enable the Main Output */
  __HAL_TIM_MOE_ENABLE(htim);
930 931 932 933 934 935 936 937

  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  {
    __HAL_TIM_ENABLE(htim);
  }

938 939
  /* Return function status */
  return HAL_OK;
940
}
941 942 943

/**
  * @brief  Stops the PWM signal generation on the complementary output.
944 945
  * @param  htim TIM handle
  * @param  Channel TIM Channel to be disabled
946 947 948 949 950 951 952
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel)
953
{
954
  /* Check the parameters */
955 956
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

957
  /* Disable the complementary PWM output  */
958 959
  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);

960 961
  /* Disable the Main Output */
  __HAL_TIM_MOE_DISABLE(htim);
962

963 964
  /* Disable the Peripheral */
  __HAL_TIM_DISABLE(htim);
965

966 967
  /* Return function status */
  return HAL_OK;
968
}
969 970

/**
971
  * @brief  Starts the PWM signal generation in interrupt mode on the
972
  *         complementary output.
973 974
  * @param  htim TIM handle
  * @param  Channel TIM Channel to be disabled
975 976 977 978 979 980 981 982
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
{
983 984
  uint32_t tmpsmcr;

985
  /* Check the parameters */
986 987
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

988 989 990
  switch (Channel)
  {
    case TIM_CHANNEL_1:
991
    {
992 993
      /* Enable the TIM Capture/Compare 1 interrupt */
      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
994
      break;
995
    }
996

997 998 999 1000
    case TIM_CHANNEL_2:
    {
      /* Enable the TIM Capture/Compare 2 interrupt */
      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
1001
      break;
1002
    }
1003

1004 1005 1006 1007
    case TIM_CHANNEL_3:
    {
      /* Enable the TIM Capture/Compare 3 interrupt */
      __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC3);
1008
      break;
1009
    }
1010

1011
    default:
1012 1013 1014
      break;
  }

1015 1016
  /* Enable the TIM Break interrupt */
  __HAL_TIM_ENABLE_IT(htim, TIM_IT_BREAK);
1017

1018 1019
  /* Enable the complementary PWM output  */
  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);
1020

1021 1022
  /* Enable the Main Output */
  __HAL_TIM_MOE_ENABLE(htim);
1023 1024 1025 1026 1027 1028 1029 1030

  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  {
    __HAL_TIM_ENABLE(htim);
  }

1031 1032
  /* Return function status */
  return HAL_OK;
1033
}
1034 1035

/**
1036
  * @brief  Stops the PWM signal generation in interrupt mode on the
1037
  *         complementary output.
1038 1039
  * @param  htim TIM handle
  * @param  Channel TIM Channel to be disabled
1040 1041 1042 1043 1044 1045
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  * @retval HAL status
  */
1046
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel)
1047
{
1048 1049
  uint32_t tmpccer;

1050
  /* Check the parameters */
1051
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));
1052 1053 1054 1055

  switch (Channel)
  {
    case TIM_CHANNEL_1:
1056
    {
1057 1058
      /* Disable the TIM Capture/Compare 1 interrupt */
      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
1059
      break;
1060
    }
1061

1062 1063 1064 1065
    case TIM_CHANNEL_2:
    {
      /* Disable the TIM Capture/Compare 2 interrupt */
      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
1066
      break;
1067
    }
1068

1069 1070 1071 1072
    case TIM_CHANNEL_3:
    {
      /* Disable the TIM Capture/Compare 3 interrupt */
      __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC3);
1073
      break;
1074
    }
1075

1076
    default:
1077
      break;
1078
  }
1079

1080 1081
  /* Disable the complementary PWM output  */
  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);
1082

1083 1084
  /* Disable the TIM Break interrupt (only if no more channel is active) */
  tmpccer = htim->Instance->CCER;
1085
  if ((tmpccer & (TIM_CCER_CC1NE | TIM_CCER_CC2NE | TIM_CCER_CC3NE)) == (uint32_t)RESET)
1086 1087 1088
  {
    __HAL_TIM_DISABLE_IT(htim, TIM_IT_BREAK);
  }
1089

1090 1091
  /* Disable the Main Output */
  __HAL_TIM_MOE_DISABLE(htim);
1092

1093 1094
  /* Disable the Peripheral */
  __HAL_TIM_DISABLE(htim);
1095

1096 1097
  /* Return function status */
  return HAL_OK;
1098
}
1099 1100

/**
1101
  * @brief  Starts the TIM PWM signal generation in DMA mode on the
1102
  *         complementary output
1103 1104
  * @param  htim TIM handle
  * @param  Channel TIM Channel to be enabled
1105 1106 1107 1108 1109 1110 1111 1112 1113 1114
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  * @param  pData The source Buffer address.
  * @param  Length The length of data to be transferred from memory to TIM peripheral
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length)
{
1115 1116
  uint32_t tmpsmcr;

1117
  /* Check the parameters */
1118 1119 1120
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

  if ((htim->State == HAL_TIM_STATE_BUSY))
1121
  {
1122
    return HAL_BUSY;
1123
  }
1124
  else if ((htim->State == HAL_TIM_STATE_READY))
1125
  {
1126
    if (((uint32_t)pData == 0U) && (Length > 0U))
1127
    {
1128
      return HAL_ERROR;
1129 1130 1131 1132 1133
    }
    else
    {
      htim->State = HAL_TIM_STATE_BUSY;
    }
1134 1135 1136 1137 1138
  }
  else
  {
    /* nothing to do */
  }
1139 1140 1141
  switch (Channel)
  {
    case TIM_CHANNEL_1:
1142 1143 1144 1145 1146
    {
      /* Set the DMA compare callbacks */
      htim->hdma[TIM_DMA_ID_CC1]->XferCpltCallback = TIM_DMADelayPulseCplt;
      htim->hdma[TIM_DMA_ID_CC1]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;

1147
      /* Set the DMA error callback */
1148 1149 1150 1151 1152 1153 1154
      htim->hdma[TIM_DMA_ID_CC1]->XferErrorCallback = TIM_DMAError ;

      /* Enable the DMA stream */
      if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC1], (uint32_t)pData, (uint32_t)&htim->Instance->CCR1, Length) != HAL_OK)
      {
        return HAL_ERROR;
      }
1155 1156
      /* Enable the TIM Capture/Compare 1 DMA request */
      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC1);
1157
      break;
1158
    }
1159

1160 1161
    case TIM_CHANNEL_2:
    {
1162 1163 1164 1165
      /* Set the DMA compare callbacks */
      htim->hdma[TIM_DMA_ID_CC2]->XferCpltCallback = TIM_DMADelayPulseCplt;
      htim->hdma[TIM_DMA_ID_CC2]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;

1166
      /* Set the DMA error callback */
1167 1168 1169 1170 1171 1172 1173
      htim->hdma[TIM_DMA_ID_CC2]->XferErrorCallback = TIM_DMAError ;

      /* Enable the DMA stream */
      if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC2], (uint32_t)pData, (uint32_t)&htim->Instance->CCR2, Length) != HAL_OK)
      {
        return HAL_ERROR;
      }
1174 1175
      /* Enable the TIM Capture/Compare 2 DMA request */
      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC2);
1176
      break;
1177
    }
1178

1179 1180
    case TIM_CHANNEL_3:
    {
1181 1182 1183 1184
      /* Set the DMA compare callbacks */
      htim->hdma[TIM_DMA_ID_CC3]->XferCpltCallback = TIM_DMADelayPulseCplt;
      htim->hdma[TIM_DMA_ID_CC3]->XferHalfCpltCallback = TIM_DMADelayPulseHalfCplt;

1185
      /* Set the DMA error callback */
1186 1187 1188 1189 1190 1191 1192
      htim->hdma[TIM_DMA_ID_CC3]->XferErrorCallback = TIM_DMAError ;

      /* Enable the DMA stream */
      if (HAL_DMA_Start_IT(htim->hdma[TIM_DMA_ID_CC3], (uint32_t)pData, (uint32_t)&htim->Instance->CCR3, Length) != HAL_OK)
      {
        return HAL_ERROR;
      }
1193 1194
      /* Enable the TIM Capture/Compare 3 DMA request */
      __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_CC3);
1195
      break;
1196
    }
1197

1198
    default:
1199
      break;
1200 1201 1202
  }

  /* Enable the complementary PWM output  */
1203 1204
  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_ENABLE);

1205
  /* Enable the Main Output */
1206 1207 1208 1209 1210 1211 1212 1213 1214
  __HAL_TIM_MOE_ENABLE(htim);

  /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */
  tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS;
  if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr))
  {
    __HAL_TIM_ENABLE(htim);
  }

1215 1216 1217 1218 1219 1220 1221
  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Stops the TIM PWM signal generation in DMA mode on the complementary
  *         output
1222 1223
  * @param  htim TIM handle
  * @param  Channel TIM Channel to be disabled
1224 1225 1226 1227 1228 1229 1230 1231 1232
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  *            @arg TIM_CHANNEL_3: TIM Channel 3 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel)
{
  /* Check the parameters */
1233 1234
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, Channel));

1235 1236 1237
  switch (Channel)
  {
    case TIM_CHANNEL_1:
1238
    {
1239 1240
      /* Disable the TIM Capture/Compare 1 DMA request */
      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC1);
1241 1242
      (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC1]);
      break;
1243
    }
1244

1245 1246 1247 1248
    case TIM_CHANNEL_2:
    {
      /* Disable the TIM Capture/Compare 2 DMA request */
      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC2);
1249 1250
      (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC2]);
      break;
1251
    }
1252

1253 1254 1255 1256
    case TIM_CHANNEL_3:
    {
      /* Disable the TIM Capture/Compare 3 DMA request */
      __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_CC3);
1257 1258
      (void)HAL_DMA_Abort_IT(htim->hdma[TIM_DMA_ID_CC3]);
      break;
1259
    }
1260

1261
    default:
1262 1263 1264
      break;
  }

1265
  /* Disable the complementary PWM output */
1266 1267
  TIM_CCxNChannelCmd(htim->Instance, Channel, TIM_CCxN_DISABLE);

1268
  /* Disable the Main Output */
1269
  __HAL_TIM_MOE_DISABLE(htim);
1270 1271 1272

  /* Disable the Peripheral */
  __HAL_TIM_DISABLE(htim);
1273

1274 1275
  /* Change the htim state */
  htim->State = HAL_TIM_STATE_READY;
1276

1277 1278 1279 1280 1281 1282 1283
  /* Return function status */
  return HAL_OK;
}

/**
  * @}
  */
1284

1285
/** @defgroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
1286 1287 1288
  * @brief    Timer Complementary One Pulse functions
  *
@verbatim
1289 1290
  ==============================================================================
                ##### Timer Complementary One Pulse functions #####
1291 1292
  ==============================================================================
  [..]
1293 1294 1295 1296 1297
    This section provides functions allowing to:
    (+) Start the Complementary One Pulse generation.
    (+) Stop the Complementary One Pulse.
    (+) Start the Complementary One Pulse and enable interrupts.
    (+) Stop the Complementary One Pulse and disable interrupts.
1298

1299 1300 1301 1302 1303
@endverbatim
  * @{
  */

/**
1304
  * @brief  Starts the TIM One Pulse signal generation on the complementary
1305
  *         output.
1306 1307
  * @param  htim TIM One Pulse handle
  * @param  OutputChannel TIM Channel to be enabled
1308 1309 1310 1311 1312 1313
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
1314
{
1315
  /* Check the parameters */
1316 1317
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));

1318
  /* Enable the complementary One Pulse output */
1319 1320
  TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);

1321 1322
  /* Enable the Main Output */
  __HAL_TIM_MOE_ENABLE(htim);
1323

1324 1325 1326 1327 1328
  /* Return function status */
  return HAL_OK;
}

/**
1329
  * @brief  Stops the TIM One Pulse signal generation on the complementary
1330
  *         output.
1331 1332
  * @param  htim TIM One Pulse handle
  * @param  OutputChannel TIM Channel to be disabled
1333 1334 1335 1336 1337 1338 1339 1340 1341
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
{

  /* Check the parameters */
1342
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1343 1344

  /* Disable the complementary One Pulse output */
1345 1346
  TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);

1347
  /* Disable the Main Output */
1348 1349
  __HAL_TIM_MOE_DISABLE(htim);

1350
  /* Disable the Peripheral */
1351 1352
  __HAL_TIM_DISABLE(htim);

1353 1354 1355 1356 1357 1358 1359
  /* Return function status */
  return HAL_OK;
}

/**
  * @brief  Starts the TIM One Pulse signal generation in interrupt mode on the
  *         complementary channel.
1360 1361
  * @param  htim TIM One Pulse handle
  * @param  OutputChannel TIM Channel to be enabled
1362 1363 1364 1365 1366 1367 1368 1369
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
{
  /* Check the parameters */
1370
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1371 1372 1373

  /* Enable the TIM Capture/Compare 1 interrupt */
  __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC1);
1374

1375 1376
  /* Enable the TIM Capture/Compare 2 interrupt */
  __HAL_TIM_ENABLE_IT(htim, TIM_IT_CC2);
1377

1378
  /* Enable the complementary One Pulse output */
1379 1380
  TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_ENABLE);

1381 1382
  /* Enable the Main Output */
  __HAL_TIM_MOE_ENABLE(htim);
1383

1384 1385
  /* Return function status */
  return HAL_OK;
1386 1387
}

1388 1389 1390
/**
  * @brief  Stops the TIM One Pulse signal generation in interrupt mode on the
  *         complementary channel.
1391 1392
  * @param  htim TIM One Pulse handle
  * @param  OutputChannel TIM Channel to be disabled
1393 1394 1395 1396 1397 1398 1399 1400
  *          This parameter can be one of the following values:
  *            @arg TIM_CHANNEL_1: TIM Channel 1 selected
  *            @arg TIM_CHANNEL_2: TIM Channel 2 selected
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel)
{
  /* Check the parameters */
1401
  assert_param(IS_TIM_CCXN_INSTANCE(htim->Instance, OutputChannel));
1402 1403 1404

  /* Disable the TIM Capture/Compare 1 interrupt */
  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC1);
1405

1406 1407
  /* Disable the TIM Capture/Compare 2 interrupt */
  __HAL_TIM_DISABLE_IT(htim, TIM_IT_CC2);
1408

1409 1410
  /* Disable the complementary One Pulse output */
  TIM_CCxNChannelCmd(htim->Instance, OutputChannel, TIM_CCxN_DISABLE);
1411

1412 1413
  /* Disable the Main Output */
  __HAL_TIM_MOE_DISABLE(htim);
1414

1415
  /* Disable the Peripheral */
1416 1417
  __HAL_TIM_DISABLE(htim);

1418 1419 1420 1421 1422 1423 1424
  /* Return function status */
  return HAL_OK;
}

/**
  * @}
  */
1425

1426
/** @defgroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
1427 1428 1429
  * @brief    Peripheral Control functions
  *
@verbatim
1430 1431
  ==============================================================================
                    ##### Peripheral Control functions #####
1432 1433
  ==============================================================================
  [..]
1434
    This section provides functions allowing to:
1435 1436 1437 1438 1439 1440 1441 1442
      (+) Configure the commutation event in case of use of the Hall sensor interface.
      (+) Configure Output channels for OC and PWM mode.

      (+) Configure Complementary channels, break features and dead time.
      (+) Configure Master synchronization.
      (+) Configure timer remapping capabilities.
      (+) Enable or disable channel grouping.

1443 1444 1445
@endverbatim
  * @{
  */
1446

1447 1448
/**
  * @brief  Configure the TIM commutation event sequence.
1449
  * @note  This function is mandatory to use the commutation event in order to
1450
  *        update the configuration at each commutation detection on the TRGI input of the Timer,
1451 1452 1453
  *        the typical use of this feature is with the use of another Timer(interface Timer)
  *        configured in Hall sensor interface, this interface Timer will generate the
  *        commutation at its TRGO output (connected to Timer used in this function) each time
1454
  *        the TI1 of the Interface Timer detect a commutation at its input TI1.
1455 1456
  * @param  htim TIM handle
  * @param  InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1457 1458 1459 1460 1461
  *          This parameter can be one of the following values:
  *            @arg TIM_TS_ITR0: Internal trigger 0 selected
  *            @arg TIM_TS_ITR1: Internal trigger 1 selected
  *            @arg TIM_TS_ITR2: Internal trigger 2 selected
  *            @arg TIM_TS_ITR3: Internal trigger 3 selected
1462 1463
  *            @arg TIM_TS_NONE: No trigger is needed
  * @param  CommutationSource the Commutation Event source
1464 1465 1466 1467 1468
  *          This parameter can be one of the following values:
  *            @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  *            @arg TIM_COMMUTATION_SOFTWARE:  Commutation source is set by software using the COMG bit
  * @retval HAL status
  */
1469
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent(TIM_HandleTypeDef *htim, uint32_t  InputTrigger, uint32_t  CommutationSource)
1470 1471
{
  /* Check the parameters */
1472
  assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1473
  assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1474

1475
  __HAL_LOCK(htim);
1476

1477 1478
  if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
      (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1479
  {
1480 1481 1482 1483
    /* Select the Input trigger */
    htim->Instance->SMCR &= ~TIM_SMCR_TS;
    htim->Instance->SMCR |= InputTrigger;
  }
1484

1485 1486 1487 1488 1489
  /* Select the Capture Compare preload feature */
  htim->Instance->CR2 |= TIM_CR2_CCPC;
  /* Select the Commutation event source */
  htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  htim->Instance->CR2 |= CommutationSource;
1490 1491 1492 1493 1494 1495 1496

  /* Disable Commutation Interrupt */
  __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);

  /* Disable Commutation DMA request */
  __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);

1497
  __HAL_UNLOCK(htim);
1498

1499 1500 1501 1502 1503
  return HAL_OK;
}

/**
  * @brief  Configure the TIM commutation event sequence with interrupt.
1504
  * @note  This function is mandatory to use the commutation event in order to
1505
  *        update the configuration at each commutation detection on the TRGI input of the Timer,
1506 1507 1508
  *        the typical use of this feature is with the use of another Timer(interface Timer)
  *        configured in Hall sensor interface, this interface Timer will generate the
  *        commutation at its TRGO output (connected to Timer used in this function) each time
1509
  *        the TI1 of the Interface Timer detect a commutation at its input TI1.
1510 1511
  * @param  htim TIM handle
  * @param  InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1512 1513 1514 1515 1516 1517
  *          This parameter can be one of the following values:
  *            @arg TIM_TS_ITR0: Internal trigger 0 selected
  *            @arg TIM_TS_ITR1: Internal trigger 1 selected
  *            @arg TIM_TS_ITR2: Internal trigger 2 selected
  *            @arg TIM_TS_ITR3: Internal trigger 3 selected
  *            @arg TIM_TS_NONE: No trigger is needed
1518
  * @param  CommutationSource the Commutation Event source
1519 1520 1521 1522 1523
  *          This parameter can be one of the following values:
  *            @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  *            @arg TIM_COMMUTATION_SOFTWARE:  Commutation source is set by software using the COMG bit
  * @retval HAL status
  */
1524
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_IT(TIM_HandleTypeDef *htim, uint32_t  InputTrigger, uint32_t  CommutationSource)
1525 1526
{
  /* Check the parameters */
1527
  assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1528
  assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1529

1530
  __HAL_LOCK(htim);
1531

1532 1533
  if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
      (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1534
  {
1535 1536 1537 1538
    /* Select the Input trigger */
    htim->Instance->SMCR &= ~TIM_SMCR_TS;
    htim->Instance->SMCR |= InputTrigger;
  }
1539

1540 1541 1542 1543 1544
  /* Select the Capture Compare preload feature */
  htim->Instance->CR2 |= TIM_CR2_CCPC;
  /* Select the Commutation event source */
  htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  htim->Instance->CR2 |= CommutationSource;
1545 1546 1547 1548 1549

  /* Disable Commutation DMA request */
  __HAL_TIM_DISABLE_DMA(htim, TIM_DMA_COM);

  /* Enable the Commutation Interrupt */
1550 1551 1552
  __HAL_TIM_ENABLE_IT(htim, TIM_IT_COM);

  __HAL_UNLOCK(htim);
1553

1554 1555 1556 1557 1558
  return HAL_OK;
}

/**
  * @brief  Configure the TIM commutation event sequence with DMA.
1559
  * @note  This function is mandatory to use the commutation event in order to
1560
  *        update the configuration at each commutation detection on the TRGI input of the Timer,
1561 1562 1563
  *        the typical use of this feature is with the use of another Timer(interface Timer)
  *        configured in Hall sensor interface, this interface Timer will generate the
  *        commutation at its TRGO output (connected to Timer used in this function) each time
1564
  *        the TI1 of the Interface Timer detect a commutation at its input TI1.
1565 1566 1567
  * @note  The user should configure the DMA in his own software, in This function only the COMDE bit is set
  * @param  htim TIM handle
  * @param  InputTrigger the Internal trigger corresponding to the Timer Interfacing with the Hall sensor
1568 1569 1570 1571 1572 1573
  *          This parameter can be one of the following values:
  *            @arg TIM_TS_ITR0: Internal trigger 0 selected
  *            @arg TIM_TS_ITR1: Internal trigger 1 selected
  *            @arg TIM_TS_ITR2: Internal trigger 2 selected
  *            @arg TIM_TS_ITR3: Internal trigger 3 selected
  *            @arg TIM_TS_NONE: No trigger is needed
1574
  * @param  CommutationSource the Commutation Event source
1575 1576 1577 1578 1579
  *          This parameter can be one of the following values:
  *            @arg TIM_COMMUTATION_TRGI: Commutation source is the TRGI of the Interface Timer
  *            @arg TIM_COMMUTATION_SOFTWARE:  Commutation source is set by software using the COMG bit
  * @retval HAL status
  */
1580
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutEvent_DMA(TIM_HandleTypeDef *htim, uint32_t  InputTrigger, uint32_t  CommutationSource)
1581 1582
{
  /* Check the parameters */
1583
  assert_param(IS_TIM_COMMUTATION_EVENT_INSTANCE(htim->Instance));
1584
  assert_param(IS_TIM_INTERNAL_TRIGGEREVENT_SELECTION(InputTrigger));
1585

1586
  __HAL_LOCK(htim);
1587

1588 1589
  if ((InputTrigger == TIM_TS_ITR0) || (InputTrigger == TIM_TS_ITR1) ||
      (InputTrigger == TIM_TS_ITR2) || (InputTrigger == TIM_TS_ITR3))
1590
  {
1591 1592 1593 1594
    /* Select the Input trigger */
    htim->Instance->SMCR &= ~TIM_SMCR_TS;
    htim->Instance->SMCR |= InputTrigger;
  }
1595

1596 1597 1598 1599 1600
  /* Select the Capture Compare preload feature */
  htim->Instance->CR2 |= TIM_CR2_CCPC;
  /* Select the Commutation event source */
  htim->Instance->CR2 &= ~TIM_CR2_CCUS;
  htim->Instance->CR2 |= CommutationSource;
1601

1602 1603
  /* Enable the Commutation DMA Request */
  /* Set the DMA Commutation Callback */
1604 1605
  htim->hdma[TIM_DMA_ID_COMMUTATION]->XferCpltCallback = TIMEx_DMACommutationCplt;
  htim->hdma[TIM_DMA_ID_COMMUTATION]->XferHalfCpltCallback = TIMEx_DMACommutationHalfCplt;
1606
  /* Set the DMA error callback */
1607 1608 1609 1610 1611
  htim->hdma[TIM_DMA_ID_COMMUTATION]->XferErrorCallback = TIM_DMAError;

  /* Disable Commutation Interrupt */
  __HAL_TIM_DISABLE_IT(htim, TIM_IT_COM);

1612 1613 1614 1615
  /* Enable the Commutation DMA Request */
  __HAL_TIM_ENABLE_DMA(htim, TIM_DMA_COM);

  __HAL_UNLOCK(htim);
1616

1617
  return HAL_OK;
1618
}
1619 1620 1621

/**
  * @brief  Configures the TIM in master mode.
1622
  * @param  htim TIM handle.
1623
  * @param  sMasterConfig pointer to a TIM_MasterConfigTypeDef structure that
1624 1625
  *         contains the selected trigger output (TRGO) and the Master/Slave
  *         mode.
1626 1627
  * @retval HAL status
  */
1628 1629
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim,
                                                        TIM_MasterConfigTypeDef *sMasterConfig)
1630
{
1631 1632
  uint32_t tmpcr2;
  uint32_t tmpsmcr;
1633 1634 1635 1636 1637

  /* Check the parameters */
  assert_param(IS_TIM_SYNCHRO_INSTANCE(htim->Instance));
  assert_param(IS_TIM_TRGO_SOURCE(sMasterConfig->MasterOutputTrigger));
  assert_param(IS_TIM_MSM_STATE(sMasterConfig->MasterSlaveMode));
1638

1639 1640 1641
  /* Check input state */
  __HAL_LOCK(htim);

1642 1643 1644 1645
  /* Change the handler state */
  htim->State = HAL_TIM_STATE_BUSY;

  /* Get the TIMx CR2 register value */
1646 1647 1648 1649 1650 1651 1652 1653 1654 1655
  tmpcr2 = htim->Instance->CR2;

  /* Get the TIMx SMCR register value */
  tmpsmcr = htim->Instance->SMCR;

  /* If the timer supports ADC synchronization through TRGO2, set the master mode selection 2 */
  if (IS_TIM_TRGO2_INSTANCE(htim->Instance))
  {
    /* Check the parameters */
    assert_param(IS_TIM_TRGO2_SOURCE(sMasterConfig->MasterOutputTrigger2));
1656

1657 1658 1659 1660 1661
    /* Clear the MMS2 bits */
    tmpcr2 &= ~TIM_CR2_MMS2;
    /* Select the TRGO2 source*/
    tmpcr2 |= sMasterConfig->MasterOutputTrigger2;
  }
1662

1663 1664 1665 1666 1667 1668 1669 1670 1671
  /* Reset the MMS Bits */
  tmpcr2 &= ~TIM_CR2_MMS;
  /* Select the TRGO source */
  tmpcr2 |=  sMasterConfig->MasterOutputTrigger;

  /* Reset the MSM Bit */
  tmpsmcr &= ~TIM_SMCR_MSM;
  /* Set master mode */
  tmpsmcr |= sMasterConfig->MasterSlaveMode;
1672

1673 1674
  /* Update TIMx CR2 */
  htim->Instance->CR2 = tmpcr2;
1675

1676 1677 1678
  /* Update TIMx SMCR */
  htim->Instance->SMCR = tmpsmcr;

1679 1680 1681
  /* Change the htim state */
  htim->State = HAL_TIM_STATE_READY;

1682
  __HAL_UNLOCK(htim);
1683

1684
  return HAL_OK;
1685 1686
}

1687
/**
1688
  * @brief  Configures the Break feature, dead time, Lock level, OSSI/OSSR State
1689
  *         and the AOE(automatic output enable).
1690 1691 1692
  * @param  htim TIM handle
  * @param  sBreakDeadTimeConfig pointer to a TIM_ConfigBreakDeadConfigTypeDef structure that
  *         contains the BDTR Register configuration  information for the TIM peripheral.
1693
  * @retval HAL status
1694 1695 1696
  */
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim,
                                                TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig)
1697
{
1698 1699 1700
  /* Keep this variable initialized to 0 as it is used to configure BDTR register */
  uint32_t tmpbdtr = 0U;

1701 1702 1703 1704 1705 1706 1707 1708 1709 1710
  /* Check the parameters */
  assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
  assert_param(IS_TIM_OSSR_STATE(sBreakDeadTimeConfig->OffStateRunMode));
  assert_param(IS_TIM_OSSI_STATE(sBreakDeadTimeConfig->OffStateIDLEMode));
  assert_param(IS_TIM_LOCK_LEVEL(sBreakDeadTimeConfig->LockLevel));
  assert_param(IS_TIM_DEADTIME(sBreakDeadTimeConfig->DeadTime));
  assert_param(IS_TIM_BREAK_STATE(sBreakDeadTimeConfig->BreakState));
  assert_param(IS_TIM_BREAK_POLARITY(sBreakDeadTimeConfig->BreakPolarity));
  assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->BreakFilter));
  assert_param(IS_TIM_AUTOMATIC_OUTPUT_STATE(sBreakDeadTimeConfig->AutomaticOutput));
1711

1712 1713 1714 1715 1716
  /* Check input state */
  __HAL_LOCK(htim);

  /* Set the Lock level, the Break enable Bit and the Polarity, the OSSR State,
     the OSSI State, the dead time value and the Automatic Output Enable Bit */
1717

1718 1719 1720 1721 1722 1723 1724 1725
  /* Set the BDTR bits */
  MODIFY_REG(tmpbdtr, TIM_BDTR_DTG, sBreakDeadTimeConfig->DeadTime);
  MODIFY_REG(tmpbdtr, TIM_BDTR_LOCK, sBreakDeadTimeConfig->LockLevel);
  MODIFY_REG(tmpbdtr, TIM_BDTR_OSSI, sBreakDeadTimeConfig->OffStateIDLEMode);
  MODIFY_REG(tmpbdtr, TIM_BDTR_OSSR, sBreakDeadTimeConfig->OffStateRunMode);
  MODIFY_REG(tmpbdtr, TIM_BDTR_BKE, sBreakDeadTimeConfig->BreakState);
  MODIFY_REG(tmpbdtr, TIM_BDTR_BKP, sBreakDeadTimeConfig->BreakPolarity);
  MODIFY_REG(tmpbdtr, TIM_BDTR_AOE, sBreakDeadTimeConfig->AutomaticOutput);
1726 1727
  MODIFY_REG(tmpbdtr, TIM_BDTR_BKF, (sBreakDeadTimeConfig->BreakFilter << TIM_BDTR_BKF_Pos));

1728 1729
  if (IS_TIM_BKIN2_INSTANCE(htim->Instance))
  {
1730
    /* Check the parameters */
1731 1732 1733
    assert_param(IS_TIM_BREAK2_STATE(sBreakDeadTimeConfig->Break2State));
    assert_param(IS_TIM_BREAK2_POLARITY(sBreakDeadTimeConfig->Break2Polarity));
    assert_param(IS_TIM_BREAK_FILTER(sBreakDeadTimeConfig->Break2Filter));
1734

1735
    /* Set the BREAK2 input related BDTR bits */
1736
    MODIFY_REG(tmpbdtr, TIM_BDTR_BK2F, (sBreakDeadTimeConfig->Break2Filter << TIM_BDTR_BK2F_Pos));
1737 1738 1739 1740 1741 1742
    MODIFY_REG(tmpbdtr, TIM_BDTR_BK2E, sBreakDeadTimeConfig->Break2State);
    MODIFY_REG(tmpbdtr, TIM_BDTR_BK2P, sBreakDeadTimeConfig->Break2Polarity);
  }

  /* Set TIMx_BDTR */
  htim->Instance->BDTR = tmpbdtr;
1743

1744
  __HAL_UNLOCK(htim);
1745

1746 1747
  return HAL_OK;
}
1748 1749
#if defined(TIM_BREAK_INPUT_SUPPORT)

1750 1751 1752 1753 1754 1755 1756 1757 1758 1759 1760 1761 1762 1763 1764
/**
  * @brief  Configures the break input source.
  * @param  htim TIM handle.
  * @param  BreakInput Break input to configure
  *          This parameter can be one of the following values:
  *            @arg TIM_BREAKINPUT_BRK: Timer break input
  *            @arg TIM_BREAKINPUT_BRK2: Timer break 2 input
  * @param  sBreakInputConfig Break input source configuration
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim,
                                             uint32_t BreakInput,
                                             TIMEx_BreakInputConfigTypeDef *sBreakInputConfig)

{
1765 1766 1767 1768 1769
  uint32_t tmporx;
  uint32_t bkin_enable_mask = 0U;
  uint32_t bkin_polarity_mask = 0U;
  uint32_t bkin_enable_bitpos = 0U;
  uint32_t bkin_polarity_bitpos = 0U;
1770 1771 1772 1773 1774 1775

  /* Check the parameters */
  assert_param(IS_TIM_BREAK_INSTANCE(htim->Instance));
  assert_param(IS_TIM_BREAKINPUT(BreakInput));
  assert_param(IS_TIM_BREAKINPUTSOURCE(sBreakInputConfig->Source));
  assert_param(IS_TIM_BREAKINPUTSOURCE_STATE(sBreakInputConfig->Enable));
1776
#if defined(DFSDM1_Channel0)
1777 1778 1779 1780
  if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
  {
    assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity));
  }
1781 1782 1783
#else
  assert_param(IS_TIM_BREAKINPUTSOURCE_POLARITY(sBreakInputConfig->Polarity));
#endif /* DFSDM1_Channel0 */
1784 1785 1786

  /* Check input state */
  __HAL_LOCK(htim);
1787 1788

  switch (sBreakInputConfig->Source)
1789
  {
1790
    case TIM_BREAKINPUTSOURCE_BKIN:
1791 1792 1793 1794 1795
    {
      bkin_enable_mask = TIM1_AF1_BKINE;
      bkin_enable_bitpos = 0;
      bkin_polarity_mask = TIM1_AF1_BKINP;
      bkin_polarity_bitpos = 9;
1796
      break;
1797
    }
1798 1799

    case TIM_BREAKINPUTSOURCE_DFSDM1:
1800 1801 1802
    {
      bkin_enable_mask = TIM1_AF1_BKDF1BKE;
      bkin_enable_bitpos = 8;
1803
      break;
1804 1805
    }

1806 1807
    default:
      break;
1808
  }
1809 1810

  switch (BreakInput)
1811 1812
  {
    case TIM_BREAKINPUT_BRK:
1813 1814 1815 1816 1817 1818 1819 1820 1821 1822 1823 1824
    {
      /* Get the TIMx_AF1 register value */
      tmporx = htim->Instance->AF1;

      /* Enable the break input */
      tmporx &= ~bkin_enable_mask;
      tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;

      /* Set the break input polarity */
#if defined(DFSDM1_Channel0)
      if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
#endif /* DFSDM1_Channel0 */
1825
      {
1826 1827
        tmporx &= ~bkin_polarity_mask;
        tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
1828 1829
      }

1830 1831 1832 1833 1834 1835 1836 1837
      /* Set TIMx_AF1 */
      htim->Instance->AF1 = tmporx;
      break;
    }
    case TIM_BREAKINPUT_BRK2:
    {
      /* Get the TIMx_AF2 register value */
      tmporx = htim->Instance->AF2;
1838

1839 1840 1841
      /* Enable the break input */
      tmporx &= ~bkin_enable_mask;
      tmporx |= (sBreakInputConfig->Enable << bkin_enable_bitpos) & bkin_enable_mask;
1842

1843 1844 1845 1846 1847 1848 1849
      /* Set the break input polarity */
#if defined(DFSDM1_Channel0)
      if (sBreakInputConfig->Source != TIM_BREAKINPUTSOURCE_DFSDM1)
#endif /* DFSDM1_Channel0 */
      {
        tmporx &= ~bkin_polarity_mask;
        tmporx |= (sBreakInputConfig->Polarity << bkin_polarity_bitpos) & bkin_polarity_mask;
1850
      }
1851 1852 1853 1854 1855 1856 1857

      /* Set TIMx_AF2 */
      htim->Instance->AF2 = tmporx;
      break;
    }
    default:
      break;
1858
  }
1859

1860 1861 1862 1863
  __HAL_UNLOCK(htim);

  return HAL_OK;
}
1864
#endif /*TIM_BREAK_INPUT_SUPPORT */
1865 1866

/**
1867 1868 1869
  * @brief  Configures the TIMx Remapping input capabilities.
  * @param  htim TIM handle.
  * @param  Remap specifies the TIM remapping source.
1870 1871 1872
  *          This parameter can be one of the following values:
  *            @arg TIM_TIM2_TIM8_TRGO: TIM2 ITR1 input is connected to TIM8 Trigger output(default)
  *            @arg TIM_TIM2_ETH_PTP:   TIM2 ITR1 input is connected to ETH PTP trigger output.
1873 1874
  *            @arg TIM_TIM2_USBFS_SOF: TIM2 ITR1 input is connected to USB FS SOF.
  *            @arg TIM_TIM2_USBHS_SOF: TIM2 ITR1 input is connected to USB HS SOF.
1875 1876 1877 1878
  *            @arg TIM_TIM5_GPIO:      TIM5 CH4 input is connected to dedicated Timer pin(default)
  *            @arg TIM_TIM5_LSI:       TIM5 CH4 input is connected to LSI clock.
  *            @arg TIM_TIM5_LSE:       TIM5 CH4 input is connected to LSE clock.
  *            @arg TIM_TIM5_RTC:       TIM5 CH4 input is connected to RTC Output event.
1879 1880
  *            @arg TIM_TIM11_GPIO:     TIM11 CH4 input is connected to dedicated Timer pin(default)
  *            @arg TIM_TIM11_SPDIF:    SPDIF Frame synchronous
1881
  *            @arg TIM_TIM11_HSE:      TIM11 CH4 input is connected to HSE_RTC clock
1882 1883 1884
  *                                     (HSE divided by a programmable prescaler)
  *            @arg TIM_TIM11_MCO1:     TIM11 CH1 input is connected to MCO1
  *
1885 1886 1887 1888 1889
  * @retval HAL status
  */
HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap)
{
  __HAL_LOCK(htim);
1890

1891 1892 1893
  /* Check parameters */
  assert_param(IS_TIM_REMAP_INSTANCE(htim->Instance));
  assert_param(IS_TIM_REMAP(Remap));
1894

1895 1896
  /* Set the Timer remapping configuration */
  htim->Instance->OR = Remap;
1897

1898
  htim->State = HAL_TIM_STATE_READY;
1899 1900 1901

  __HAL_UNLOCK(htim);

1902 1903 1904 1905 1906 1907
  return HAL_OK;
}

/**
  * @brief  Group channel 5 and channel 1, 2 or 3
  * @param  htim TIM handle.
1908
  * @param  Channels specifies the reference signal(s) the OC5REF is combined with.
1909 1910 1911 1912 1913 1914 1915
  *         This parameter can be any combination of the following values:
  *         TIM_GROUPCH5_NONE: No effect of OC5REF on OC1REFC, OC2REFC and OC3REFC
  *         TIM_GROUPCH5_OC1REFC: OC1REFC is the logical AND of OC1REFC and OC5REF
  *         TIM_GROUPCH5_OC2REFC: OC2REFC is the logical AND of OC2REFC and OC5REF
  *         TIM_GROUPCH5_OC3REFC: OC3REFC is the logical AND of OC3REFC and OC5REF
  * @retval HAL status
  */
1916
HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels)
1917 1918 1919
{
  /* Check parameters */
  assert_param(IS_TIM_COMBINED3PHASEPWM_INSTANCE(htim->Instance));
1920
  assert_param(IS_TIM_GROUPCH5(Channels));
1921 1922 1923

  /* Process Locked */
  __HAL_LOCK(htim);
1924

1925
  htim->State = HAL_TIM_STATE_BUSY;
1926

1927
  /* Clear GC5Cx bit fields */
1928 1929
  htim->Instance->CCR5 &= ~(TIM_CCR5_GC5C3 | TIM_CCR5_GC5C2 | TIM_CCR5_GC5C1);

1930
  /* Set GC5Cx bit fields */
1931 1932 1933 1934 1935
  htim->Instance->CCR5 |= Channels;

  /* Change the htim state */
  htim->State = HAL_TIM_STATE_READY;

1936
  __HAL_UNLOCK(htim);
1937

1938 1939
  return HAL_OK;
}
1940

1941 1942 1943 1944
/**
  * @}
  */

1945
/** @defgroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
1946
  * @brief    Extended Callbacks functions
1947 1948 1949 1950
  *
@verbatim
  ==============================================================================
                    ##### Extended Callbacks functions #####
1951
  ==============================================================================
1952 1953
  [..]
    This section provides Extended TIM callback functions:
1954 1955 1956 1957 1958 1959 1960 1961
    (+) Timer Commutation callback
    (+) Timer Break callback

@endverbatim
  * @{
  */

/**
1962 1963
  * @brief  Hall commutation changed callback in non-blocking mode
  * @param  htim TIM handle
1964 1965
  * @retval None
  */
1966
__weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim)
1967 1968 1969
{
  /* Prevent unused argument(s) compilation warning */
  UNUSED(htim);
1970 1971 1972 1973 1974 1975 1976 1977 1978 1979 1980 1981 1982 1983 1984 1985 1986

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIMEx_CommutCallback could be implemented in the user file
   */
}
/**
  * @brief  Hall commutation changed half complete callback in non-blocking mode
  * @param  htim TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_CommutHalfCpltCallback(TIM_HandleTypeDef *htim)
{
  /* Prevent unused argument(s) compilation warning */
  UNUSED(htim);

  /* NOTE : This function should not be modified, when the callback is needed,
            the HAL_TIMEx_CommutHalfCpltCallback could be implemented in the user file
1987 1988 1989 1990
   */
}

/**
1991 1992
  * @brief  Hall Break detection callback in non-blocking mode
  * @param  htim TIM handle
1993 1994 1995 1996 1997 1998
  * @retval None
  */
__weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim)
{
  /* Prevent unused argument(s) compilation warning */
  UNUSED(htim);
1999 2000

  /* NOTE : This function should not be modified, when the callback is needed,
2001 2002 2003 2004
            the HAL_TIMEx_BreakCallback could be implemented in the user file
   */
}

2005 2006 2007 2008 2009 2010 2011 2012 2013 2014 2015 2016 2017 2018
/**
  * @brief  Hall Break2 detection callback in non blocking mode
  * @param  htim: TIM handle
  * @retval None
  */
__weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim)
{
  /* Prevent unused argument(s) compilation warning */
  UNUSED(htim);

  /* NOTE : This function Should not be modified, when the callback is needed,
            the HAL_TIMEx_Break2Callback could be implemented in the user file
   */
}
2019 2020 2021 2022
/**
  * @}
  */

2023 2024 2025 2026 2027 2028
/** @defgroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
  * @brief    Extended Peripheral State functions
  *
@verbatim
  ==============================================================================
                ##### Extended Peripheral State functions #####
2029 2030
  ==============================================================================
  [..]
2031
    This subsection permits to get in run-time the status of the peripheral
2032 2033 2034 2035 2036 2037 2038
    and the data flow.

@endverbatim
  * @{
  */

/**
2039 2040
  * @brief  Return the TIM Hall Sensor interface handle state.
  * @param  htim TIM Hall Sensor handle
2041 2042 2043 2044 2045 2046 2047 2048 2049 2050 2051 2052
  * @retval HAL state
  */
HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim)
{
  return htim->State;
}

/**
  * @}
  */

/**
2053 2054 2055 2056 2057 2058 2059 2060 2061 2062 2063
  * @}
  */

/* Private functions ---------------------------------------------------------*/
/** @defgroup TIMEx_Private_Functions TIM Extended Private Functions
  * @{
  */

/**
  * @brief  TIM DMA Commutation callback.
  * @param  hdma pointer to DMA handle.
2064 2065
  * @retval None
  */
2066
void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma)
2067
{
2068 2069 2070 2071
  TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;

  /* Change the htim state */
  htim->State = HAL_TIM_STATE_READY;
2072 2073 2074 2075

#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  htim->CommutationCallback(htim);
#else
2076
  HAL_TIMEx_CommutCallback(htim);
2077 2078 2079 2080
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
}

/**
2081 2082
  * @brief  TIM DMA Commutation half complete callback.
  * @param  hdma pointer to DMA handle.
2083 2084
  * @retval None
  */
2085
void TIMEx_DMACommutationHalfCplt(DMA_HandleTypeDef *hdma)
2086
{
2087 2088 2089
  TIM_HandleTypeDef *htim = (TIM_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;

  /* Change the htim state */
2090
  htim->State = HAL_TIM_STATE_READY;
2091 2092 2093 2094 2095 2096

#if (USE_HAL_TIM_REGISTER_CALLBACKS == 1)
  htim->CommutationHalfCpltCallback(htim);
#else
  HAL_TIMEx_CommutHalfCpltCallback(htim);
#endif /* USE_HAL_TIM_REGISTER_CALLBACKS */
2097 2098
}

2099

2100 2101 2102 2103 2104
/**
  * @brief  Enables or disables the TIM Capture Compare Channel xN.
  * @param  TIMx to select the TIM peripheral
  * @param  Channel specifies the TIM Channel
  *          This parameter can be one of the following values:
2105 2106 2107
  *            @arg TIM_CHANNEL_1: TIM Channel 1
  *            @arg TIM_CHANNEL_2: TIM Channel 2
  *            @arg TIM_CHANNEL_3: TIM Channel 3
2108
  * @param  ChannelNState specifies the TIM Channel CCxNE bit new state.
2109
  *          This parameter can be: TIM_CCxN_ENABLE or TIM_CCxN_Disable.
2110 2111
  * @retval None
  */
2112
static void TIM_CCxNChannelCmd(TIM_TypeDef *TIMx, uint32_t Channel, uint32_t ChannelNState)
2113
{
2114
  uint32_t tmp;
2115

2116
  tmp = TIM_CCER_CC1NE << (Channel & 0x1FU); /* 0x1FU = 31 bits max shift */
2117 2118

  /* Reset the CCxNE Bit */
2119
  TIMx->CCER &=  ~tmp;
2120

2121 2122
  /* Set or reset the CCxNE Bit */
  TIMx->CCER |= (uint32_t)(ChannelNState << (Channel & 0x1FU)); /* 0x1FU = 31 bits max shift */
2123 2124
}
/**
2125
  * @}
2126 2127 2128 2129 2130
  */

#endif /* HAL_TIM_MODULE_ENABLED */
/**
  * @}
2131
  */
2132 2133 2134

/**
  * @}
2135 2136
  */

2137
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/