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提交 b16ff8c2 编写于 作者: qiuyiuestc's avatar qiuyiuestc
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File system and net for LM3S platform are available. 

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@179 bbd45198-f89e-11dd-88c7-29a3b14d5316
上级 c096268a
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内联 并排
Showing with 1866 addition and 73 deletion
bsp/lm3s/application.c
浏览文件 @ b16ff8c2
......@@ -20,6 +20,22 @@
#include <rthw.h>
#include <rtthread.h>
#ifdef RT_USING_DFS
/* dfs init */
#include <dfs_init.h>
/* dfs filesystem:FAT filesystem init */
#include <dfs_fat.h>
/* dfs filesystem:EFS filesystem init */
#include <dfs_efs.h>
/* dfs Filesystem APIs */
#include <dfs_fs.h>
#endif
#ifdef RT_USING_LWIP
#include <lwip/sys.h>
#include <lwip/api.h>
#endif
char thread1_stack[0x120];
struct rt_thread thread1;
......@@ -49,8 +65,48 @@ void thread_test()
FINSH_FUNCTION_EXPORT(thread_test, test a basic thread)
#endif
/* thread phase init */
void rt_init_thread_entry(void *parameter)
{
/* Filesystem Initialization */
#ifdef RT_USING_DFS
{
/* init the device filesystem */
dfs_init();
/* init the efsl filesystam*/
efsl_init();
/* mount sd card fat partition 1 as root directory */
if (dfs_mount("sd0", "/", "efs", 0, 0) == 0)
rt_kprintf("File System initialized!\n");
else
rt_kprintf("File System init failed!\n");
}
#endif
/* LwIP Initialization */
#ifdef RT_USING_LWIP
{
extern void lwip_sys_init(void);
/* init lwip system */
lwip_sys_init();
rt_kprintf("TCP/IP initialized!\n");
ftpd_start();
}
#endif
}
int rt_application_init()
{
rt_thread_t init_thread;
init_thread = rt_thread_create("init",
rt_init_thread_entry, RT_NULL,
2048, 21, 20);
rt_thread_startup(init_thread);
return 0;
}
/*@}*/
bsp/lm3s/board.c
浏览文件 @ b16ff8c2
......@@ -14,17 +14,17 @@
#include <rthw.h>
#include <rtthread.h>
#include <inc/hw_types.h>
#include <inc/hw_types.h>
#include <inc/hw_memmap.h>
#include <inc/hw_uart.h>
#include <driverlib/uart.h>
#include <driverlib/gpio.h>
#include <driverlib/sysctl.h>
#include <driverlib/systick.h>
#include <driverlib/interrupt.h>
#include <inc/hw_uart.h>
#include <driverlib/uart.h>
#include <driverlib/gpio.h>
#include <driverlib/sysctl.h>
#include <driverlib/systick.h>
#include <driverlib/interrupt.h>
static void rt_hw_console_init(void);
static void rt_hw_console_init(void);
/**
* @addtogroup LM3S
......@@ -47,66 +47,69 @@ void rt_hw_timer_handler(void)
/* leave interrupt */
rt_interrupt_leave();
rt_hw_interrupt_thread_switch();
}
}
/**
* This function will initial STM32 board.
*/
void rt_hw_board_init()
{
/* set clock */
SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN |
SYSCTL_XTAL_6MHZ);
/* init systick */
SysTickDisable();
SysTickPeriodSet(SysCtlClockGet()/RT_TICK_PER_SECOND);
SysTickIntEnable();
SysTickEnable();
/* init console */
rt_hw_console_init();
/* enable interrupt */
{
/* set clock */
SysCtlClockSet(SYSCTL_SYSDIV_1 | SYSCTL_USE_OSC | SYSCTL_OSC_MAIN |
SYSCTL_XTAL_6MHZ);
/* init systick */
SysTickDisable();
SysTickPeriodSet(SysCtlClockGet()/RT_TICK_PER_SECOND);
SysTickIntEnable();
SysTickEnable();
/* enable ssio */
SysCtlPeripheralEnable(SYSCTL_PERIPH_SSI0);
/* init console */
rt_hw_console_init();
/* enable interrupt */
IntMasterEnable();
}
/* init console to support rt_kprintf */
static void rt_hw_console_init()
{
/* Enable the UART0 peripherals */
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
/* Set GPIO A0 and A1 as UART pins. */
GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
/* Configure the UART for 115,200, 8-N-1 operation. */
UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), 115200,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE));
}
/* write one character to serial, must not trigger interrupt */
static void rt_hw_console_putc(const char c)
{
if (c == '\n')
while(UARTCharPutNonBlocking(UART0_BASE, '\r') == false);
while(UARTCharPutNonBlocking(UART0_BASE, c) == false);
}
/**
* This function is used by rt_kprintf to display a string on console.
*
* @param str the displayed string
*/
void rt_hw_console_output(const char* str)
{
while (*str)
{
rt_hw_console_putc (*str++);
}
}
}
/* init console to support rt_kprintf */
static void rt_hw_console_init()
{
/* Enable the UART0 peripherals */
SysCtlPeripheralEnable(SYSCTL_PERIPH_UART0);
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOA);
/* Set GPIO A0 and A1 as UART pins. */
GPIOPinTypeUART(GPIO_PORTA_BASE, GPIO_PIN_0 | GPIO_PIN_1);
/* Configure the UART for 115,200, 8-N-1 operation. */
UARTConfigSetExpClk(UART0_BASE, SysCtlClockGet(), 115200,
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
UART_CONFIG_PAR_NONE));
}
/* write one character to serial, must not trigger interrupt */
static void rt_hw_console_putc(const char c)
{
if (c == '\n')
while(UARTCharPutNonBlocking(UART0_BASE, '\r') == false);
while(UARTCharPutNonBlocking(UART0_BASE, c) == false);
}
/**
* This function is used by rt_kprintf to display a string on console.
*
* @param str the displayed string
*/
void rt_hw_console_output(const char* str)
{
while (*str)
{
rt_hw_console_putc (*str++);
}
}
/*@}*/
bsp/lm3s/luminaryif.c 0 → 100644
浏览文件 @ b16ff8c2
//*****************************************************************************
//
// luminaryif.c - Ethernet Interface File for lwIP TCP/IP Stack
//
//*****************************************************************************
#include <inc/hw_memmap.h>
#include <inc/hw_types.h>
#include <inc/hw_ints.h>
#include <inc/hw_ethernet.h>
#include <driverlib/ethernet.h>
#include <driverlib/interrupt.h>
#include <driverlib/sysctl.h>
#include <driverlib/gpio.h>
#include <driverlib/flash.h>
#include <netif/ethernetif.h>
#include "lwipopts.h"
#include "luminaryif.h"
#define MAX_ADDR_LEN 6
struct net_device
{
/* inherit from ethernet device */
struct eth_device parent;
/* interface address info. */
rt_uint8_t dev_addr[MAX_ADDR_LEN]; /* hw address */
};
static struct net_device luminaryif_dev_entry;
static struct net_device *luminaryif_dev =&luminaryif_dev_entry;
static struct rt_semaphore tx_sem;
//*****************************************************************************
//
// Sanity Check: This module will NOT work if the following defines
// are incorrect.
//
//*****************************************************************************
#if (PBUF_LINK_HLEN != 16)
#error "Incorrect PBUF_LINK_HLEN specified!"
#endif
#if (ETH_PAD_SIZE != 2)
#error "Incorrect ETH_PAD_SIZE specified!"
#endif
#if (PBUF_POOL_BUFSIZE % 4)
#error "PBUF_POOL_BUFSIZE must be modulo 4!"
#endif
/* RT-Thread Device Interface */
/* initialize the interface */
//*****************************************************************************
//
// Low-Level initialization function for the Ethernet Controller.
//
//*****************************************************************************
rt_err_t luminaryif_init(rt_device_t dev)
{
unsigned long ulTemp;
//
// Disable all Ethernet Interrupts.
//
EthernetIntDisable(ETH_BASE, (ETH_INT_PHY | ETH_INT_MDIO | ETH_INT_RXER |
ETH_INT_RXOF | ETH_INT_TX | ETH_INT_TXER |
ETH_INT_RX));
ulTemp = EthernetIntStatus(ETH_BASE, false);
EthernetIntClear(ETH_BASE, ulTemp);
//
// Initialize the Ethernet Controller.
//
EthernetInitExpClk(ETH_BASE, SysCtlClockGet());
//
// Configure the Ethernet Controller for normal operation.
// - Enable TX Duplex Mode
// - Enable TX Padding
// - Enable TX CRC Generation
//
EthernetConfigSet(ETH_BASE, (ETH_CFG_TX_DPLXEN |
ETH_CFG_TX_CRCEN | ETH_CFG_TX_PADEN));
//
// Enable the Ethernet Controller transmitter and receiver.
//
EthernetEnable(ETH_BASE);
//
// Enable the Ethernet Interrupt handler.
//
IntEnable(INT_ETH);
//
// Enable Ethernet TX and RX Packet Interrupts.
//
EthernetIntEnable(ETH_BASE, ETH_INT_RX | ETH_INT_TX);
return RT_EOK;
}
void luminaryif_isr(void)
{
unsigned long ulTemp;
//
// Read and Clear the interrupt.
//
ulTemp = EthernetIntStatus(ETH_BASE, false);
EthernetIntClear(ETH_BASE, ulTemp);
//
// Check to see if an RX Interrupt has occured.
//
if(ulTemp & ETH_INT_RX)
{
//
// Indicate that a packet has been received.
//
rt_err_t result;
/* a frame has been received */
result = eth_device_ready((struct eth_device*)&(luminaryif_dev->parent));
RT_ASSERT(result == RT_EOK);
//
// Disable Ethernet RX Interrupt.
//
EthernetIntDisable(ETH_BASE, ETH_INT_RX);
}
if(ulTemp & ETH_INT_TX)
{
/* A frame has been transmitted. */
rt_sem_release(&tx_sem);
}
}
/* control the interface */
rt_err_t luminaryif_control(rt_device_t dev, rt_uint8_t cmd, void *args)
{
switch(cmd)
{
case NIOCTL_GADDR:
/* get mac address */
if(args) rt_memcpy(args, luminaryif_dev_entry.dev_addr, 6);
else return -RT_ERROR;
break;
default :
break;
}
return RT_EOK;
}
/* Open the ethernet interface */
rt_err_t luminaryif_open(rt_device_t dev, rt_uint16_t oflag)
{
return RT_EOK;
}
/* Close the interface */
rt_err_t luminaryif_close(rt_device_t dev)
{
return RT_EOK;
}
/* Read */
rt_size_t luminaryif_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
{
rt_set_errno(-RT_ENOSYS);
return 0;
}
/* Write */
rt_size_t luminaryif_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
{
rt_set_errno(-RT_ENOSYS);
return 0;
}
//****************************************************************************
//
// Low-Level transmit routine. Should do the actual transmission of the
// packet. The packet is contained in the pbuf that is passed to the function.
// This pbuf might be chained.
//
//****************************************************************************
rt_err_t luminaryif_tx(rt_device_t dev, struct pbuf *p)
{
int iBuf;
unsigned char *pucBuf;
unsigned long *pulBuf;
struct pbuf *q;
int iGather;
unsigned long ulGather;
unsigned char *pucGather;
unsigned long ulTemp;
/* lock tx operation */
rt_sem_take(&tx_sem, RT_WAITING_FOREVER);
//
// Wait for space available in the TX FIFO.
//
while(!EthernetSpaceAvail(ETH_BASE))
{
}
//
// Fill in the first two bytes of the payload data (configured as padding
// with ETH_PAD_SIZE = 2) with the total length of the payload data
// (minus the Ethernet MAC layer header).
//
*((unsigned short *)(p->payload)) = p->tot_len - 16;
//
// Initialize the gather register.
//
iGather = 0;
pucGather = (unsigned char *)&ulGather;
ulGather = 0;
//
// Copy data from the pbuf(s) into the TX Fifo.
//
for(q = p; q != NULL; q = q->next)
{
//
// Intialize a char pointer and index to the pbuf payload data.
//
pucBuf = (unsigned char *)q->payload;
iBuf = 0;
//
// If the gather buffer has leftover data from a previous pbuf
// in the chain, fill it up and write it to the Tx FIFO.
//
while((iBuf < q->len) && (iGather != 0))
{
//
// Copy a byte from the pbuf into the gather buffer.
//
pucGather[iGather] = pucBuf[iBuf++];
//
// Increment the gather buffer index modulo 4.
//
iGather = ((iGather + 1) % 4);
}
//
// If the gather index is 0 and the pbuf index is non-zero,
// we have a gather buffer to write into the Tx FIFO.
//
if((iGather == 0) && (iBuf != 0))
{
HWREG(ETH_BASE + MAC_O_DATA) = ulGather;
ulGather = 0;
}
//
// Copy words of pbuf data into the Tx FIFO, but don't go past
// the end of the pbuf.
//
if((iBuf % 4) != 0)
{
while((iBuf + 4) <= q->len)
{
ulTemp = (pucBuf[iBuf++] << 0);
ulTemp |= (pucBuf[iBuf++] << 8);
ulTemp |= (pucBuf[iBuf++] << 16);
ulTemp |= (pucBuf[iBuf++] << 24);
HWREG(ETH_BASE + MAC_O_DATA) = ulTemp;
}
}
else
{
//
// Initialze a long pointer into the pbuf for 32-bit access.
//
pulBuf = (unsigned long *)&pucBuf[iBuf];
while((iBuf + 4) <= q->len)
{
HWREG(ETH_BASE + MAC_O_DATA) = *pulBuf++;
iBuf += 4;
}
}
//
// Check if leftover data in the pbuf and save it in the gather
// buffer for the next time.
//
while(iBuf < q->len)
{
//
// Copy a byte from the pbuf into the gather buffer.
//
pucGather[iGather] = pucBuf[iBuf++];
//
// Increment the gather buffer index modulo 4.
//
iGather = ((iGather + 1) % 4);
}
}
//
// Send any leftover data to the FIFO.
//
HWREG(ETH_BASE + MAC_O_DATA) = ulGather;
//
// Wakeup the transmitter.
//
HWREG(ETH_BASE + MAC_O_TR) = MAC_TR_NEWTX;
#if LINK_STATS
lwip_stats.link.xmit++;
#endif
return(ERR_OK);
}
//*****************************************************************************
//
// Low-Level receive routine. Should allocate a pbuf and transfer the bytes
// of the incoming packet from the interface into the pbuf.
//
//*****************************************************************************
struct pbuf * luminaryif_rx(rt_device_t dev)
{
struct pbuf *p, *q;
u16_t len;
unsigned long ulTemp;
int i;
unsigned long *ptr;
if(!EthernetPacketAvail(ETH_BASE))
{
return(NULL);
}
//
// Obtain the size of the packet and put it into the "len" variable.
// Note: The length returned in the FIFO length position includes the
// two bytes for the length + the 4 bytes for the FCS.
//
ulTemp = HWREG(ETH_BASE + MAC_O_DATA);
len = ulTemp & 0xFFFF;
//
// We allocate a pbuf chain of pbufs from the pool.
//
p = pbuf_alloc(PBUF_LINK, len, PBUF_RAM);
if(p != NULL)
{
//
// Place the first word into the first pbuf location.
//
*(unsigned long *)p->payload = ulTemp;
p->payload = (char *)(p->payload) + 4;
p->len -= 4;
//
// Process all but the last buffer in the pbuf chain.
//
q = p;
while(q != NULL)
{
//
// Setup a byte pointer into the payload section of the pbuf.
//
ptr = q->payload;
//
// Read data from FIFO into the current pbuf
// (assume pbuf length is modulo 4)
//
for(i = 0; i < q->len; i += 4)
{
*ptr++ = HWREG(ETH_BASE + MAC_O_DATA);
}
//
// Link in the next pbuf in the chain.
//
q = q->next;
}
//
// Restore the first pbuf parameters to their original values.
//
p->payload = (char *)(p->payload) - 4;
p->len += 4;
#if LINK_STATS
lwip_stats.link.recv++;
#endif
}
else
{
//
// Just read all of the remaining data from the FIFO and dump it.
//
for(i = 4; i < len; i+=4)
{
ulTemp = HWREG(ETH_BASE + MAC_O_DATA);
}
#if LINK_STATS
lwip_stats.link.memerr++;
lwip_stats.link.drop++;
#endif
}
//
// Enable Ethernet RX Interrupt.
//
EthernetIntEnable(ETH_BASE, ETH_INT_RX);
return(p);
}
int rt_hw_luminaryif_init(void)
{
rt_err_t result;
unsigned long ulUser0, ulUser1;
/* Enable and Reset the Ethernet Controller. */
SysCtlPeripheralEnable(SYSCTL_PERIPH_ETH);
SysCtlPeripheralReset(SYSCTL_PERIPH_ETH);
/*
Enable Port F for Ethernet LEDs.
LED0 Bit 3 Output
LED1 Bit 2 Output
*/
SysCtlPeripheralEnable(SYSCTL_PERIPH_GPIOF);
GPIODirModeSet(GPIO_PORTF_BASE, GPIO_PIN_2 | GPIO_PIN_3, GPIO_DIR_MODE_HW);
GPIOPadConfigSet(GPIO_PORTF_BASE, GPIO_PIN_2 | GPIO_PIN_3,
GPIO_STRENGTH_2MA, GPIO_PIN_TYPE_STD);
FlashUserSet(0x12345678, 0x12345678);
/* Configure the hardware MAC address */
FlashUserGet(&ulUser0, &ulUser1);
if((ulUser0 == 0xffffffff) || (ulUser1 == 0xffffffff))
{
rt_kprintf("Fatal error in geting MAC address\n");
}
/* init rt-thread device interface */
luminaryif_dev_entry.parent.parent.init = luminaryif_init;
luminaryif_dev_entry.parent.parent.open = luminaryif_open;
luminaryif_dev_entry.parent.parent.close = luminaryif_close;
luminaryif_dev_entry.parent.parent.read = luminaryif_read;
luminaryif_dev_entry.parent.parent.write = luminaryif_write;
luminaryif_dev_entry.parent.parent.control = luminaryif_control;
luminaryif_dev_entry.parent.eth_rx = luminaryif_rx;
luminaryif_dev_entry.parent.eth_tx = luminaryif_tx;
/*
Convert the 24/24 split MAC address from NV ram into a 32/16 split MAC
address needed to program the hardware registers, then program the MAC
address into the Ethernet Controller registers.
*/
luminaryif_dev_entry.dev_addr[0] = ((ulUser0 >> 0) & 0xff);
luminaryif_dev_entry.dev_addr[1] = ((ulUser0 >> 8) & 0xff);
luminaryif_dev_entry.dev_addr[2] = ((ulUser0 >> 16) & 0xff);
luminaryif_dev_entry.dev_addr[3] = ((ulUser1 >> 0) & 0xff);
luminaryif_dev_entry.dev_addr[4] = ((ulUser1 >> 8) & 0xff);
luminaryif_dev_entry.dev_addr[5] = ((ulUser1 >> 16) & 0xff);
/* Program the hardware with it's MAC address (for filtering). */
EthernetMACAddrSet(ETH_BASE, luminaryif_dev_entry.dev_addr);
rt_sem_init(&tx_sem, "emac", 1, RT_IPC_FLAG_FIFO);
result = eth_device_init(&(luminaryif_dev->parent), "E0");
return RT_EOK;
}
bsp/lm3s/luminaryif.h 0 → 100644
浏览文件 @ b16ff8c2
//*****************************************************************************
//
// luminaryif.h - Prototypes for the Luminary Micro Ethernet interface.
//
//*****************************************************************************
#ifndef __LUMINARYIF_H__
#define __LUMINARYIF_H__
int rt_hw_luminaryif_init(void);
#endif // __LUMINARYIF_H__
bsp/lm3s/project_lwip_dfs.Opt 0 → 100644
浏览文件 @ b16ff8c2
### uVision2 Project, (C) Keil Software
### Do not modify !
cExt (*.c)
aExt (*.s*; *.src; *.a*)
oExt (*.obj)
lExt (*.lib)
tExt (*.txt; *.h; *.inc)
pExt (*.plm)
CppX (*.cpp)
DaveTm { 0,0,0,0,0,0,0,0 }
Target (RT-Thread/LM3S), 0x0004 // Tools: 'ARM-ADS'
GRPOPT 1,(Startup),1,0,0
GRPOPT 2,(Kernel),0,0,0
GRPOPT 3,(finsh),0,0,0
GRPOPT 4,(LM3S),0,0,0
GRPOPT 5,(driverlib),0,0,0
GRPOPT 6,(Filesystem),0,0,0
GRPOPT 7,(LwIP),1,0,0
GRPOPT 8,(Utils),1,0,0
OPTFFF 1,1,1,201326592,0,0,0,0,<.\application.c><application.c>
OPTFFF 1,2,1,0,0,0,0,0,<.\board.c><board.c>
OPTFFF 1,3,1,234881024,0,132,141,0,<.\startup.c><startup.c> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,226,255,255,255,44,0,0,0,58,0,0,0,214,2,0,0,38,1,0,0 }
OPTFFF 1,4,5,436207616,0,61,61,0,<.\rtconfig.h><rtconfig.h> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,226,255,255,255,22,0,0,0,29,0,0,0,192,2,0,0,9,1,0,0 }
OPTFFF 1,5,1,922746880,0,783,783,0,<.\sdcard.c><sdcard.c> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,226,255,255,255,66,0,0,0,87,0,0,0,236,2,0,0,67,1,0,0 }
OPTFFF 1,6,1,738197504,0,1,1,0,<.\luminaryif.c><luminaryif.c> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,226,255,255,255,66,0,0,0,87,0,0,0,205,2,0,0,129,1,0,0 }
OPTFFF 2,7,1,0,0,0,0,0,<..\..\src\clock.c><clock.c>
OPTFFF 2,8,1,0,0,0,0,0,<..\..\src\device.c><device.c>
OPTFFF 2,9,1,0,0,0,0,0,<..\..\src\idle.c><idle.c>
OPTFFF 2,10,1,0,0,0,0,0,<..\..\src\ipc.c><ipc.c>
OPTFFF 2,11,1,0,0,0,0,0,<..\..\src\irq.c><irq.c>
OPTFFF 2,12,1,0,0,0,0,0,<..\..\src\mem.c><mem.c>
OPTFFF 2,13,1,0,0,0,0,0,<..\..\src\mempool.c><mempool.c>
OPTFFF 2,14,1,0,0,0,0,0,<..\..\src\object.c><object.c>
OPTFFF 2,15,1,0,0,0,0,0,<..\..\src\scheduler.c><scheduler.c>
OPTFFF 2,16,1,0,0,0,0,0,<..\..\src\slab.c><slab.c>
OPTFFF 2,17,1,0,0,0,0,0,<..\..\src\thread.c><thread.c>
OPTFFF 2,18,1,0,0,0,0,0,<..\..\src\timer.c><timer.c>
OPTFFF 2,19,1,0,0,0,0,0,<..\..\src\kservice.c><kservice.c>
OPTFFF 3,20,1,0,0,0,0,0,<..\..\finsh\symbol.c><symbol.c>
OPTFFF 3,21,1,0,0,0,0,0,<..\..\finsh\cmd.c><cmd.c>
OPTFFF 3,22,1,0,0,0,0,0,<..\..\finsh\finsh_compiler.c><finsh_compiler.c>
OPTFFF 3,23,1,0,0,0,0,0,<..\..\finsh\finsh_error.c><finsh_error.c>
OPTFFF 3,24,1,0,0,0,0,0,<..\..\finsh\finsh_heap.c><finsh_heap.c>
OPTFFF 3,25,1,0,0,0,0,0,<..\..\finsh\finsh_init.c><finsh_init.c>
OPTFFF 3,26,1,0,0,0,0,0,<..\..\finsh\finsh_node.c><finsh_node.c>
OPTFFF 3,27,1,0,0,0,0,0,<..\..\finsh\finsh_ops.c><finsh_ops.c>
OPTFFF 3,28,1,0,0,0,0,0,<..\..\finsh\finsh_parser.c><finsh_parser.c>
OPTFFF 3,29,1,0,0,0,0,0,<..\..\finsh\finsh_token.c><finsh_token.c>
OPTFFF 3,30,1,0,0,0,0,0,<..\..\finsh\finsh_var.c><finsh_var.c>
OPTFFF 3,31,1,0,0,0,0,0,<..\..\finsh\finsh_vm.c><finsh_vm.c>
OPTFFF 3,32,1,0,0,0,0,0,<..\..\finsh\shell.c><shell.c>
OPTFFF 4,33,1,0,0,0,0,0,<..\..\libcpu\arm\lm3s\cpu.c><cpu.c>
OPTFFF 4,34,1,0,0,0,0,0,<..\..\libcpu\arm\lm3s\interrupt.c><interrupt.c>
OPTFFF 4,35,1,0,0,0,0,0,<..\..\libcpu\arm\lm3s\stack.c><stack.c>
OPTFFF 4,36,2,0,0,0,0,0,<..\..\libcpu\arm\lm3s\context_rvds.S><context_rvds.S>
OPTFFF 4,37,2,0,0,0,0,0,<..\..\libcpu\arm\lm3s\start_rvds.S><start_rvds.S>
OPTFFF 4,38,1,0,0,0,0,0,<..\..\libcpu\arm\lm3s\serial.c><serial.c>
OPTFFF 4,39,1,0,0,0,0,0,<..\..\libcpu\arm\lm3s\fault.c><fault.c>
OPTFFF 4,40,2,0,0,0,0,0,<..\..\libcpu\arm\lm3s\fault_rvds.S><fault_rvds.S>
OPTFFF 5,41,4,0,0,0,0,0,<.\driverlib\rvmdk\driverlib.lib><driverlib.lib>
OPTFFF 6,42,1,1,0,0,0,0,<..\..\filesystem\dfs\src\dfs_init.c><dfs_init.c>
OPTFFF 6,43,1,0,0,0,0,0,<..\..\filesystem\dfs\src\dfs_fs.c><dfs_fs.c>
OPTFFF 6,44,1,0,0,0,0,0,<..\..\filesystem\dfs\src\dfs_raw.c><dfs_raw.c>
OPTFFF 6,45,1,0,0,0,0,0,<..\..\filesystem\dfs\src\dfs_util.c><dfs_util.c>
OPTFFF 6,46,1,0,0,0,0,0,<..\..\filesystem\dfs\src\dfs_cache.c><dfs_cache.c>
OPTFFF 6,47,1,0,0,0,0,0,<..\..\filesystem\dfs\src\dfs_posix.c><dfs_posix.c>
OPTFFF 6,48,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\base\efs.c><efs.c>
OPTFFF 6,49,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\base\extract.c><extract.c>
OPTFFF 6,50,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\base\partition.c><partition.c>
OPTFFF 6,51,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\base\plibc.c><plibc.c>
OPTFFF 6,52,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\dir.c><dir.c>
OPTFFF 6,53,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fat.c><fat.c>
OPTFFF 6,54,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\file.c><file.c>
OPTFFF 6,55,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fs.c><fs.c>
OPTFFF 6,56,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ls.c><ls.c>
OPTFFF 6,57,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\time.c><time.c>
OPTFFF 6,58,1,0,0,0,0,0,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ui.c><ui.c>
OPTFFF 7,59,1,1,0,0,0,0,<..\..\net\lwip\src\core\dhcp.c><dhcp.c>
OPTFFF 7,60,1,0,0,0,0,0,<..\..\net\lwip\src\core\dns.c><dns.c>
OPTFFF 7,61,1,0,0,0,0,0,<..\..\net\lwip\src\core\init.c><init.c>
OPTFFF 7,62,1,0,0,0,0,0,<..\..\net\lwip\src\core\netif.c><netif.c>
OPTFFF 7,63,1,0,0,0,0,0,<..\..\net\lwip\src\core\pbuf.c><pbuf.c>
OPTFFF 7,64,1,0,0,0,0,0,<..\..\net\lwip\src\core\raw.c><raw.c>
OPTFFF 7,65,1,0,0,0,0,0,<..\..\net\lwip\src\core\stats.c><stats.c>
OPTFFF 7,66,1,0,0,0,0,0,<..\..\net\lwip\src\core\sys.c><sys.c>
OPTFFF 7,67,1,0,0,0,0,0,<..\..\net\lwip\src\core\tcp.c><tcp.c>
OPTFFF 7,68,1,0,0,0,0,0,<..\..\net\lwip\src\core\tcp_in.c><tcp_in.c>
OPTFFF 7,69,1,0,0,0,0,0,<..\..\net\lwip\src\core\tcp_out.c><tcp_out.c>
OPTFFF 7,70,1,0,0,0,0,0,<..\..\net\lwip\src\core\udp.c><udp.c>
OPTFFF 7,71,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\autoip.c><autoip.c>
OPTFFF 7,72,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\icmp.c><icmp.c>
OPTFFF 7,73,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\igmp.c><igmp.c>
OPTFFF 7,74,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\inet.c><inet.c>
OPTFFF 7,75,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\inet_chksum.c><inet_chksum.c>
OPTFFF 7,76,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\ip.c><ip.c>
OPTFFF 7,77,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\ip_addr.c><ip_addr.c>
OPTFFF 7,78,1,0,0,0,0,0,<..\..\net\lwip\src\core\ipv4\ip_frag.c><ip_frag.c>
OPTFFF 7,79,1,0,0,0,0,0,<..\..\net\lwip\src\core\snmp\msg_in.c><msg_in.c>
OPTFFF 7,80,1,0,0,0,0,0,<..\..\net\lwip\src\core\snmp\msg_out.c><msg_out.c>
OPTFFF 7,81,1,0,0,0,0,0,<..\..\net\lwip\src\api\api_lib.c><api_lib.c>
OPTFFF 7,82,1,0,0,0,0,0,<..\..\net\lwip\src\api\api_msg.c><api_msg.c>
OPTFFF 7,83,1,0,0,0,0,0,<..\..\net\lwip\src\api\err.c><err.c>
OPTFFF 7,84,1,0,0,0,0,0,<..\..\net\lwip\src\api\netbuf.c><netbuf.c>
OPTFFF 7,85,1,0,0,0,0,0,<..\..\net\lwip\src\api\netdb.c><netdb.c>
OPTFFF 7,86,1,0,0,0,0,0,<..\..\net\lwip\src\api\netifapi.c><netifapi.c>
OPTFFF 7,87,1,0,0,0,0,0,<..\..\net\lwip\src\api\tcpip.c><tcpip.c>
OPTFFF 7,88,1,0,0,0,0,0,<..\..\net\lwip\src\netif\etharp.c><etharp.c>
OPTFFF 7,89,1,0,0,0,0,0,<..\..\net\lwip\src\netif\ethernetif.c><ethernetif.c>
OPTFFF 7,90,1,0,0,0,0,0,<..\..\net\lwip\src\netif\loopif.c><loopif.c>
OPTFFF 7,91,1,0,0,0,0,0,<..\..\net\lwip\src\arch\sys_arch_init.c><sys_arch_init.c>
OPTFFF 7,92,1,0,0,0,0,0,<..\..\net\lwip\src\arch\sys_arch.c><sys_arch.c>
OPTFFF 7,93,1,0,0,0,0,0,<..\..\net\lwip\src\api\sockets.c><sockets.c>
OPTFFF 7,94,1,0,0,0,0,0,<..\..\net\lwip\src\core\memp_tiny.c><memp_tiny.c>
OPTFFF 8,95,1,0,0,0,0,0,<..\..\net\apps\chargen.c><chargen.c>
OPTFFF 8,96,1,0,0,0,0,0,<..\..\net\apps\ftpd.c><ftpd.c>
OPTFFF 8,97,1,0,0,0,0,0,<..\..\net\apps\sntp.c><sntp.c>
OPTFFF 8,98,1,0,0,0,0,0,<..\..\net\apps\tcpecho.c><tcpecho.c>
OPTFFF 8,99,1,486539264,0,83,87,0,<..\..\net\apps\tftp.c><tftp.c> { 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,226,255,255,255,22,0,0,0,29,0,0,0,161,2,0,0,71,1,0,0 }
OPTFFF 8,100,1,0,0,0,0,0,<..\..\net\apps\udpecho.c><udpecho.c>
ExtF <E:\SVN-Google-Source\filesystem\dfs\include\dfs_def.h> 141,141,0,{ 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,226,255,255,255,66,0,0,0,87,0,0,0,236,2,0,0,67,1,0,0 }
ExtF <E:\SVN-Google-Source\filesystem\dfs\dfs_config.h> 83,91,0,{ 44,0,0,0,0,0,0,0,1,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,226,255,255,255,0,0,0,0,0,0,0,0,170,2,0,0,236,0,0,0 }
ExtF <E:\SVN-Google-Source\net\lwip\src\lwipopts.h> 137,152,0,{ 44,0,0,0,2,0,0,0,3,0,0,0,255,255,255,255,255,255,255,255,252,255,255,255,226,255,255,255,0,0,0,0,0,0,0,0,170,2,0,0,236,0,0,0 }
TARGOPT 1, (RT-Thread/LM3S)
ADSCLK=6000000
OPTTT 1,1,1,0
OPTHX 1,65535,0,0,0
OPTLX 79,66,8,<.\>
OPTOX 16
OPTLT 1,1,1,0,1,1,0,1,0,0,0,0
OPTXL 1,1,1,1,1,1,1,0,0
OPTFL 1,0,1
OPTAX 0
OPTDL (SARMCM3.DLL)()(DLM.DLL)(-pLM3S6918)(SARMCM3.DLL)()(TLM.DLL)(-pLM3S6918)
OPTDBG 49150,7,()()()()()()()()()() (Segger\JL2CM3.dll)()()()
OPTKEY 0,(DLGTARM)((1010=-1,-1,-1,-1,0)(1007=-1,-1,-1,-1,0)(1008=-1,-1,-1,-1,0)(1009=-1,-1,-1,-1,0)(110=-1,-1,-1,-1,0)(100=-1,-1,-1,-1,0)(101=-1,-1,-1,-1,0)(102=-1,-1,-1,-1,0)(103=-1,-1,-1,-1,0)(104=-1,-1,-1,-1,0)(105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(161=-1,-1,-1,-1,0)(162=-1,-1,-1,-1,0)(163=-1,-1,-1,-1,0)(164=-1,-1,-1,-1,0)(150=-1,-1,-1,-1,0)(151=-1,-1,-1,-1,0)(152=-1,-1,-1,-1,0)(1011=-1,-1,-1,-1,0)(1012=-1,-1,-1,-1,0)(1014=-1,-1,-1,-1,0)(1016=-1,-1,-1,-1,0)(136=-1,-1,-1,-1,0))
OPTKEY 0,(ARMDBGFLAGS)()
OPTKEY 0,(DLGUARM)((105=-1,-1,-1,-1,0)(106=-1,-1,-1,-1,0)(107=-1,-1,-1,-1,0))
OPTKEY 0,(JL2CM3)(-U -O14 -S0 -C-1 -JU1 -JI127.0.0.1 -JP0 -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TRE0 -FO7 -FD20000000 -FC800 -FN1 -FF0LM3S_256 -FS00 -FL040000)
OPTDF 0x80
OPTLE <>
OPTLC <>
EndOpt
bsp/lm3s/project_lwip_dfs.Uv2 0 → 100644
浏览文件 @ b16ff8c2
### uVision2 Project, (C) Keil Software
### Do not modify !
Target (RT-Thread/LM3S), 0x0004 // Tools: 'ARM-ADS'
Group (Startup)
Group (Kernel)
Group (finsh)
Group (LM3S)
Group (driverlib)
Group (Filesystem)
Group (LwIP)
Group (Utils)
File 1,1,<.\application.c><application.c>
File 1,1,<.\board.c><board.c>
File 1,1,<.\startup.c><startup.c>
File 1,5,<.\rtconfig.h><rtconfig.h>
File 1,1,<.\sdcard.c><sdcard.c>
File 1,1,<.\luminaryif.c><luminaryif.c>
File 2,1,<..\..\src\clock.c><clock.c>
File 2,1,<..\..\src\device.c><device.c>
File 2,1,<..\..\src\idle.c><idle.c>
File 2,1,<..\..\src\ipc.c><ipc.c>
File 2,1,<..\..\src\irq.c><irq.c>
File 2,1,<..\..\src\mem.c><mem.c>
File 2,1,<..\..\src\mempool.c><mempool.c>
File 2,1,<..\..\src\object.c><object.c>
File 2,1,<..\..\src\scheduler.c><scheduler.c>
File 2,1,<..\..\src\slab.c><slab.c>
File 2,1,<..\..\src\thread.c><thread.c>
File 2,1,<..\..\src\timer.c><timer.c>
File 2,1,<..\..\src\kservice.c><kservice.c>
File 3,1,<..\..\finsh\symbol.c><symbol.c>
File 3,1,<..\..\finsh\cmd.c><cmd.c>
File 3,1,<..\..\finsh\finsh_compiler.c><finsh_compiler.c>
File 3,1,<..\..\finsh\finsh_error.c><finsh_error.c>
File 3,1,<..\..\finsh\finsh_heap.c><finsh_heap.c>
File 3,1,<..\..\finsh\finsh_init.c><finsh_init.c>
File 3,1,<..\..\finsh\finsh_node.c><finsh_node.c>
File 3,1,<..\..\finsh\finsh_ops.c><finsh_ops.c>
File 3,1,<..\..\finsh\finsh_parser.c><finsh_parser.c>
File 3,1,<..\..\finsh\finsh_token.c><finsh_token.c>
File 3,1,<..\..\finsh\finsh_var.c><finsh_var.c>
File 3,1,<..\..\finsh\finsh_vm.c><finsh_vm.c>
File 3,1,<..\..\finsh\shell.c><shell.c>
File 4,1,<..\..\libcpu\arm\lm3s\cpu.c><cpu.c>
File 4,1,<..\..\libcpu\arm\lm3s\interrupt.c><interrupt.c>
File 4,1,<..\..\libcpu\arm\lm3s\stack.c><stack.c>
File 4,2,<..\..\libcpu\arm\lm3s\context_rvds.S><context_rvds.S>
File 4,2,<..\..\libcpu\arm\lm3s\start_rvds.S><start_rvds.S>
File 4,1,<..\..\libcpu\arm\lm3s\serial.c><serial.c>
File 4,1,<..\..\libcpu\arm\lm3s\fault.c><fault.c>
File 4,2,<..\..\libcpu\arm\lm3s\fault_rvds.S><fault_rvds.S>
File 5,4,<.\driverlib\rvmdk\driverlib.lib><driverlib.lib>
File 6,1,<..\..\filesystem\dfs\src\dfs_init.c><dfs_init.c>
File 6,1,<..\..\filesystem\dfs\src\dfs_fs.c><dfs_fs.c>
File 6,1,<..\..\filesystem\dfs\src\dfs_raw.c><dfs_raw.c>
File 6,1,<..\..\filesystem\dfs\src\dfs_util.c><dfs_util.c>
File 6,1,<..\..\filesystem\dfs\src\dfs_cache.c><dfs_cache.c>
File 6,1,<..\..\filesystem\dfs\src\dfs_posix.c><dfs_posix.c>
File 6,1,<..\..\filesystem\dfs\filesystems\efsl\src\base\efs.c><efs.c>
File 6,1,<..\..\filesystem\dfs\filesystems\efsl\src\base\extract.c><extract.c>
File 6,1,<..\..\filesystem\dfs\filesystems\efsl\src\base\partition.c><partition.c>
File 6,1,<..\..\filesystem\dfs\filesystems\efsl\src\base\plibc.c><plibc.c>
File 6,1,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\dir.c><dir.c>
File 6,1,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fat.c><fat.c>
File 6,1,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\file.c><file.c>
File 6,1,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\fs.c><fs.c>
File 6,1,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ls.c><ls.c>
File 6,1,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\time.c><time.c>
File 6,1,<..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\ui.c><ui.c>
File 7,1,<..\..\net\lwip\src\core\dhcp.c><dhcp.c>
File 7,1,<..\..\net\lwip\src\core\dns.c><dns.c>
File 7,1,<..\..\net\lwip\src\core\init.c><init.c>
File 7,1,<..\..\net\lwip\src\core\netif.c><netif.c>
File 7,1,<..\..\net\lwip\src\core\pbuf.c><pbuf.c>
File 7,1,<..\..\net\lwip\src\core\raw.c><raw.c>
File 7,1,<..\..\net\lwip\src\core\stats.c><stats.c>
File 7,1,<..\..\net\lwip\src\core\sys.c><sys.c>
File 7,1,<..\..\net\lwip\src\core\tcp.c><tcp.c>
File 7,1,<..\..\net\lwip\src\core\tcp_in.c><tcp_in.c>
File 7,1,<..\..\net\lwip\src\core\tcp_out.c><tcp_out.c>
File 7,1,<..\..\net\lwip\src\core\udp.c><udp.c>
File 7,1,<..\..\net\lwip\src\core\ipv4\autoip.c><autoip.c>
File 7,1,<..\..\net\lwip\src\core\ipv4\icmp.c><icmp.c>
File 7,1,<..\..\net\lwip\src\core\ipv4\igmp.c><igmp.c>
File 7,1,<..\..\net\lwip\src\core\ipv4\inet.c><inet.c>
File 7,1,<..\..\net\lwip\src\core\ipv4\inet_chksum.c><inet_chksum.c>
File 7,1,<..\..\net\lwip\src\core\ipv4\ip.c><ip.c>
File 7,1,<..\..\net\lwip\src\core\ipv4\ip_addr.c><ip_addr.c>
File 7,1,<..\..\net\lwip\src\core\ipv4\ip_frag.c><ip_frag.c>
File 7,1,<..\..\net\lwip\src\core\snmp\msg_in.c><msg_in.c>
File 7,1,<..\..\net\lwip\src\core\snmp\msg_out.c><msg_out.c>
File 7,1,<..\..\net\lwip\src\api\api_lib.c><api_lib.c>
File 7,1,<..\..\net\lwip\src\api\api_msg.c><api_msg.c>
File 7,1,<..\..\net\lwip\src\api\err.c><err.c>
File 7,1,<..\..\net\lwip\src\api\netbuf.c><netbuf.c>
File 7,1,<..\..\net\lwip\src\api\netdb.c><netdb.c>
File 7,1,<..\..\net\lwip\src\api\netifapi.c><netifapi.c>
File 7,1,<..\..\net\lwip\src\api\tcpip.c><tcpip.c>
File 7,1,<..\..\net\lwip\src\netif\etharp.c><etharp.c>
File 7,1,<..\..\net\lwip\src\netif\ethernetif.c><ethernetif.c>
File 7,1,<..\..\net\lwip\src\netif\loopif.c><loopif.c>
File 7,1,<..\..\net\lwip\src\arch\sys_arch_init.c><sys_arch_init.c>
File 7,1,<..\..\net\lwip\src\arch\sys_arch.c><sys_arch.c>
File 7,1,<..\..\net\lwip\src\api\sockets.c><sockets.c>
File 7,1,<..\..\net\lwip\src\core\memp_tiny.c><memp_tiny.c>
File 8,1,<..\..\net\apps\chargen.c><chargen.c>
File 8,1,<..\..\net\apps\ftpd.c><ftpd.c>
File 8,1,<..\..\net\apps\sntp.c><sntp.c>
File 8,1,<..\..\net\apps\tcpecho.c><tcpecho.c>
File 8,1,<..\..\net\apps\tftp.c><tftp.c>
File 8,1,<..\..\net\apps\udpecho.c><udpecho.c>
Options 1,0,0 // Target 'RT-Thread/LM3S'
Device (LM3S6918)
Vendor (Luminary Micro)
Cpu (IRAM(0x20000000-0x2000FFFF) IROM(0-0x3FFFF) CLOCK(6000000) CPUTYPE("Cortex-M3"))
FlashUt ()
StupF ("STARTUP\Luminary\Startup.s" ("Luminary Startup Code"))
FlashDR (UL2CM3(-UU0101L5E -O14 -S0 -C0 -N00("ARM Cortex-M3") -D00(1BA00477) -L00(4) -FO7 -FD20000000 -FC800 -FN1 -FF0LM3S_256 -FS00 -FL040000))
DevID (4722)
Rgf (LM3Sxxxx.H)
Mem ()
C ()
A ()
RL ()
OH ()
DBC_IFX ()
DBC_CMS ()
DBC_AMS ()
DBC_LMS ()
UseEnv=0
EnvBin ()
EnvInc ()
EnvLib ()
EnvReg (Luminary\)
OrgReg (Luminary\)
TgStat=16
OutDir (.\obj\)
OutName (rtthread-lm3s)
GenApp=1
GenLib=0
GenHex=0
Debug=1
Browse=1
LstDir (.\)
HexSel=1
MG32K=0
TGMORE=0
RunUsr 0 0 <>
RunUsr 1 0 <>
BrunUsr 0 0 <>
BrunUsr 1 0 <>
CrunUsr 0 0 <>
CrunUsr 1 0 <>
SVCSID <>
GLFLAGS=1790
ADSFLGA { 243,31,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ACPUTYP ("Cortex-M3")
RVDEV ()
ADSTFLGA { 0,12,0,2,99,0,1,66,0,0,0,0,0,0,0,0,0,0,0,0 }
OCMADSOCM { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
OCMADSIRAM { 0,0,0,0,32,0,0,1,0 }
OCMADSIROM { 1,0,0,0,0,0,0,4,0 }
OCMADSXRAM { 0,0,0,0,0,0,0,0,0 }
OCR_RVCT { 1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,0,0,1,0,0,0,0,0,0,4,0,1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,32,0,0,1,0,0,0,0,0,0,0,0,0,0 }
RV_STAVEC ()
ADSCCFLG { 5,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSCMISC ()
ADSCDEFN ()
ADSCUDEF ()
ADSCINCD (.;.\inc;..\..\include;..\..\libcpu\arm\lm3s;..\..\finsh;..\..\filesystem\dfs;..\..\filesystem\dfs\include;..\..\net\lwip\src;..\..\net\lwip\src\include;..\..\net\lwip\src\arch\include;..\..\net\lwip\src\include\ipv4;..\..\filesystem\dfs\include;..\..\filesystem\dfs\filesystems\efsl\src\include;..\..\filesystem\dfs\filesystems\efsl\src\base\include;..\..\filesystem\dfs\filesystems\efsl\src\fs\vfat\include)
ADSASFLG { 1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSAMISC ()
ADSADEFN ()
ADSAUDEF ()
ADSAINCD ()
PropFld { 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
IncBld=1
AlwaysBuild=0
GenAsm=0
AsmAsm=0
PublicsOnly=0
StopCode=3
CustArgs ()
LibMods ()
ADSLDFG { 17,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0 }
ADSLDTA (0x00000000)
ADSLDDA (0x20000000)
ADSLDSC ()
ADSLDIB ()
ADSLDIC ()
ADSLDMC (--keep __fsym_* --keep __vsym_*)
ADSLDIF ()
ADSLDDW ()
OPTDL (SARMCM3.DLL)()(DLM.DLL)(-pLM3S6918)(SARMCM3.DLL)()(TLM.DLL)(-pLM3S6918)
OPTDBG 49150,7,()()()()()()()()()() (Segger\JL2CM3.dll)()()()
FLASH1 { 9,0,0,0,1,0,0,0,5,16,0,0,0,0,0,0,0,0,0,0 }
FLASH2 (Segger\JL2CM3.dll)
FLASH3 ("" ())
FLASH4 ()
EndOpt
bsp/lm3s/rtconfig.h
浏览文件 @ b16ff8c2
......@@ -16,7 +16,7 @@
/* SECTION: RT_DEBUG */
/* Thread Debug*/
#define RT_DEBUG
/* #define RT_DEBUG*/
/* #define RT_THREAD_DEBUG */
/* Using Hook*/
......@@ -81,6 +81,7 @@
/* Using C++ support*/
/* #define RT_USING_CPLUSPLUS */
#define RT_USING_DFS
/* SECTION: DFS options */
/* the max number of mounted filesystem */
#define DFS_FILESYSTEMS_MAX 1
......@@ -91,7 +92,7 @@
/* SECTION: lwip, a lighwight TCP/IP protocol stack */
/* Using lighweight TCP/IP protocol stack*/
/* #define RT_USING_LWIP */
#define RT_USING_LWIP
/* Trace LwIP protocol*/
/* #define RT_LWIP_DEBUG */
......@@ -108,12 +109,19 @@
/* Enable TCP protocol*/
#define RT_LWIP_TCP
/* the number of simulatenously active TCP connections*/
#define RT_LWIP_TCP_PCB_NUM 5
/* TCP sender buffer space*/
#define RT_LWIP_TCP_SND_BUF 1500
/* Enable SNMP protocol*/
/* #define RT_LWIP_SNMP */
/* Using DHCP*/
/* #define RT_LWIP_DHCP */
#define RT_LWIP_DNS
/* ip address of target*/
#define RT_LWIP_IPADDR0 192
#define RT_LWIP_IPADDR1 168
......@@ -132,4 +140,13 @@
#define RT_LWIP_MSKADDR2 255
#define RT_LWIP_MSKADDR3 0
/* tcp thread options */
#define RT_LWIP_TCPTHREAD_PRIORITY 22
#define RT_LWIP_TCPTHREAD_MBOX_SIZE 4
#define RT_LWIP_TCPTHREAD_STACKSIZE 1024
/* ethernet if thread options */
#define RT_LWIP_ETHTHREAD_PRIORITY 23
#define RT_LWIP_ETHTHREAD_MBOX_SIZE 4
#define RT_LWIP_ETHTHREAD_STACKSIZE 512
#endif
bsp/lm3s/sdcard.c 0 → 100644
浏览文件 @ b16ff8c2
此差异已折叠。
bsp/lm3s/sdcard.h 0 → 100644
浏览文件 @ b16ff8c2
/*-----------------------------------------------------------------------
/ Low level disk interface modlue include file R0.04a (C)ChaN, 2007
/-----------------------------------------------------------------------*/
#ifndef __SDCARD_H__
#define __SDCARD_H__
#define _READONLY 0 /* 1: Read-only mode */
#include <rtthread.h>
/* Status of Disk Functions */
typedef rt_uint8_t DSTATUS;
/* Results of Disk Functions */
typedef enum {
RES_OK = 0, /* 0: Successful */
RES_ERROR, /* 1: R/W Error */
RES_WRPRT, /* 2: Write Protected */
RES_NOTRDY, /* 3: Not Ready */
RES_PARERR /* 4: Invalid Parameter */
} DRESULT;
/*---------------------------------------*/
/* Prototypes for disk control functions */
DSTATUS disk_initialize (rt_uint8_t);
DSTATUS disk_status (rt_uint8_t);
DRESULT disk_read (rt_uint8_t, rt_uint8_t*, rt_uint32_t, rt_uint8_t);
#if _READONLY == 0
DRESULT disk_write (rt_uint8_t, const rt_uint8_t*, rt_uint32_t, rt_uint8_t);
#endif
DRESULT disk_ioctl (rt_uint8_t, rt_uint8_t, void*);
void disk_timerproc (void);
/* Disk Status Bits (DSTATUS) */
#define STA_NOINIT 0x01 /* Drive not initialized */
#define STA_NODISK 0x02 /* No medium in the drive */
#define STA_PROTECT 0x04 /* Write protected */
/* Command code for disk_ioctrl() */
#define GET_SECTOR_COUNT 1
#define GET_SECTOR_SIZE 2
#define CTRL_SYNC 3
#define CTRL_POWER 4
#define CTRL_LOCK 5
#define CTRL_EJECT 6
#define MMC_GET_CSD 10
#define MMC_GET_CID 11
#define MMC_GET_OCR 12
#define ATA_GET_REV 20
#define ATA_GET_MODEL 21
#define ATA_GET_SN 22
#endif
bsp/lm3s/startup.c
浏览文件 @ b16ff8c2
......@@ -19,8 +19,8 @@
/**
* @addtogroup LM3S
*/
*/
extern void rt_hw_serial_init(void);
/*@{*/
......@@ -81,20 +81,26 @@ void rtthread_startup(void)
rt_system_timer_init();
#ifdef RT_USING_HEAP
/* STM32F103VB has 20k SRAM, the end address of SRAM is 0x20005000 */
#ifdef __CC_ARM
rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)0x20005000);
rt_system_heap_init((void*)&Image$$RW_IRAM1$$ZI$$Limit, (void*)0x20010000);
#elif __ICCARM__
rt_system_heap_init(__segment_end("HEAP"), (void*)0x20005000);
rt_system_heap_init(__segment_end("HEAP"), (void*)0x20010000);
#else
/* init memory system */
rt_system_heap_init((void*)&__bss_end, (void*)0x20005000);
rt_system_heap_init((void*)&__bss_end, (void*)0x20010000);
#endif
#endif
/* init scheduler system */
rt_system_scheduler_init();
#ifdef RT_USING_LWIP
eth_system_device_init();
/* register ethernetif device */
rt_hw_luminaryif_init();
#endif
/* init hardware serial device */
rt_hw_serial_init();
#ifdef RT_USING_DFS
......
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