Merge pull request #5227 from supperthomas/nrf51822_remove

bsp/nrf51822/Libraries/CMSIS/Include/core_cmFunc.h

-/**************************************************************************//**
- * @file     core_cmFunc.h
- * @brief    CMSIS Cortex-M Core Function Access Header File
- * @version  V4.00
- * @date     28. August 2014
- *
- * @note
- *
- ******************************************************************************/
-/* Copyright (c) 2009 - 2014 ARM LIMITED
-
-   All rights reserved.
-   Redistribution and use in source and binary forms, with or without
-   modification, are permitted provided that the following conditions are met:
-   - Redistributions of source code must retain the above copyright
-     notice, this list of conditions and the following disclaimer.
-   - Redistributions in binary form must reproduce the above copyright
-     notice, this list of conditions and the following disclaimer in the
-     documentation and/or other materials provided with the distribution.
-   - Neither the name of ARM nor the names of its contributors may be used
-     to endorse or promote products derived from this software without
-     specific prior written permission.
-   *
-   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-   AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-   IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-   ARE DISCLAIMED. IN NO EVENT SHALL COPYRIGHT HOLDERS AND CONTRIBUTORS BE
-   LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-   CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-   SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-   INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-   CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-   ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-   POSSIBILITY OF SUCH DAMAGE.
-   ---------------------------------------------------------------------------*/
-
-
-#ifndef __CORE_CMFUNC_H
-#define __CORE_CMFUNC_H
-
-
-/* ###########################  Core Function Access  ########################### */
-/** \ingroup  CMSIS_Core_FunctionInterface
-    \defgroup CMSIS_Core_RegAccFunctions CMSIS Core Register Access Functions
-  @{
- */
-
-#if   defined ( __CC_ARM ) /*------------------RealView Compiler -----------------*/
-/* ARM armcc specific functions */
-
-#if (__ARMCC_VERSION < 400677)
-  #error "Please use ARM Compiler Toolchain V4.0.677 or later!"
-#endif
-
-/* intrinsic void __enable_irq();     */
-/* intrinsic void __disable_irq();    */
-
-/** \brief  Get Control Register
-
-    This function returns the content of the Control Register.
-
-    \return               Control Register value
- */
-__STATIC_INLINE uint32_t __get_CONTROL(void)
-{
-  register uint32_t __regControl         __ASM("control");
-  return(__regControl);
-}
-
-
-/** \brief  Set Control Register
-
-    This function writes the given value to the Control Register.
-
-    \param [in]    control  Control Register value to set
- */
-__STATIC_INLINE void __set_CONTROL(uint32_t control)
-{
-  register uint32_t __regControl         __ASM("control");
-  __regControl = control;
-}
-
-
-/** \brief  Get IPSR Register
-
-    This function returns the content of the IPSR Register.
-
-    \return               IPSR Register value
- */
-__STATIC_INLINE uint32_t __get_IPSR(void)
-{
-  register uint32_t __regIPSR          __ASM("ipsr");
-  return(__regIPSR);
-}
-
-
-/** \brief  Get APSR Register
-
-    This function returns the content of the APSR Register.
-
-    \return               APSR Register value
- */
-__STATIC_INLINE uint32_t __get_APSR(void)
-{
-  register uint32_t __regAPSR          __ASM("apsr");
-  return(__regAPSR);
-}
-
-
-/** \brief  Get xPSR Register
-
-    This function returns the content of the xPSR Register.
-
-    \return               xPSR Register value
- */
-__STATIC_INLINE uint32_t __get_xPSR(void)
-{
-  register uint32_t __regXPSR          __ASM("xpsr");
-  return(__regXPSR);
-}
-
-
-/** \brief  Get Process Stack Pointer
-
-    This function returns the current value of the Process Stack Pointer (PSP).
-
-    \return               PSP Register value
- */
-__STATIC_INLINE uint32_t __get_PSP(void)
-{
-  register uint32_t __regProcessStackPointer  __ASM("psp");
-  return(__regProcessStackPointer);
-}
-
-
-/** \brief  Set Process Stack Pointer
-
-    This function assigns the given value to the Process Stack Pointer (PSP).
-
-    \param [in]    topOfProcStack  Process Stack Pointer value to set
- */
-__STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
-{
-  register uint32_t __regProcessStackPointer  __ASM("psp");
-  __regProcessStackPointer = topOfProcStack;
-}
-
-
-/** \brief  Get Main Stack Pointer
-
-    This function returns the current value of the Main Stack Pointer (MSP).
-
-    \return               MSP Register value
- */
-__STATIC_INLINE uint32_t __get_MSP(void)
-{
-  register uint32_t __regMainStackPointer     __ASM("msp");
-  return(__regMainStackPointer);
-}
-
-
-/** \brief  Set Main Stack Pointer
-
-    This function assigns the given value to the Main Stack Pointer (MSP).
-
-    \param [in]    topOfMainStack  Main Stack Pointer value to set
- */
-__STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
-{
-  register uint32_t __regMainStackPointer     __ASM("msp");
-  __regMainStackPointer = topOfMainStack;
-}
-
-
-/** \brief  Get Priority Mask
-
-    This function returns the current state of the priority mask bit from the Priority Mask Register.
-
-    \return               Priority Mask value
- */
-__STATIC_INLINE uint32_t __get_PRIMASK(void)
-{
-  register uint32_t __regPriMask         __ASM("primask");
-  return(__regPriMask);
-}
-
-
-/** \brief  Set Priority Mask
-
-    This function assigns the given value to the Priority Mask Register.
-
-    \param [in]    priMask  Priority Mask
- */
-__STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
-{
-  register uint32_t __regPriMask         __ASM("primask");
-  __regPriMask = (priMask);
-}
-
-
-#if       (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300)
-
-/** \brief  Enable FIQ
-
-    This function enables FIQ interrupts by clearing the F-bit in the CPSR.
-    Can only be executed in Privileged modes.
- */
-#define __enable_fault_irq                __enable_fiq
-
-
-/** \brief  Disable FIQ
-
-    This function disables FIQ interrupts by setting the F-bit in the CPSR.
-    Can only be executed in Privileged modes.
- */
-#define __disable_fault_irq               __disable_fiq
-
-
-/** \brief  Get Base Priority
-
-    This function returns the current value of the Base Priority register.
-
-    \return               Base Priority register value
- */
-__STATIC_INLINE uint32_t  __get_BASEPRI(void)
-{
-  register uint32_t __regBasePri         __ASM("basepri");
-  return(__regBasePri);
-}
-
-
-/** \brief  Set Base Priority
-
-    This function assigns the given value to the Base Priority register.
-
-    \param [in]    basePri  Base Priority value to set
- */
-__STATIC_INLINE void __set_BASEPRI(uint32_t basePri)
-{
-  register uint32_t __regBasePri         __ASM("basepri");
-  __regBasePri = (basePri & 0xff);
-}
-
-
-/** \brief  Get Fault Mask
-
-    This function returns the current value of the Fault Mask register.
-
-    \return               Fault Mask register value
- */
-__STATIC_INLINE uint32_t __get_FAULTMASK(void)
-{
-  register uint32_t __regFaultMask       __ASM("faultmask");
-  return(__regFaultMask);
-}
-
-
-/** \brief  Set Fault Mask
-
-    This function assigns the given value to the Fault Mask register.
-
-    \param [in]    faultMask  Fault Mask value to set
- */
-__STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
-{
-  register uint32_t __regFaultMask       __ASM("faultmask");
-  __regFaultMask = (faultMask & (uint32_t)1);
-}
-
-#endif /* (__CORTEX_M >= 0x03) || (__CORTEX_SC >= 300) */
-
-
-#if       (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
-
-/** \brief  Get FPSCR
-
-    This function returns the current value of the Floating Point Status/Control register.
-
-    \return               Floating Point Status/Control register value
- */
-__STATIC_INLINE uint32_t __get_FPSCR(void)
-{
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
-  register uint32_t __regfpscr         __ASM("fpscr");
-  return(__regfpscr);
-#else
-   return(0);
-#endif
-}
-
-
-/** \brief  Set FPSCR
-
-    This function assigns the given value to the Floating Point Status/Control register.
-
-    \param [in]    fpscr  Floating Point Status/Control value to set
- */
-__STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
-  register uint32_t __regfpscr         __ASM("fpscr");
-  __regfpscr = (fpscr);
-#endif
-}
-
-#endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
-
-
-#elif defined ( __GNUC__ ) /*------------------ GNU Compiler ---------------------*/
-/* GNU gcc specific functions */
-
-/** \brief  Enable IRQ Interrupts
-
-  This function enables IRQ interrupts by clearing the I-bit in the CPSR.
-  Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_irq(void)
-{
-  __ASM volatile ("cpsie i" : : : "memory");
-}
-
-
-/** \brief  Disable IRQ Interrupts
-
-  This function disables IRQ interrupts by setting the I-bit in the CPSR.
-  Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_irq(void)
-{
-  __ASM volatile ("cpsid i" : : : "memory");
-}
-
-
-/** \brief  Get Control Register
-
-    This function returns the content of the Control Register.
-
-    \return               Control Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_CONTROL(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, control" : "=r" (result) );
-  return(result);
-}
-
-
-/** \brief  Set Control Register
-
-    This function writes the given value to the Control Register.
-
-    \param [in]    control  Control Register value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_CONTROL(uint32_t control)
-{
-  __ASM volatile ("MSR control, %0" : : "r" (control) : "memory");
-}
-
-
-/** \brief  Get IPSR Register
-
-    This function returns the content of the IPSR Register.
-
-    \return               IPSR Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_IPSR(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, ipsr" : "=r" (result) );
-  return(result);
-}
-
-
-/** \brief  Get APSR Register
-
-    This function returns the content of the APSR Register.
-
-    \return               APSR Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_APSR(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, apsr" : "=r" (result) );
-  return(result);
-}
-
-
-/** \brief  Get xPSR Register
-
-    This function returns the content of the xPSR Register.
-
-    \return               xPSR Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_xPSR(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, xpsr" : "=r" (result) );
-  return(result);
-}
-
-
-/** \brief  Get Process Stack Pointer
-
-    This function returns the current value of the Process Stack Pointer (PSP).
-
-    \return               PSP Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PSP(void)
-{
-  register uint32_t result;
-
-  __ASM volatile ("MRS %0, psp\n"  : "=r" (result) );
-  return(result);
-}
-
-
-/** \brief  Set Process Stack Pointer
-
-    This function assigns the given value to the Process Stack Pointer (PSP).
-
-    \param [in]    topOfProcStack  Process Stack Pointer value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PSP(uint32_t topOfProcStack)
-{
-  __ASM volatile ("MSR psp, %0\n" : : "r" (topOfProcStack) : "sp");
-}
-
-
-/** \brief  Get Main Stack Pointer
-
-    This function returns the current value of the Main Stack Pointer (MSP).
-
-    \return               MSP Register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_MSP(void)
-{
-  register uint32_t result;
-
-  __ASM volatile ("MRS %0, msp\n" : "=r" (result) );
-  return(result);
-}
-
-
-/** \brief  Set Main Stack Pointer
-
-    This function assigns the given value to the Main Stack Pointer (MSP).
-
-    \param [in]    topOfMainStack  Main Stack Pointer value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_MSP(uint32_t topOfMainStack)
-{
-  __ASM volatile ("MSR msp, %0\n" : : "r" (topOfMainStack) : "sp");
-}
-
-
-/** \brief  Get Priority Mask
-
-    This function returns the current state of the priority mask bit from the Priority Mask Register.
-
-    \return               Priority Mask value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_PRIMASK(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, primask" : "=r" (result) );
-  return(result);
-}
-
-
-/** \brief  Set Priority Mask
-
-    This function assigns the given value to the Priority Mask Register.
-
-    \param [in]    priMask  Priority Mask
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_PRIMASK(uint32_t priMask)
-{
-  __ASM volatile ("MSR primask, %0" : : "r" (priMask) : "memory");
-}
-
-
-#if       (__CORTEX_M >= 0x03)
-
-/** \brief  Enable FIQ
-
-    This function enables FIQ interrupts by clearing the F-bit in the CPSR.
-    Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __enable_fault_irq(void)
-{
-  __ASM volatile ("cpsie f" : : : "memory");
-}
-
-
-/** \brief  Disable FIQ
-
-    This function disables FIQ interrupts by setting the F-bit in the CPSR.
-    Can only be executed in Privileged modes.
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __disable_fault_irq(void)
-{
-  __ASM volatile ("cpsid f" : : : "memory");
-}
-
-
-/** \brief  Get Base Priority
-
-    This function returns the current value of the Base Priority register.
-
-    \return               Base Priority register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_BASEPRI(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, basepri_max" : "=r" (result) );
-  return(result);
-}
-
-
-/** \brief  Set Base Priority
-
-    This function assigns the given value to the Base Priority register.
-
-    \param [in]    basePri  Base Priority value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_BASEPRI(uint32_t value)
-{
-  __ASM volatile ("MSR basepri, %0" : : "r" (value) : "memory");
-}
-
-
-/** \brief  Get Fault Mask
-
-    This function returns the current value of the Fault Mask register.
-
-    \return               Fault Mask register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FAULTMASK(void)
-{
-  uint32_t result;
-
-  __ASM volatile ("MRS %0, faultmask" : "=r" (result) );
-  return(result);
-}
-
-
-/** \brief  Set Fault Mask
-
-    This function assigns the given value to the Fault Mask register.
-
-    \param [in]    faultMask  Fault Mask value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FAULTMASK(uint32_t faultMask)
-{
-  __ASM volatile ("MSR faultmask, %0" : : "r" (faultMask) : "memory");
-}
-
-#endif /* (__CORTEX_M >= 0x03) */
-
-
-#if       (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07)
-
-/** \brief  Get FPSCR
-
-    This function returns the current value of the Floating Point Status/Control register.
-
-    \return               Floating Point Status/Control register value
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE uint32_t __get_FPSCR(void)
-{
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
-  uint32_t result;
-
-  /* Empty asm statement works as a scheduling barrier */
-  __ASM volatile ("");
-  __ASM volatile ("VMRS %0, fpscr" : "=r" (result) );
-  __ASM volatile ("");
-  return(result);
-#else
-   return(0);
-#endif
-}
-
-
-/** \brief  Set FPSCR
-
-    This function assigns the given value to the Floating Point Status/Control register.
-
-    \param [in]    fpscr  Floating Point Status/Control value to set
- */
-__attribute__( ( always_inline ) ) __STATIC_INLINE void __set_FPSCR(uint32_t fpscr)
-{
-#if (__FPU_PRESENT == 1) && (__FPU_USED == 1)
-  /* Empty asm statement works as a scheduling barrier */
-  __ASM volatile ("");
-  __ASM volatile ("VMSR fpscr, %0" : : "r" (fpscr) : "vfpcc");
-  __ASM volatile ("");
-#endif
-}
-
-#endif /* (__CORTEX_M == 0x04) || (__CORTEX_M == 0x07) */
-
-
-#elif defined ( __ICCARM__ ) /*------------------ ICC Compiler -------------------*/
-/* IAR iccarm specific functions */
-#include <cmsis_iar.h>
-
-
-#elif defined ( __TMS470__ ) /*---------------- TI CCS Compiler ------------------*/
-/* TI CCS specific functions */
-#include <cmsis_ccs.h>
-
-
-#elif defined ( __TASKING__ ) /*------------------ TASKING Compiler --------------*/
-/* TASKING carm specific functions */
-/*
- * The CMSIS functions have been implemented as intrinsics in the compiler.
- * Please use "carm -?i" to get an up to date list of all intrinsics,
- * Including the CMSIS ones.
- */
-
-
-#elif defined ( __CSMC__ ) /*------------------ COSMIC Compiler -------------------*/
-/* Cosmic specific functions */
-#include <cmsis_csm.h>
-
-#endif
-
-/*@} end of CMSIS_Core_RegAccFunctions */
-
-#endif /* __CORE_CMFUNC_H */

bsp/nrf51822/Libraries/SConscript

-import rtconfig
-Import('RTT_ROOT')
-from building import *
-
-# get current directory
-cwd = GetCurrentDir()
-
-# The set of source files associated with this SConscript file.
-src = Split("""
-nrf51822/Source/templates/system_nrf51.c
-""")
-
-#add for Startup script 
-if rtconfig.CROSS_TOOL == 'gcc':
-     src = src + ['nrf51822/Source/templates/arm/arm_startup_nrf51.s']
-elif rtconfig.CROSS_TOOL == 'keil':
-     src = src + ['nrf51822/Source/templates/arm/arm_startup_nrf51.s']
-elif rtconfig.CROSS_TOOL == 'iar':
-     src = src + ['nrf51822/Source/templates/arm/arm_startup_nrf51.s']
-
-path = [cwd + '/CMSIS/Include',
-        cwd + '/nrf51822/Include']
-
-CPPDEFINES = ['USE_STDPERIPH_DRIVER', 'NRF51']
-group = DefineGroup('Drivers', src, depend = [''], CPPPATH = path, CPPDEFINES = CPPDEFINES)
-
-Return('group')

bsp/nrf51822/Libraries/nrf51822/Include/compiler_abstraction.h

-/*
-
-Copyright (c) 2010 - 2021, Nordic Semiconductor ASA All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-1. Redistributions of source code must retain the above copyright notice, this
-   list of conditions and the following disclaimer.
-
-2. Redistributions in binary form must reproduce the above copyright
-   notice, this list of conditions and the following disclaimer in the
-   documentation and/or other materials provided with the distribution.
-
-3. Neither the name of Nordic Semiconductor ASA nor the names of its
-   contributors may be used to endorse or promote products derived from this
-   software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
-ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
-LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-POSSIBILITY OF SUCH DAMAGE.
-
-*/
-
-#ifndef _COMPILER_ABSTRACTION_H
-#define _COMPILER_ABSTRACTION_H
-
-/*lint ++flb "Enter library region" */
-
-#ifndef NRF_STRING_CONCATENATE_IMPL
-    #define NRF_STRING_CONCATENATE_IMPL(lhs, rhs) lhs ## rhs
-#endif
-#ifndef NRF_STRING_CONCATENATE
-    #define NRF_STRING_CONCATENATE(lhs, rhs) NRF_STRING_CONCATENATE_IMPL(lhs, rhs)
-#endif
-
-#if defined ( __CC_ARM )
-
-    #ifndef __ASM
-        #define __ASM               __asm
-    #endif
-
-    #ifndef __INLINE
-        #define __INLINE            __inline
-    #endif
-
-    #ifndef __WEAK
-        #define __WEAK              __weak
-    #endif
-
-    #ifndef __ALIGN
-        #define __ALIGN(n)          __align(n)
-    #endif
-
-    #ifndef __PACKED
-        #define __PACKED            __packed
-    #endif
-
-    #ifndef __UNUSED
-        #define __UNUSED            __attribute__((unused))
-    #endif
-
-    #define GET_SP()                __current_sp()
-
-    #ifndef NRF_STATIC_ASSERT
-        #define NRF_STATIC_ASSERT(cond, msg) \
-            ;enum { NRF_STRING_CONCATENATE(static_assert_on_line_, __LINE__) = 1 / (!!(cond)) }
-    #endif
-    
-#elif defined (__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
-
-    #ifndef __ASM
-        #define __ASM               __asm
-    #endif
-
-    #ifndef __INLINE
-        #define __INLINE            __inline
-    #endif
-
-    #ifndef __WEAK
-        #define __WEAK              __attribute__((weak))
-    #endif
-
-    #ifndef __ALIGN
-        #define __ALIGN(n)          __attribute__((aligned(n)))
-    #endif
-
-    #ifndef __PACKED
-        #define __PACKED            __attribute__((packed, aligned(1)))
-    #endif
-
-    #ifndef __UNUSED
-        #define __UNUSED            __attribute__((unused))
-    #endif
-
-    #define GET_SP()                __current_sp()
-
-    #ifndef NRF_STATIC_ASSERT
-        #ifdef __cplusplus
-            #ifndef _Static_assert
-                #define _Static_assert static_assert
-            #endif
-        #endif
-        #define NRF_STATIC_ASSERT(cond, msg) _Static_assert(cond, msg)
-    #endif
-
-#elif defined ( __ICCARM__ )
-
-    #ifndef __ASM
-        #define __ASM               __asm
-    #endif
-
-    #ifndef __INLINE
-        #define __INLINE            inline
-    #endif
-
-    #ifndef __WEAK
-        #define __WEAK              __weak
-    #endif
-
-    #if (__VER__ >= 8000000)
-        #ifndef __ALIGN
-            #define __ALIGN(n) __attribute__((aligned(x)))
-        #endif
-
-        #ifndef   __PACKED
-            #define __PACKED __attribute__((packed, aligned(1)))
-        #endif
-    #else
-        #ifndef __ALIGN
-            #define STRING_PRAGMA(x) _Pragma(#x)
-            #define __ALIGN(n) STRING_PRAGMA(data_alignment = n)
-        #endif
-
-        #ifndef   __PACKED
-            #define __PACKED __packed
-        #endif
-    #endif
-
-    #ifndef __UNUSED
-        #define __UNUSED
-    #endif
-    
-    #define GET_SP()                __get_SP()
-
-    #ifndef NRF_STATIC_ASSERT
-        #define NRF_STATIC_ASSERT(cond, msg) static_assert(cond, msg)
-    #endif
-
-#elif defined   ( __GNUC__ ) ||  defined   ( __clang__ )
-
-    #ifndef __ASM
-        #define __ASM               __asm
-    #endif
-
-    #ifndef __INLINE
-        #define __INLINE            inline
-    #endif
-
-    #ifndef __WEAK
-        #define __WEAK              __attribute__((weak))
-    #endif
-
-    #ifndef __ALIGN
-        #define __ALIGN(n)          __attribute__((aligned(n)))
-    #endif
-
-    #ifndef __PACKED
-        #define __PACKED           __attribute__((packed)) 
-    #endif
-
-    #ifndef __UNUSED
-        #define __UNUSED            __attribute__((unused))
-    #endif
-
-    #define GET_SP()                gcc_current_sp()
-
-    static inline unsigned int gcc_current_sp(void)
-    {
-        unsigned int stack_pointer = 0;
-        __asm__ __volatile__ ("mov %0, sp" : "=r"(stack_pointer));
-        return stack_pointer;
-    }
-
-    #ifndef NRF_STATIC_ASSERT
-        #ifdef __cplusplus
-            #ifndef _Static_assert
-                #define _Static_assert static_assert
-            #endif
-        #endif
-        #define NRF_STATIC_ASSERT(cond, msg) _Static_assert(cond, msg)
-    #endif
-
-#elif defined   ( __TASKING__ )
-
-    #ifndef __ASM
-        #define __ASM               __asm
-    #endif
-
-    #ifndef __INLINE
-        #define __INLINE            inline
-    #endif
-
-    #ifndef __WEAK
-        #define __WEAK              __attribute__((weak))
-    #endif
-
-    #ifndef __ALIGN
-        #define __ALIGN(n)          __align(n)
-    #endif
-    
-    /* Not defined for TASKING. */
-    #ifndef __PACKED
-        #define __PACKED
-    #endif
-
-    #ifndef __UNUSED
-        #define __UNUSED            __attribute__((unused))
-    #endif
-
-    #define GET_SP()                __get_MSP()
-
-    #ifndef NRF_STATIC_ASSERT
-        #define NRF_STATIC_ASSERT(cond, msg) static_assert(cond, msg)
-    #endif
-
-#endif
-
-#define NRF_MDK_VERSION_ASSERT_AT_LEAST(major, minor, micro) \
-    NRF_STATIC_ASSERT( \
-        ( \
-            (major < MDK_MAJOR_VERSION) || \
-            (major == MDK_MAJOR_VERSION && minor < MDK_MINOR_VERSION) || \
-            (major == MDK_MAJOR_VERSION && minor == MDK_MINOR_VERSION && micro < MDK_MICRO_VERSION) \
-        ), "MDK version mismatch.")
-
-#define NRF_MDK_VERSION_ASSERT_EXACT(major, minor, micro) \
-    NRF_STATIC_ASSERT( \
-        ( \
-            (major != MDK_MAJOR_VERSION) || \
-            (major != MDK_MAJOR_VERSION) || \
-            (major != MDK_MAJOR_VERSION) \
-        ), "MDK version mismatch.")
-
-/*lint --flb "Leave library region" */
-
-#endif

bsp/nrf51822/Libraries/nrf51822/Include/nrf.h

-/*
-
-Copyright (c) 2010 - 2021, Nordic Semiconductor ASA All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
-1. Redistributions of source code must retain the above copyright notice, this
-   list of conditions and the following disclaimer.
-
-2. Redistributions in binary form must reproduce the above copyright
-   notice, this list of conditions and the following disclaimer in the
-   documentation and/or other materials provided with the distribution.
-
-3. Neither the name of Nordic Semiconductor ASA nor the names of its
-   contributors may be used to endorse or promote products derived from this
-   software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE
-ARE DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
-LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
-CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
-SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
-INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
-CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
-ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
-POSSIBILITY OF SUCH DAMAGE.
-
-*/
-
-#ifndef NRF_H
-#define NRF_H
-
-/* MDK version */
-#define MDK_MAJOR_VERSION   8 
-#define MDK_MINOR_VERSION   38 
-#define MDK_MICRO_VERSION   0 
-
-   
-/* Define coprocessor domains */
-#if defined (NRF5340_XXAA_APPLICATION) || defined (NRF5340_XXAA_NETWORK)
-    #ifndef NRF5340_XXAA
-        #define NRF5340_XXAA
-    #endif
-#endif
-#if defined (NRF5340_XXAA_APPLICATION)
-    #ifndef NRF_APPLICATION
-        #define NRF_APPLICATION
-    #endif
-#endif
-#if defined (NRF5340_XXAA_NETWORK)
-    #ifndef NRF_NETWORK
-        #define NRF_NETWORK
-    #endif
-#endif
-
-/* Apply compatibility macros for old nRF5340 macros */
-#if defined(NRF5340_XXAA)
-    #if defined (NRF_APPLICATION)
-        #ifndef NRF5340_XXAA_APPLICATION
-            #define NRF5340_XXAA_APPLICATION
-        #endif
-    #endif
-    #if defined (NRF_NETWORK)
-        #ifndef NRF5340_XXAA_NETWORK
-            #define NRF5340_XXAA_NETWORK
-        #endif
-    #endif
-#endif
-
-/* Define NRF51_SERIES for common use in nRF51 series devices. Only if not previously defined. */
-#if defined (NRF51) ||\
-    defined (NRF51422_XXAA) ||\
-    defined (NRF51422_XXAB) ||\
-    defined (NRF51422_XXAC) ||\
-    defined (NRF51801_XXAB) ||\
-    defined (NRF51802_XXAA) ||\
-    defined (NRF51822_XXAA) ||\
-    defined (NRF51822_XXAB) ||\
-    defined (NRF51822_XXAC) ||\
-    defined (NRF51824_XXAA)
-    #ifndef NRF51_SERIES
-        #define NRF51_SERIES
-    #endif
-    #ifndef NRF51
-        #define NRF51
-    #endif
-#endif
-
-/* Redefine "old" too-generic name NRF52 to NRF52832_XXAA to keep backwards compatibility. */
-#if defined (NRF52)
-    #ifndef NRF52832_XXAA
-        #define NRF52832_XXAA
-    #endif
-#endif
-
-/* Define NRF52_SERIES for common use in nRF52 series devices. Only if not previously defined. */
-#if defined (NRF52805_XXAA) || defined (NRF52810_XXAA) || defined (NRF52811_XXAA) || defined (NRF52820_XXAA) || defined (NRF52832_XXAA) || defined (NRF52832_XXAB) || defined (NRF52833_XXAA) || defined (NRF52840_XXAA)
-    #ifndef NRF52_SERIES
-        #define NRF52_SERIES
-    #endif
-#endif
-
-/* Define NRF53_SERIES for common use in nRF53 series devices. */
-#if defined (NRF5340_XXAA)
-    #ifndef NRF53_SERIES
-        #define NRF53_SERIES
-    #endif
-#endif
-
-/* Define NRF91_SERIES for common use in nRF91 series devices. */
-#if defined (NRF9160_XXAA)
-    #ifndef NRF91_SERIES    
-        #define NRF91_SERIES
-    #endif
-#endif
-
-/* Device selection for device includes. */
-#if defined (NRF51)
-    #include "nrf51.h"
-    #include "nrf51_bitfields.h"
-    #include "nrf51_deprecated.h"
-
-#elif defined (NRF52805_XXAA)
-    #include "nrf52805.h"
-    #include "nrf52805_bitfields.h"
-    #include "nrf51_to_nrf52810.h"
-    #include "nrf52_to_nrf52810.h"
-    #include "nrf52810_to_nrf52811.h"
-#elif defined (NRF52810_XXAA)
-    #include "nrf52810.h"
-    #include "nrf52810_bitfields.h"
-    #include "nrf51_to_nrf52810.h"
-    #include "nrf52_to_nrf52810.h"
-    #include "nrf52810_name_change.h"
-#elif defined (NRF52811_XXAA)
-    #include "nrf52811.h"
-    #include "nrf52811_bitfields.h"
-    #include "nrf51_to_nrf52810.h"
-    #include "nrf52_to_nrf52810.h"
-    #include "nrf52810_to_nrf52811.h"
-#elif defined (NRF52820_XXAA)
-    #include "nrf52820.h"
-    #include "nrf52820_bitfields.h"
-    #include "nrf51_to_nrf52.h"
-    #include "nrf52_to_nrf52833.h"
-    #include "nrf52833_to_nrf52820.h"
-#elif defined (NRF52832_XXAA) || defined (NRF52832_XXAB)
-    #include "nrf52.h"
-    #include "nrf52_bitfields.h"
-    #include "nrf51_to_nrf52.h"
-    #include "nrf52_name_change.h"
-#elif defined (NRF52833_XXAA)
-    #include "nrf52833.h"
-    #include "nrf52833_bitfields.h"
-    #include "nrf52_to_nrf52833.h"
-    #include "nrf51_to_nrf52.h"
-#elif defined (NRF52840_XXAA)
-    #include "nrf52840.h"
-    #include "nrf52840_bitfields.h"
-    #include "nrf51_to_nrf52840.h"
-    #include "nrf52_to_nrf52840.h"
-
-#elif defined (NRF5340_XXAA)
-    #if defined(NRF_APPLICATION)
-        #include "nrf5340_application.h"
-        #include "nrf5340_application_bitfields.h"
-        #include "nrf5340_application_name_change.h"
-    #elif defined (NRF_NETWORK)
-        #include "nrf5340_network.h"
-        #include "nrf5340_network_bitfields.h"
-        #include "nrf5340_network_name_change.h"
-    #endif
-
-#elif defined (NRF9160_XXAA)
-    #include "nrf9160.h"
-    #include "nrf9160_bitfields.h"
-    #include "nrf9160_name_change.h"
-
-#else
-    #error "Device must be defined. See nrf.h."
-#endif /* NRF51, NRF52805_XXAA, NRF52810_XXAA, NRF52811_XXAA, NRF52820_XXAA, NRF52832_XXAA, NRF52832_XXAB, NRF52833_XXAA, NRF52840_XXAA, NRF5340_XXAA_APPLICATION, NRF5340_XXAA_NETWORK, NRF9160_XXAA */
-
-#include "compiler_abstraction.h"
-
-#endif /* NRF_H */
-

bsp/nrf51822/Libraries/nrf51822/Include/nrf_gpio.h

-#ifndef NRF_GPIO_H__
-#define NRF_GPIO_H__
-
-#include "nrf51.h"
-#include "nrf51_bitfields.h"
-
-/**
- * @defgroup nrf_gpio GPIO abstraction
- * @{
- * @ingroup nrf_drivers
- * @brief GPIO pin abstraction and port abstraction for reading and writing byte-wise to GPIO ports.
- *
- * Here, the GPIO ports are defined as follows:
- * - Port 0 -> pin 0-7
- * - Port 1 -> pin 8-15
- * - Port 2 -> pin 16-23
- * - Port 3 -> pin 24-31
- */
-
-/**
- * @enum nrf_gpio_port_dir_t
- * @brief Enumerator used for setting the direction of a GPIO port.
- */
-typedef enum
-{
-    NRF_GPIO_PORT_DIR_OUTPUT,       ///<  Output
-    NRF_GPIO_PORT_DIR_INPUT         ///<  Input
-} nrf_gpio_port_dir_t;
-
-/**
- * @enum nrf_gpio_pin_dir_t
- * Pin direction definitions.
- */
-typedef enum
-{
-    NRF_GPIO_PIN_DIR_INPUT,   ///< Input
-    NRF_GPIO_PIN_DIR_OUTPUT   ///< Output
-} nrf_gpio_pin_dir_t;
-
-/**
- * @enum nrf_gpio_port_select_t
- * @brief Enumerator used for selecting between port 0 - 3.
- */
-typedef enum
-{
-    NRF_GPIO_PORT_SELECT_PORT0 = 0,           ///<  Port 0 (GPIO pin 0-7)
-    NRF_GPIO_PORT_SELECT_PORT1,               ///<  Port 1 (GPIO pin 8-15)
-    NRF_GPIO_PORT_SELECT_PORT2,               ///<  Port 2 (GPIO pin 16-23)
-    NRF_GPIO_PORT_SELECT_PORT3,               ///<  Port 3 (GPIO pin 24-31)
-} nrf_gpio_port_select_t;
-
-/**
- * @enum nrf_gpio_pin_pull_t
- * @brief Enumerator used for selecting the pin to be pulled down or up at the time of pin configuration
- */
-typedef enum
-{
-    NRF_GPIO_PIN_NOPULL   = GPIO_PIN_CNF_PULL_Disabled,                 ///<  Pin pullup resistor disabled
-    NRF_GPIO_PIN_PULLDOWN = GPIO_PIN_CNF_PULL_Pulldown,                 ///<  Pin pulldown resistor enabled
-    NRF_GPIO_PIN_PULLUP   = GPIO_PIN_CNF_PULL_Pullup,                   ///<  Pin pullup resistor enabled
-} nrf_gpio_pin_pull_t;
-
-/**
- * @enum nrf_gpio_pin_sense_t
- * @brief Enumerator used for selecting the pin to sense high or low level on the pin input.
- */
-typedef enum
-{
-    NRF_GPIO_PIN_NOSENSE    = GPIO_PIN_CNF_SENSE_Disabled,              ///<  Pin sense level disabled.
-    NRF_GPIO_PIN_SENSE_LOW  = GPIO_PIN_CNF_SENSE_Low,                   ///<  Pin sense low level.
-    NRF_GPIO_PIN_SENSE_HIGH = GPIO_PIN_CNF_SENSE_High,                  ///<  Pin sense high level.
-} nrf_gpio_pin_sense_t;
-
-/**
- * @brief Function for configuring the GPIO pin range as outputs with normal drive strength.
- *        This function can be used to configure pin range as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
- *
- * @param pin_range_start specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
- *
- * @param pin_range_end specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
- *
- * @note For configuring only one pin as output use @ref nrf_gpio_cfg_output
- *       Sense capability on the pin is disabled, and input is disconnected from the buffer as the pins are configured as output.
- */
-static __INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end)
-{
-    /*lint -e{845} // A zero has been given as right argument to operator '|'" */
-    for (; pin_range_start <= pin_range_end; pin_range_start++)
-    {
-        NRF_GPIO->PIN_CNF[pin_range_start] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
-                                        | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
-                                        | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
-                                        | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
-                                        | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
-    }
-}
-
-/**
- * @brief Function for configuring the GPIO pin range as inputs with given initial value set, hiding inner details.
- *        This function can be used to configure pin range as simple input.
- *
- * @param pin_range_start specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
- *
- * @param pin_range_end specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30)
- *
- * @param pull_config State of the pin range pull resistor (no pull, pulled down or pulled high)
- *
- * @note  For configuring only one pin as input use @ref nrf_gpio_cfg_input
- *        Sense capability on the pin is disabled, and input is connected to buffer so that the GPIO->IN register is readable
- */
-static __INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start, uint32_t pin_range_end, nrf_gpio_pin_pull_t pull_config)
-{
-    /*lint -e{845} // A zero has been given as right argument to operator '|'" */
-    for (; pin_range_start <= pin_range_end; pin_range_start++)
-    {
-        NRF_GPIO->PIN_CNF[pin_range_start] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
-                                        | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
-                                        | (pull_config << GPIO_PIN_CNF_PULL_Pos)
-                                        | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
-                                        | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
-    }
-}
-
-/**
- * @brief Function for configuring the given GPIO pin number as output with given initial value set, hiding inner details.
- *        This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
- *
- * @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30)
- *
- * @note  Sense capability on the pin is disabled, and input is disconnected from the buffer as the pins are configured as output.
- */
-static __INLINE void nrf_gpio_cfg_output(uint32_t pin_number)
-{
-    /*lint -e{845} // A zero has been given as right argument to operator '|'" */
-    NRF_GPIO->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
-                                            | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
-                                            | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
-                                            | (GPIO_PIN_CNF_INPUT_Disconnect << GPIO_PIN_CNF_INPUT_Pos)
-                                            | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
-}
-
-/**
- * @brief Function for configuring the given GPIO pin number as input with given initial value set, hiding inner details.
- *        This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
- *
- * @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30)
- *
- * @param pull_config State of the pin range pull resistor (no pull, pulled down or pulled high)
- *
- * @note  Sense capability on the pin is disabled, and input is connected to buffer so that the GPIO->IN register is readable
- */
-static __INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config)
-{
-    /*lint -e{845} // A zero has been given as right argument to operator '|'" */
-    NRF_GPIO->PIN_CNF[pin_number] = (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
-                                        | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
-                                        | (pull_config << GPIO_PIN_CNF_PULL_Pos)
-                                        | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
-                                        | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
-}
-
-/**
- * @brief Function for configuring the given GPIO pin number as input with given initial value set, hiding inner details.
- *        This function can be used to configure pin range as simple input with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
- *        Sense capability on the pin is configurable, and input is connected to buffer so that the GPIO->IN register is readable.
- *
- * @param pin_number specifies the pin number of gpio pin numbers to be configured (allowed values 0-30).
- *
- * @param pull_config state of the pin pull resistor (no pull, pulled down or pulled high).
- *
- * @param sense_config sense level of the pin (no sense, sense low or sense high).
- */
-static __INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config, nrf_gpio_pin_sense_t sense_config)
-{
-    /*lint -e{845} // A zero has been given as right argument to operator '|'" */
-    NRF_GPIO->PIN_CNF[pin_number] = (sense_config << GPIO_PIN_CNF_SENSE_Pos)
-                                        | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
-                                        | (pull_config << GPIO_PIN_CNF_PULL_Pos)
-                                        | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
-                                        | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
-}
-
-/**
- * @brief Function for setting the direction for a GPIO pin.
- *
- * @param pin_number specifies the pin number [0:31] for which to
- * set the direction.
- *
- * @param direction specifies the direction
- */
-static __INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction)
-{
-    if(direction == NRF_GPIO_PIN_DIR_INPUT)
-    {
-        NRF_GPIO->PIN_CNF[pin_number] =
-          (GPIO_PIN_CNF_SENSE_Disabled << GPIO_PIN_CNF_SENSE_Pos)
-        | (GPIO_PIN_CNF_DRIVE_S0S1 << GPIO_PIN_CNF_DRIVE_Pos)
-        | (GPIO_PIN_CNF_PULL_Disabled << GPIO_PIN_CNF_PULL_Pos)
-        | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos)
-        | (GPIO_PIN_CNF_DIR_Input << GPIO_PIN_CNF_DIR_Pos);
-    }
-    else
-    {
-        NRF_GPIO->DIRSET = (1UL << pin_number);
-    }
-}
-
-/**
- * @brief Function for setting a GPIO pin.
- *
- * Note that the pin must be configured as an output for this
- * function to have any effect.
- *
- * @param pin_number specifies the pin number [0:31] to
- * set.
- */
-static __INLINE void nrf_gpio_pin_set(uint32_t pin_number)
-{
-    NRF_GPIO->OUTSET = (1UL << pin_number);
-}
-
-/**
- * @brief Function for clearing a GPIO pin.
- *
- * Note that the pin must be configured as an output for this
- * function to have any effect.
- *
- * @param pin_number specifies the pin number [0:31] to
- * clear.
- */
-static __INLINE void nrf_gpio_pin_clear(uint32_t pin_number)
-{
-    NRF_GPIO->OUTCLR = (1UL << pin_number);
-}
-
-/**
- * @brief Function for toggling a GPIO pin.
- *
- * Note that the pin must be configured as an output for this
- * function to have any effect.
- *
- * @param pin_number specifies the pin number [0:31] to
- * toggle.
- */
-static __INLINE void nrf_gpio_pin_toggle(uint32_t pin_number)
-{
-    const uint32_t pin_bit   = 1UL << pin_number;
-    const uint32_t pin_state = ((NRF_GPIO->OUT >> pin_number) & 1UL);
-    
-    if (pin_state == 0)
-    {
-        // Current state low, set high.
-        NRF_GPIO->OUTSET = pin_bit;        
-    }
-    else
-    {
-        // Current state high, set low.    
-        NRF_GPIO->OUTCLR = pin_bit;       
-    }
-}
-
-/**
- * @brief Function for writing a value to a GPIO pin.
- *
- * Note that the pin must be configured as an output for this
- * function to have any effect.
- *
- * @param pin_number specifies the pin number [0:31] to
- * write.
- *
- * @param value specifies the value to be written to the pin.
- * @arg 0 clears the pin
- * @arg >=1 sets the pin.
- */
-static __INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value)
-{
-    if (value == 0)
-    {
-        nrf_gpio_pin_clear(pin_number);
-    }
-    else
-    {
-        nrf_gpio_pin_set(pin_number);
-    }
-}
-
-/**
- * @brief Function for reading the input level of a GPIO pin.
- *
- * Note that the pin must have input connected for the value
- * returned from this function to be valid.
- *
- * @param pin_number specifies the pin number [0:31] to
- * read.
- *
- * @return
- * @retval 0 if the pin input level is low.
- * @retval 1 if the pin input level is high.
- * @retval > 1 should never occur.
- */
-static __INLINE uint32_t nrf_gpio_pin_read(uint32_t pin_number)
-{
-    return  ((NRF_GPIO->IN >> pin_number) & 1UL);
-}
-
-/**
- * @brief Generic function for writing a single byte of a 32 bit word at a given
- * address.
- *
- * This function should not be called from outside the nrf_gpio
- * abstraction layer.
- *
- * @param word_address is the address of the word to be written.
- *
- * @param byte_no is the the word byte number (0-3) to be written.
- *
- * @param value is the value to be written to byte "byte_no" of word
- * at address "word_address"
- */
-static __INLINE void nrf_gpio_word_byte_write(volatile uint32_t * word_address, uint8_t byte_no, uint8_t value)
-{
-    *((volatile uint8_t*)(word_address) + byte_no) = value;
-}
-
-/**
- * @brief Generic function for reading a single byte of a 32 bit word at a given
- * address.
- *
- * This function should not be called from outside the nrf_gpio
- * abstraction layer.
- *
- * @param word_address is the address of the word to be read.
- *
- * @param byte_no is the the byte number (0-3) of the word to be read.
- *
- * @return byte "byte_no" of word at address "word_address".
- */
-static __INLINE uint8_t nrf_gpio_word_byte_read(const volatile uint32_t* word_address, uint8_t byte_no)
-{
-    return (*((const volatile uint8_t*)(word_address) + byte_no));
-}
-
-/**
- * @brief Function for setting the direction of a port.
- *
- * @param port is the port for which to set the direction.
- *
- * @param dir direction to be set for this port.
- */
-static __INLINE void nrf_gpio_port_dir_set(nrf_gpio_port_select_t port, nrf_gpio_port_dir_t dir)
-{
-    if (dir == NRF_GPIO_PORT_DIR_OUTPUT)
-    {
-        nrf_gpio_word_byte_write(&NRF_GPIO->DIRSET, port, 0xFF);
-    }
-    else
-    {
-        nrf_gpio_range_cfg_input(port*8, (port+1)*8-1, NRF_GPIO_PIN_NOPULL);
-    }
-}
-
-/**
- * @brief Function for reading a GPIO port.
- *
- * @param port is the port to read.
- *
- * @return the input value on this port.
- */
-static __INLINE uint8_t nrf_gpio_port_read(nrf_gpio_port_select_t port)
-{
-    return nrf_gpio_word_byte_read(&NRF_GPIO->IN, port);
-}
-
-/**
- * @brief Function for writing to a GPIO port.
- *
- * @param port is the port to write.
- *
- * @param value is the value to write to this port.
- *
- * @sa nrf_gpio_port_dir_set()
- */
-static __INLINE void nrf_gpio_port_write(nrf_gpio_port_select_t port, uint8_t value)
-{
-    nrf_gpio_word_byte_write(&NRF_GPIO->OUT, port, value);
-}
-
-/**
- * @brief Function for setting individual pins on GPIO port.
- *
- * @param port is the port for which to set the pins.
- *
- * @param set_mask is a mask specifying which pins to set. A bit
- * set to 1 indicates that the corresponding port pin shall be
- * set.
- *
- * @sa nrf_gpio_port_dir_set()
- */
-static __INLINE void nrf_gpio_port_set(nrf_gpio_port_select_t port, uint8_t set_mask)
-{
-    nrf_gpio_word_byte_write(&NRF_GPIO->OUTSET, port, set_mask);
-}
-
-/**
- * @brief Function for clearing individual pins on GPIO port.
- *
- * @param port is the port for which to clear the pins.
- *
- * @param clr_mask is a mask specifying which pins to clear. A bit
- * set to 1 indicates that the corresponding port pin shall be
- * cleared.
- *
- * @sa nrf_gpio_port_dir_set()
- */
-static __INLINE void nrf_gpio_port_clear(nrf_gpio_port_select_t port, uint8_t clr_mask)
-{
-    nrf_gpio_word_byte_write(&NRF_GPIO->OUTCLR, port, clr_mask);
-}
-
-/** @} */
-
-#endif

bsp/nrf51822/Libraries/nrf51822/Include/system_nrf51.h

-/*
-
-Copyright (c) 2009-2021 ARM Limited. All rights reserved.
-
-    SPDX-License-Identifier: Apache-2.0
-
-Licensed under the Apache License, Version 2.0 (the License); you may
-not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an AS IS BASIS, WITHOUT
-WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-
-NOTICE: This file has been modified by Nordic Semiconductor ASA.
-
-*/
-
-#ifndef SYSTEM_NRF51_H
-#define SYSTEM_NRF51_H
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include <stdint.h>
-
-
-extern uint32_t SystemCoreClock;    /*!< System Clock Frequency (Core Clock)  */
-
-/**
- * Initialize the system
- *
- * @param  none
- * @return none
- *
- * @brief  Setup the microcontroller system.
- *         Initialize the System and update the SystemCoreClock variable.
- */
-extern void SystemInit (void);
-
-/**
- * Update SystemCoreClock variable
- *
- * @param  none
- * @return none
- *
- * @brief  Updates the SystemCoreClock with current core Clock
- *         retrieved from cpu registers.
- */
-extern void SystemCoreClockUpdate (void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* SYSTEM_NRF51_H */

bsp/nrf51822/Libraries/nrf51822/Source/templates/system_nrf51.c

-/*
-
-Copyright (c) 2009-2021 ARM Limited. All rights reserved.
-
-    SPDX-License-Identifier: Apache-2.0
-
-Licensed under the Apache License, Version 2.0 (the License); you may
-not use this file except in compliance with the License.
-You may obtain a copy of the License at
-
-    www.apache.org/licenses/LICENSE-2.0
-
-Unless required by applicable law or agreed to in writing, software
-distributed under the License is distributed on an AS IS BASIS, WITHOUT
-WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-See the License for the specific language governing permissions and
-limitations under the License.
-
-NOTICE: This file has been modified by Nordic Semiconductor ASA.
-
-*/
-
-/* NOTE: Template files (including this one) are application specific and therefore expected to
-   be copied into the application project folder prior to its use! */
-
-#include <stdint.h>
-#include <stdbool.h>
-#include "nrf.h"
-#include "nrf_erratas.h"
-#include "system_nrf51.h"
-
-/*lint ++flb "Enter library region" */
-
-
-#define __SYSTEM_CLOCK      (16000000UL)     /*!< nRF51 devices use a fixed System Clock Frequency of 16MHz */
-
-#if defined ( __CC_ARM )
-    uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
-#elif defined ( __ICCARM__ )
-    __root uint32_t SystemCoreClock = __SYSTEM_CLOCK;
-#elif defined   ( __GNUC__ )
-    uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK;
-#endif
-
-void SystemCoreClockUpdate(void)
-{
-    SystemCoreClock = __SYSTEM_CLOCK;
-}
-
-void SystemInit(void)
-{
-    /* If desired, switch off the unused RAM to lower consumption by the use of RAMON register.
-       It can also be done in the application main() function. */
-
-    /* Prepare the peripherals for use as indicated by the PAN 26 "System: Manual setup is required
-       to enable the use of peripherals" found at Product Anomaly document for your device found at
-       https://infocenter.nordicsemi.com/index.jsp The side effect of executing these instructions in the devices
-       that do not need it is that the new peripherals in the second generation devices (LPCOMP for
-       example) will not be available. */
-    if (nrf51_errata_26())
-    {
-        *(uint32_t volatile *)0x40000504 = 0xC007FFDF;
-        *(uint32_t volatile *)0x40006C18 = 0x00008000;
-    }
-
-    /* Disable PROTENSET registers under debug, as indicated by PAN 59 "MPU: Reset value of DISABLEINDEBUG
-       register is incorrect" found at Product Anomaly document for your device found at
-       https://infocenter.nordicsemi.com/index.jsp There is no side effect of using these instruction if not needed. */
-    if (nrf51_errata_59())
-    {
-        NRF_MPU->DISABLEINDEBUG = MPU_DISABLEINDEBUG_DISABLEINDEBUG_Disabled << MPU_DISABLEINDEBUG_DISABLEINDEBUG_Pos;
-    }
-
-    /* Execute the following code to eliminate excessive current in sleep mode with RAM retention in nRF51802 devices,
-       as indicated by PAN 76 "System: Excessive current in sleep mode with retention" found at Product Anomaly document
-       for your device found at https://infocenter.nordicsemi.com/index.jsp */
-    if (nrf51_errata_76()){
-        if (*(uint32_t volatile *)0x4006EC00 != 1){
-            *(uint32_t volatile *)0x4006EC00 = 0x9375;
-            while (*(uint32_t volatile *)0x4006EC00 != 1){
-            }
-        }
-        *(uint32_t volatile *)0x4006EC14 = 0xC0;
-    }
-
-    SystemCoreClockUpdate();
-}
-
-/*lint --flb "Leave library region" */

bsp/nrf51822/SConscript

-# for module compiling
-import os
-from building import *
-
-cwd  = GetCurrentDir()
-objs = []
-list = os.listdir(cwd)
-
-for d in list:
-    path = os.path.join(cwd, d)
-    if os.path.isfile(os.path.join(path, 'SConscript')):
-        objs = objs + SConscript(os.path.join(d, 'SConscript'))
-
-Return('objs')

bsp/nrf51822/SConstruct

-import os
-import sys
-import rtconfig
-
-if os.getenv('RTT_ROOT'):
-    RTT_ROOT = os.getenv('RTT_ROOT')
-else:
-    RTT_ROOT = os.path.normpath(os.getcwd() + '/../..')
-
-sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
-from building import *
-
-TARGET = 'rtthread-stm32f0xx.' + rtconfig.TARGET_EXT
-
-DefaultEnvironment(tools=[])
-env = Environment(tools = ['mingw'],
-	AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
-	CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
-	AR = rtconfig.AR, ARFLAGS = '-rc',
-	LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS)
-env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
-
-if rtconfig.PLATFORM == 'iar':
-	env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
-	env.Replace(ARFLAGS = [''])
-	env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map project.map'])
-
-Export('RTT_ROOT')
-Export('rtconfig')
-
-# prepare building environment
-objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
-
-# make a building
-DoBuilding(TARGET, objs)