Merge pull request #4946 from ssd4561/ft_2004_august

ft2004 bsp 增加gtimer 支持，修正can驱动初始化问题

bsp/ft2004/.config

@@ -21,6 +21,7 @@ CONFIG_RT_USING_HOOK=y
 CONFIG_RT_USING_IDLE_HOOK=y
 CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
 CONFIG_IDLE_THREAD_STACK_SIZE=4096
+CONFIG_SYSTEM_THREAD_STACK_SIZE=4096
 CONFIG_RT_USING_TIMER_SOFT=y
 CONFIG_RT_TIMER_THREAD_PRIO=4
 CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
@@ -30,6 +31,7 @@ CONFIG_RT_TIMER_THREAD_STACK_SIZE=512
 #
 # CONFIG_RT_KSERVICE_USING_STDLIB is not set
 # CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
+# CONFIG_RT_USING_ASM_MEMCPY is not set
 CONFIG_RT_DEBUG=y
 CONFIG_RT_DEBUG_COLOR=y
 # CONFIG_RT_DEBUG_INIT_CONFIG is not set
@@ -75,6 +77,7 @@ CONFIG_RT_USING_INTERRUPT_INFO=y
 CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=4096
 CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
+# CONFIG_RT_PRINTF_LONGLONG is not set
 CONFIG_RT_VER_NUM=0x40004
 CONFIG_ARCH_ARM=y
 CONFIG_RT_USING_CPU_FFS=y
@@ -159,6 +162,8 @@ CONFIG_RT_USING_DEVICE_IPC=y
 CONFIG_RT_PIPE_BUFSZ=512
 # CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
 CONFIG_RT_USING_SERIAL=y
+CONFIG_RT_USING_SERIAL_V1=y
+# CONFIG_RT_USING_SERIAL_V2 is not set
 CONFIG_RT_SERIAL_USING_DMA=y
 CONFIG_RT_SERIAL_RB_BUFSZ=256
 CONFIG_RT_USING_CAN=y
@@ -219,7 +224,7 @@ CONFIG_RT_USING_POSIX=y
 # CONFIG_RT_USING_POSIX_GETLINE is not set
 # CONFIG_RT_USING_POSIX_AIO is not set
 # CONFIG_RT_USING_MODULE is not set
-CONFIG_RT_LIBC_FIXED_TIMEZONE=8
+CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 
 #
 # Network
@@ -249,6 +254,7 @@ CONFIG_NETDEV_IPV6=0
 CONFIG_RT_USING_LWIP=y
 # CONFIG_RT_USING_LWIP141 is not set
 # CONFIG_RT_USING_LWIP202 is not set
+# CONFIG_RT_USING_LWIP203 is not set
 CONFIG_RT_USING_LWIP212=y
 # CONFIG_RT_USING_LWIP_IPV6 is not set
 CONFIG_RT_LWIP_MEM_ALIGNMENT=4

bsp/ft2004/applications/main.c

@@ -62,16 +62,8 @@ void demo_core(void)
 
 int main(void)
 {
-    int count = 1;
-
 #ifdef RT_USING_SMP
     demo_core();
 #endif
-
-    while (count++)
-    {
-        rt_thread_mdelay(2000);
-    }
-
     return RT_EOK;
 }

bsp/ft2004/drivers/board.c

@@ -68,11 +68,6 @@ struct mem_desc platform_mem_desc[] = {
 
 const rt_uint32_t platform_mem_desc_size = sizeof(platform_mem_desc) / sizeof(platform_mem_desc[0]);
 
-rt_uint32_t platform_get_gic_dist_base(void)
-{
-    return FT_GICV3_DISTRIBUTOR_BASEADDRESS;
-}
-
 static rt_uint32_t timerStep;
 
 void rt_hw_timer_isr(int vector, void *parameter)

bsp/ft2004/drivers/drv_can.c

@@ -188,7 +188,8 @@ int rt_hw_can_init(void)
 
 #ifdef BSP_USING_CAN1
     drv_can1.can_handle.Config.InstanceId = 1;
-    drv_can0.device.config.baud_rate = 1000000;
+    drv_can1.device.config.ticks = 20000;
+    drv_can1.device.config.baud_rate = 1000000;
     rt_sem_init(&drv_can1.recv_semaphore, "can1_recv", 0, RT_IPC_FLAG_FIFO);
     rt_hw_can_register(&drv_can1.device,
                        drv_can1.name,

bsp/ft2004/drivers/drv_usart.c

@@ -85,7 +85,8 @@ static void Ft_Os_Uart_Callback(void *Args, u32 Event, u32 EventData)
 
     if (FUART_EVENT_RECV_DATA == Event || FUART_EVENT_RECV_TOUT == Event)
     {
-        rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
+        if (serial->serial_rx)
+            rt_hw_serial_isr(serial, RT_SERIAL_EVENT_RX_IND);
     }
     else if (FUART_EVENT_RECV_ERROR == Event)
     {

bsp/ft2004/drivers/ft2004.h

@@ -14,12 +14,18 @@
 
 #include <rthw.h>
 #include <rtthread.h>
+#include "ft_parameters.h"
 
 #define ARM_GIC_NR_IRQS 160
 #define ARM_GIC_MAX_NR 1
 #define MAX_HANDLERS 160
 #define GIC_IRQ_START 0
-
+#define GIC_ACK_INTID_MASK 0x000003ff
 rt_uint64_t get_main_cpu_affval(void);
 
+rt_inline rt_uint32_t platform_get_gic_dist_base(void)
+{
+    return FT_GICV3_DISTRIBUTOR_BASEADDRESS;
+}
+
 #endif // !

bsp/ft2004/drivers/gtimer.c

+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-03-30     huijie.feng  first version
+ */
+
+#include "cp15.h"
+#include <rtdef.h>
+
+/** Set CNTFRQ
+ *  This function assigns the given value to PL1 Physical Timer Counter Frequency Register (CNTFRQ).
+ *  @param value: CNTFRQ Register value to set
+ */
+static inline void __set_cntfrq(rt_uint32_t value)
+{
+    __set_cp(15, 0, value, 14, 0, 0);
+}
+
+/** Get CNTFRQ
+ *  This function returns the value of the PL1 Physical Timer Counter Frequency Register (CNTFRQ).
+ *  return CNTFRQ Register value
+ */
+static inline rt_uint32_t __get_cntfrq(void)
+{
+    rt_uint32_t result;
+    __get_cp(15, 0, result, 14, 0 , 0);
+    return result;
+}
+
+/** Set CNTP_TVAL
+ *  This function assigns the given value to PL1 Physical Timer Value Register (CNTP_TVAL).
+ *  param value: CNTP_TVAL Register value to set
+ */
+static inline void __set_cntp_tval(rt_uint32_t value)
+{
+    __set_cp(15, 0, value, 14, 2, 0);
+}
+
+/** Get CNTP_TVAL
+ *  This function returns the value of the PL1 Physical Timer Value Register (CNTP_TVAL).
+ *  return CNTP_TVAL Register value
+ */
+static inline rt_uint32_t __get_cntp_tval(void)
+{
+    rt_uint32_t result;
+    __get_cp(15, 0, result, 14, 2, 0);
+    return result;
+}
+
+/** Get CNTPCT
+ *  This function returns the value of the 64 bits PL1 Physical Count Register (CNTPCT).
+ *  return CNTPCT Register value
+ */
+static inline rt_uint64_t __get_cntpct(void)
+{
+    rt_uint64_t result;
+    __get_cp64(15, 0, result, 14);
+    return result;
+}
+
+/** Set CNTP_CVAL
+ *  This function assigns the given value to 64bits PL1 Physical Timer CompareValue Register (CNTP_CVAL).
+ *  param value: CNTP_CVAL Register value to set
+*/
+static inline void __set_cntp_cval(rt_uint64_t value)
+{
+    __set_cp64(15, 2, value, 14);
+}
+
+/** Get CNTP_CVAL
+ *  This function returns the value of the 64 bits PL1 Physical Timer CompareValue Register (CNTP_CVAL).
+ *  return CNTP_CVAL Register value
+ */
+static inline rt_uint64_t __get_cntp_cval(void)
+{
+    rt_uint64_t result;
+    __get_cp64(15, 2, result, 14);
+    return result;
+}
+
+/** Set CNTP_CTL
+ *  This function assigns the given value to PL1 Physical Timer Control Register (CNTP_CTL).
+ *  param value: CNTP_CTL Register value to set
+ */
+static inline void __set_cntp_ctl(uint32_t value)
+{
+    __set_cp(15, 0, value, 14, 2, 1);
+}
+
+/** Get CNTP_CTL register
+ *  return CNTP_CTL Register value
+ */
+static inline rt_uint32_t __get_cntp_ctl(void)
+{
+    rt_uint32_t result;
+    __get_cp(15, 0, result, 14, 2, 1);
+    return result;
+}
+
+/** Configures the frequency the timer shall run at.
+ *  param value The timer frequency in Hz.
+ */
+void gtimer_set_counter_frequency(rt_uint32_t value)
+{
+    __set_cntfrq(value);
+    __asm__ volatile ("isb 0xF":::"memory");
+}
+
+/** Get the frequency the timer shall run at.
+ *  return timer frequency in Hz.
+ */
+rt_uint32_t gtimer_get_counter_frequency(void)
+{
+    return(__get_cntfrq());
+}
+
+/** Sets the reset value of the timer.
+ *  param value: The value the timer is loaded with.
+ */
+void gtimer_set_load_value(rt_uint32_t value)
+{
+    __set_cntp_tval(value);
+    __asm__ volatile ("isb 0xF":::"memory");
+}
+
+/** Get the current counter value.
+ *  return Current counter value.
+ */
+rt_uint32_t gtimer_get_current_value(void)
+{
+    return(__get_cntp_tval());
+}
+
+/** Get the current physical counter value.
+ *  return Current physical counter value.
+ */
+rt_uint64_t gtimer_get_current_physical_value(void)
+{
+    return(__get_cntpct());
+}
+
+/** Set the physical compare value.
+ *  param value: New physical timer compare value.
+ */
+void gtimer_set_physical_compare_value(rt_uint64_t value)
+{
+    __set_cntp_cval(value);
+    __asm__ volatile ("isb 0xF":::"memory");
+}
+
+/** Get the physical compare value.
+ *  return Physical compare value.
+ */
+rt_uint64_t gtimer_get_physical_compare_value(void)
+{
+    return(__get_cntp_cval());
+}
+
+/** Configure the timer by setting the control value.
+ *  param value: New timer control value.
+ */
+void gtimer_set_control(rt_uint32_t value)
+{
+    __set_cntp_ctl(value);
+    __asm__ volatile ("isb 0xF":::"memory");
+}
+
+/** Get the control value.
+ *  return Control value.
+ */
+rt_uint32_t gtimer_get_control(void)
+{
+    return(__get_cntp_ctl());
+}
+

bsp/ft2004/drivers/gtimer.h

+/*
+ * Copyright (c) 2006-2021, RT-Thread Development Team
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Change Logs:
+ * Date           Author       Notes
+ * 2021-03-30     huijie.feng  first version
+ */
+
+#ifndef __GTIMER_H__
+#define __GTIMER_H__
+
+#include <rtdef.h>
+
+void gtimer_set_counter_frequency(rt_uint32_t value);
+rt_uint32_t gtimer_get_counter_frequency(void);
+void gtimer_set_load_value(rt_uint32_t value);
+rt_uint32_t gtimer_get_current_value(void);
+rt_uint64_t gtimer_get_current_physical_value(void);
+void gtimer_set_physical_compare_value(rt_uint64_t value);
+rt_uint64_t gtimer_get_physical_compare_value(void);
+void gtimer_set_control(rt_uint32_t value);
+rt_uint32_t gtimer_get_control(void);
+
+#endif
+

bsp/ft2004/drivers/secondary_cpu.c

@@ -4,7 +4,7 @@
  * SPDX-License-Identifier: Apache-2.0.
  *
  * @Date: 2021-05-26 10:09:45
- * @LastEditTime: 2021-05-26 10:31:44
+ * @LastEditTime: 2021-08-16 16:32:08
  * @Description:  This files is for
  *
  * @Modify History:

bsp/ft2004/rtconfig.h

@@ -18,6 +18,7 @@
 #define RT_USING_IDLE_HOOK
 #define RT_IDLE_HOOK_LIST_SIZE 4
 #define IDLE_THREAD_STACK_SIZE 4096
+#define SYSTEM_THREAD_STACK_SIZE 4096
 #define RT_USING_TIMER_SOFT
 #define RT_TIMER_THREAD_PRIO 4
 #define RT_TIMER_THREAD_STACK_SIZE 512
@@ -107,6 +108,7 @@
 #define RT_USING_DEVICE_IPC
 #define RT_PIPE_BUFSZ 512
 #define RT_USING_SERIAL
+#define RT_USING_SERIAL_V1
 #define RT_SERIAL_USING_DMA
 #define RT_SERIAL_RB_BUFSZ 256
 #define RT_USING_CAN
@@ -131,7 +133,7 @@
 
 #define RT_USING_LIBC
 #define RT_USING_POSIX
-#define RT_LIBC_FIXED_TIMEZONE 8
+#define RT_LIBC_DEFAULT_TIMEZONE 8
 
 /* Network */
 

bsp/ft2004/rtconfig.py

@@ -36,7 +36,7 @@ if PLATFORM == 'gcc':
 
     
     DEVICE = ' -march=armv8-a  -mfpu=vfpv4-d16 -ftree-vectorize -ffast-math -mfloat-abi=soft --specs=nano.specs --specs=nosys.specs -fno-builtin '
-    # DEVICE = ' -march=armv7-a  -mfpu=vfpv3-d16 -ftree-vectorize -ffast-math -mfloat-abi=hard'
+
     CFLAGS = DEVICE + ' -Wall'
     AFLAGS = ' -c'+ DEVICE + ' -fsingle-precision-constant  -fno-builtin -x assembler-with-cpp -D__ASSEMBLY__'    
     LINK_SCRIPT = 'ft_aarch32.lds'