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体验新版 GitCode,发现更多精彩内容 >>
提交
0fe8fccf
编写于
2月 06, 2021
作者:
Thomas_Fly
浏览文件
操作
浏览文件
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电子邮件补丁
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first version
上级
7fc236dd
变更
25
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Showing
25 changed file
with
16418 addition
and
0 deletion
+16418
-0
bsp/maxim/MAX32660_EVSYS/.config
bsp/maxim/MAX32660_EVSYS/.config
+498
-0
bsp/maxim/MAX32660_EVSYS/Kconfig
bsp/maxim/MAX32660_EVSYS/Kconfig
+21
-0
bsp/maxim/MAX32660_EVSYS/README.md
bsp/maxim/MAX32660_EVSYS/README.md
+77
-0
bsp/maxim/MAX32660_EVSYS/SConscript
bsp/maxim/MAX32660_EVSYS/SConscript
+15
-0
bsp/maxim/MAX32660_EVSYS/SConstruct
bsp/maxim/MAX32660_EVSYS/SConstruct
+57
-0
bsp/maxim/MAX32660_EVSYS/applications/SConscript
bsp/maxim/MAX32660_EVSYS/applications/SConscript
+11
-0
bsp/maxim/MAX32660_EVSYS/applications/application.c
bsp/maxim/MAX32660_EVSYS/applications/application.c
+32
-0
bsp/maxim/MAX32660_EVSYS/board/Kconfig
bsp/maxim/MAX32660_EVSYS/board/Kconfig
+503
-0
bsp/maxim/MAX32660_EVSYS/board/SConscript
bsp/maxim/MAX32660_EVSYS/board/SConscript
+11
-0
bsp/maxim/MAX32660_EVSYS/board/app_config.h
bsp/maxim/MAX32660_EVSYS/board/app_config.h
+4
-0
bsp/maxim/MAX32660_EVSYS/board/board.c
bsp/maxim/MAX32660_EVSYS/board/board.c
+93
-0
bsp/maxim/MAX32660_EVSYS/board/board.h
bsp/maxim/MAX32660_EVSYS/board/board.h
+30
-0
bsp/maxim/MAX32660_EVSYS/board/fal_cfg.h
bsp/maxim/MAX32660_EVSYS/board/fal_cfg.h
+82
-0
bsp/maxim/MAX32660_EVSYS/board/linker_scripts/link.lds
bsp/maxim/MAX32660_EVSYS/board/linker_scripts/link.lds
+16
-0
bsp/maxim/MAX32660_EVSYS/board/linker_scripts/link.sct
bsp/maxim/MAX32660_EVSYS/board/linker_scripts/link.sct
+15
-0
bsp/maxim/MAX32660_EVSYS/board/nrfx_config.h
bsp/maxim/MAX32660_EVSYS/board/nrfx_config.h
+47
-0
bsp/maxim/MAX32660_EVSYS/board/nrfx_glue.h
bsp/maxim/MAX32660_EVSYS/board/nrfx_glue.h
+269
-0
bsp/maxim/MAX32660_EVSYS/board/nrfx_log.h
bsp/maxim/MAX32660_EVSYS/board/nrfx_log.h
+135
-0
bsp/maxim/MAX32660_EVSYS/board/sdk_config.h
bsp/maxim/MAX32660_EVSYS/board/sdk_config.h
+11704
-0
bsp/maxim/MAX32660_EVSYS/project.uvoptx
bsp/maxim/MAX32660_EVSYS/project.uvoptx
+1148
-0
bsp/maxim/MAX32660_EVSYS/project.uvprojx
bsp/maxim/MAX32660_EVSYS/project.uvprojx
+807
-0
bsp/maxim/MAX32660_EVSYS/rtconfig.h
bsp/maxim/MAX32660_EVSYS/rtconfig.h
+185
-0
bsp/maxim/MAX32660_EVSYS/rtconfig.py
bsp/maxim/MAX32660_EVSYS/rtconfig.py
+84
-0
bsp/maxim/MAX32660_EVSYS/template.uvoptx
bsp/maxim/MAX32660_EVSYS/template.uvoptx
+184
-0
bsp/maxim/MAX32660_EVSYS/template.uvprojx
bsp/maxim/MAX32660_EVSYS/template.uvprojx
+390
-0
未找到文件。
bsp/maxim/MAX32660_EVSYS/.config
0 → 100644
浏览文件 @
0fe8fccf
#
# Automatically generated file; DO NOT EDIT.
# RT-Thread Configuration
#
#
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX
=
8
# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
# CONFIG_RT_USING_SMP is not set
CONFIG_RT_ALIGN_SIZE
=
4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32
=
y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX
=
32
CONFIG_RT_TICK_PER_SECOND
=
100
CONFIG_RT_USING_OVERFLOW_CHECK
=
y
CONFIG_RT_USING_HOOK
=
y
CONFIG_RT_USING_IDLE_HOOK
=
y
CONFIG_RT_IDLE_HOOK_LIST_SIZE
=
4
CONFIG_IDLE_THREAD_STACK_SIZE
=
256
CONFIG_RT_USING_TIMER_SOFT
=
y
CONFIG_RT_TIMER_THREAD_PRIO
=
4
CONFIG_RT_TIMER_THREAD_STACK_SIZE
=
512
CONFIG_RT_DEBUG
=
y
# CONFIG_RT_DEBUG_COLOR is not set
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
#
# Inter-Thread communication
#
CONFIG_RT_USING_SEMAPHORE
=
y
CONFIG_RT_USING_MUTEX
=
y
CONFIG_RT_USING_EVENT
=
y
CONFIG_RT_USING_MAILBOX
=
y
CONFIG_RT_USING_MESSAGEQUEUE
=
y
# CONFIG_RT_USING_SIGNALS is not set
#
# Memory Management
#
CONFIG_RT_USING_MEMPOOL
=
y
# CONFIG_RT_USING_MEMHEAP is not set
# CONFIG_RT_USING_NOHEAP is not set
CONFIG_RT_USING_SMALL_MEM
=
y
# CONFIG_RT_USING_SLAB is not set
# CONFIG_RT_USING_MEMTRACE is not set
CONFIG_RT_USING_HEAP
=
y
#
# Kernel Device Object
#
CONFIG_RT_USING_DEVICE
=
y
# CONFIG_RT_USING_DEVICE_OPS is not set
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE
=
y
CONFIG_RT_CONSOLEBUF_SIZE
=
128
CONFIG_RT_CONSOLE_DEVICE_NAME
=
"uart0"
CONFIG_RT_VER_NUM
=
0
x40003
# CONFIG_RT_USING_CPU_FFS is not set
# CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
#
# RT-Thread Components
#
CONFIG_RT_USING_COMPONENTS_INIT
=
y
CONFIG_RT_USING_USER_MAIN
=
y
CONFIG_RT_MAIN_THREAD_STACK_SIZE
=
2048
CONFIG_RT_MAIN_THREAD_PRIORITY
=
10
#
# C++ features
#
# CONFIG_RT_USING_CPLUSPLUS is not set
#
# Command shell
#
CONFIG_RT_USING_FINSH
=
y
CONFIG_FINSH_THREAD_NAME
=
"tshell"
CONFIG_FINSH_USING_HISTORY
=
y
CONFIG_FINSH_HISTORY_LINES
=
5
CONFIG_FINSH_USING_SYMTAB
=
y
CONFIG_FINSH_USING_DESCRIPTION
=
y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
CONFIG_FINSH_THREAD_PRIORITY
=
20
CONFIG_FINSH_THREAD_STACK_SIZE
=
4096
CONFIG_FINSH_CMD_SIZE
=
80
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_USING_MSH
=
y
CONFIG_FINSH_USING_MSH_DEFAULT
=
y
CONFIG_FINSH_USING_MSH_ONLY
=
y
CONFIG_FINSH_ARG_MAX
=
10
#
# Device virtual file system
#
# CONFIG_RT_USING_DFS is not set
#
# Device Drivers
#
CONFIG_RT_USING_DEVICE_IPC
=
y
CONFIG_RT_PIPE_BUFSZ
=
512
# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
CONFIG_RT_USING_SERIAL
=
y
# CONFIG_RT_SERIAL_USING_DMA is not set
CONFIG_RT_SERIAL_RB_BUFSZ
=
64
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
# CONFIG_RT_USING_I2C is not set
# CONFIG_RT_USING_PHY is not set
CONFIG_RT_USING_PIN
=
y
# CONFIG_RT_USING_ADC is not set
# CONFIG_RT_USING_DAC is not set
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
# CONFIG_RT_USING_PM is not set
# CONFIG_RT_USING_RTC is not set
# CONFIG_RT_USING_SDIO is not set
# CONFIG_RT_USING_SPI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_AUDIO is not set
# CONFIG_RT_USING_SENSOR is not set
# CONFIG_RT_USING_TOUCH is not set
# CONFIG_RT_USING_HWCRYPTO is not set
# CONFIG_RT_USING_PULSE_ENCODER is not set
# CONFIG_RT_USING_INPUT_CAPTURE is not set
# CONFIG_RT_USING_WIFI is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
#
# POSIX layer and C standard library
#
CONFIG_RT_USING_LIBC
=
y
# CONFIG_RT_USING_PTHREADS is not set
# CONFIG_RT_USING_MODULE is not set
#
# Network
#
#
# Socket abstraction layer
#
# CONFIG_RT_USING_SAL is not set
#
# Network interface device
#
# CONFIG_RT_USING_NETDEV is not set
#
# light weight TCP/IP stack
#
# CONFIG_RT_USING_LWIP is not set
#
# AT commands
#
# CONFIG_RT_USING_AT is not set
#
# VBUS(Virtual Software BUS)
#
# CONFIG_RT_USING_VBUS is not set
#
# Utilities
#
# CONFIG_RT_USING_RYM is not set
# CONFIG_RT_USING_ULOG is not set
# CONFIG_RT_USING_UTEST is not set
#
# RT-Thread online packages
#
#
# IoT - internet of things
#
# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_UMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_WEBNET is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_MYMQTT is not set
# CONFIG_PKG_USING_KAWAII_MQTT is not set
# CONFIG_PKG_USING_BC28_MQTT is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LIBMODBUS is not set
# CONFIG_PKG_USING_FREEMODBUS is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
#
# Wi-Fi
#
#
# Marvell WiFi
#
# CONFIG_PKG_USING_WLANMARVELL is not set
#
# Wiced WiFi
#
# CONFIG_PKG_USING_WLAN_WICED is not set
# CONFIG_PKG_USING_RW007 is not set
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_CMUX is not set
# CONFIG_PKG_USING_PPP_DEVICE is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
# CONFIG_PKG_USING_ATSRV_SOCKET is not set
# CONFIG_PKG_USING_WIZNET is not set
#
# IoT Cloud
#
# CONFIG_PKG_USING_ONENET is not set
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
# CONFIG_PKG_USING_JIOT-C-SDK is not set
# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
# CONFIG_PKG_USING_JOYLINK is not set
# CONFIG_PKG_USING_NIMBLE is not set
# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
# CONFIG_PKG_USING_IPMSG is not set
# CONFIG_PKG_USING_LSSDP is not set
# CONFIG_PKG_USING_AIRKISS_OPEN is not set
# CONFIG_PKG_USING_LIBRWS is not set
# CONFIG_PKG_USING_TCPSERVER is not set
# CONFIG_PKG_USING_PROTOBUF_C is not set
# CONFIG_PKG_USING_ONNX_PARSER is not set
# CONFIG_PKG_USING_ONNX_BACKEND is not set
# CONFIG_PKG_USING_DLT645 is not set
# CONFIG_PKG_USING_QXWZ is not set
# CONFIG_PKG_USING_SMTP_CLIENT is not set
# CONFIG_PKG_USING_ABUP_FOTA is not set
# CONFIG_PKG_USING_LIBCURL2RTT is not set
# CONFIG_PKG_USING_CAPNP is not set
# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
# CONFIG_PKG_USING_AGILE_TELNET is not set
# CONFIG_PKG_USING_NMEALIB is not set
# CONFIG_PKG_USING_AGILE_JSMN is not set
# CONFIG_PKG_USING_PDULIB is not set
# CONFIG_PKG_USING_BTSTACK is not set
# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
#
# security packages
#
# CONFIG_PKG_USING_MBEDTLS is not set
# CONFIG_PKG_USING_libsodium is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
# CONFIG_PKG_USING_TFM is not set
# CONFIG_PKG_USING_YD_CRYPTO is not set
#
# language packages
#
# CONFIG_PKG_USING_LUA is not set
# CONFIG_PKG_USING_JERRYSCRIPT is not set
# CONFIG_PKG_USING_MICROPYTHON is not set
#
# multimedia packages
#
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
# CONFIG_PKG_USING_STEMWIN is not set
# CONFIG_PKG_USING_WAVPLAYER is not set
# CONFIG_PKG_USING_TJPGD is not set
# CONFIG_PKG_USING_HELIX is not set
#
# tools packages
#
# CONFIG_PKG_USING_CMBACKTRACE is not set
# CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
# CONFIG_PKG_USING_RDB is not set
# CONFIG_PKG_USING_QRCODE is not set
# CONFIG_PKG_USING_ULOG_EASYFLASH is not set
# CONFIG_PKG_USING_ADBD is not set
# CONFIG_PKG_USING_COREMARK is not set
# CONFIG_PKG_USING_DHRYSTONE is not set
# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
# CONFIG_PKG_USING_BS8116A is not set
# CONFIG_PKG_USING_GPS_RMC is not set
# CONFIG_PKG_USING_URLENCODE is not set
# CONFIG_PKG_USING_UMCN is not set
#
# system packages
#
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_FLASHDB is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
# CONFIG_PKG_USING_CMSIS is not set
# CONFIG_PKG_USING_DFS_YAFFS is not set
# CONFIG_PKG_USING_LITTLEFS is not set
# CONFIG_PKG_USING_THREAD_POOL is not set
# CONFIG_PKG_USING_ROBOTS is not set
# CONFIG_PKG_USING_EV is not set
# CONFIG_PKG_USING_SYSWATCH is not set
# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
# CONFIG_PKG_USING_PLCCORE is not set
# CONFIG_PKG_USING_RAMDISK is not set
# CONFIG_PKG_USING_MININI is not set
# CONFIG_PKG_USING_QBOOT is not set
# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
# CONFIG_PKG_USING_UC_CRC is not set
# CONFIG_PKG_USING_UC_CLK is not set
# CONFIG_PKG_USING_UC_COMMON is not set
# CONFIG_PKG_USING_PPOOL is not set
#
# peripheral libraries and drivers
#
# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_SHT3X is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
# CONFIG_PKG_USING_ICM20608 is not set
# CONFIG_PKG_USING_U8G2 is not set
# CONFIG_PKG_USING_BUTTON is not set
# CONFIG_PKG_USING_PCF8574 is not set
# CONFIG_PKG_USING_SX12XX is not set
# CONFIG_PKG_USING_SIGNAL_LED is not set
# CONFIG_PKG_USING_LEDBLINK is not set
# CONFIG_PKG_USING_LITTLED is not set
# CONFIG_PKG_USING_LKDGUI is not set
# CONFIG_PKG_USING_NRF5X_SDK is not set
CONFIG_PKG_USING_NRFX
=
y
CONFIG_PKG_NRFX_PATH
=
"/packages/peripherals/nrfx"
CONFIG_PKG_USING_NRFX_V210
=
y
# CONFIG_PKG_USING_NRFX_LATEST_VERSION is not set
CONFIG_PKG_NRFX_VER
=
"v2.1.0"
# CONFIG_PKG_USING_WM_LIBRARIES is not set
# CONFIG_PKG_USING_KENDRYTE_SDK is not set
# CONFIG_PKG_USING_INFRARED is not set
# CONFIG_PKG_USING_ROSSERIAL is not set
# CONFIG_PKG_USING_AGILE_BUTTON is not set
# CONFIG_PKG_USING_AGILE_LED is not set
# CONFIG_PKG_USING_AT24CXX is not set
# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
# CONFIG_PKG_USING_AD7746 is not set
# CONFIG_PKG_USING_PCA9685 is not set
# CONFIG_PKG_USING_I2C_TOOLS is not set
# CONFIG_PKG_USING_NRF24L01 is not set
# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
# CONFIG_PKG_USING_MAX17048 is not set
# CONFIG_PKG_USING_RPLIDAR is not set
# CONFIG_PKG_USING_AS608 is not set
# CONFIG_PKG_USING_RC522 is not set
# CONFIG_PKG_USING_WS2812B is not set
# CONFIG_PKG_USING_EMBARC_BSP is not set
# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
# CONFIG_PKG_USING_MULTI_RTIMER is not set
# CONFIG_PKG_USING_MAX7219 is not set
# CONFIG_PKG_USING_BEEP is not set
# CONFIG_PKG_USING_EASYBLINK is not set
# CONFIG_PKG_USING_PMS_SERIES is not set
# CONFIG_PKG_USING_CAN_YMODEM is not set
# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
# CONFIG_PKG_USING_QLED is not set
# CONFIG_PKG_USING_PAJ7620 is not set
# CONFIG_PKG_USING_AGILE_CONSOLE is not set
# CONFIG_PKG_USING_LD3320 is not set
# CONFIG_PKG_USING_WK2124 is not set
# CONFIG_PKG_USING_LY68L6400 is not set
# CONFIG_PKG_USING_DM9051 is not set
#
# miscellaneous packages
#
# CONFIG_PKG_USING_LIBCSV is not set
# CONFIG_PKG_USING_OPTPARSE is not set
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_DSTR is not set
# CONFIG_PKG_USING_TINYFRAME is not set
# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
# CONFIG_PKG_USING_DIGITALCTRL is not set
# CONFIG_PKG_USING_UPACKER is not set
# CONFIG_PKG_USING_UPARAM is not set
#
# samples: kernel and components samples
#
# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
# CONFIG_PKG_USING_HELLO is not set
# CONFIG_PKG_USING_VI is not set
# CONFIG_PKG_USING_NNOM is not set
# CONFIG_PKG_USING_LIBANN is not set
# CONFIG_PKG_USING_ELAPACK is not set
# CONFIG_PKG_USING_ARMv7M_DWT is not set
# CONFIG_PKG_USING_VT100 is not set
# CONFIG_PKG_USING_TETRIS is not set
# CONFIG_PKG_USING_ULAPACK is not set
# CONFIG_PKG_USING_UKAL is not set
# CONFIG_PKG_USING_CRCLIB is not set
# CONFIG_PKG_USING_THREES is not set
# CONFIG_PKG_USING_2048 is not set
# CONFIG_PKG_USING_LWGPS is not set
# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
#
# Hardware Drivers Config
#
CONFIG_SOC_NRF52840
=
y
CONFIG_NRFX_CLOCK_ENABLED
=
1
CONFIG_NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY
=
7
CONFIG_NRFX_CLOCK_CONFIG_LF_SRC
=
1
CONFIG_SOC_NORDIC
=
y
#
# Onboard Peripheral Drivers
#
CONFIG_BSP_USING_JLINK_TO_USART
=
y
# CONFIG_BSP_USING_QSPI_FLASH is not set
#
# On-chip Peripheral Drivers
#
CONFIG_BSP_USING_GPIO
=
y
CONFIG_NRFX_GPIOTE_ENABLED
=
1
# CONFIG_BSP_USING_SAADC is not set
# CONFIG_BSP_USING_PWM is not set
CONFIG_BSP_USING_UART
=
y
CONFIG_NRFX_USING_UART
=
y
# CONFIG_NRFX_USING_UARTE is not set
CONFIG_NRFX_UART_ENABLED
=
1
CONFIG_BSP_USING_UART0
=
y
CONFIG_NRFX_UART0_ENABLED
=
1
CONFIG_BSP_UART0_RX_PIN
=
8
CONFIG_BSP_UART0_TX_PIN
=
6
# CONFIG_BSP_USING_SPI is not set
# CONFIG_BSP_USING_ON_CHIP_FLASH is not set
#
# On-chip flash config
#
CONFIG_MCU_FLASH_START_ADDRESS
=
0
x00000000
CONFIG_MCU_FLASH_SIZE_KB
=
1024
CONFIG_MCU_SRAM_START_ADDRESS
=
0
x20000000
CONFIG_MCU_SRAM_SIZE_KB
=
256
CONFIG_MCU_FLASH_PAGE_SIZE
=
0
x1000
# CONFIG_BSP_USING_WDT is not set
# CONFIG_BSP_USING_ONCHIP_RTC is not set
CONFIG_BLE_STACK_USING_NULL
=
y
# CONFIG_BSP_USING_SOFTDEVICE is not set
# CONFIG_BSP_USING_NIMBLE is not set
bsp/maxim/MAX32660_EVSYS/Kconfig
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mainmenu "RT-Thread Configuration"
config BSP_DIR
string
option env="BSP_ROOT"
default "."
config RTT_DIR
string
option env="RTT_ROOT"
default "../../.."
config PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
source "board/Kconfig"
bsp/maxim/MAX32660_EVSYS/README.md
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# nRF52840-PCA10056 BSP说明
## 简介
该文件夹主要存放所有主芯片为nRF52840的板级支持包。目前默认支持的开发板是官方
[
PCA10056
](
https://www.nordicsemi.com/Software-and-tools/Development-Kits/nRF52840-DK
)
本文主要内容如下:
-
开发板资源介绍
-
进阶使用方法
## 开发板介绍
PCA10056-nRF52840是Nordic 官方的开发板,搭载nRF52840 芯片,基于ARM Cortex-M4内核,最高主频64 MHz,具有丰富的外设资源。
开发板外观如下图所示
![
image-20201017202046725
](
../docs/images/nrf52840.png
)
PCA10056-nrf52840 开发板常用
**板载资源**
如下:
-
MCU:NRF52840,主频 64MHz,1MB FLASH ,256kB RAM
-
MCU 外设: GPIO, UART, SPI, I2C(TWI), RTC,TIMER,NFC,QSPI,PWM,ADC,USB,I2S
-
板载设
-
LED:4个,USB communication (LD1), user LED (LD2), power LED (LD3) 。
-
按键:5个,4个USER and 1个RESET 。
-
USB: 1个
-
常用接口:USB device、Arduino Uno 接口
-
调试接口:板载 J-LINK 调试器。
开发板更多详细信息请参考NORDIC官方
[
PCA10056
](
https://www.nordicsemi.com/Software-and-tools/Development-Kits/nRF52840-DK
)
## 外设支持
本 BSP 目前对外设的支持情况如下:
|
**片上外设**
|
**支持情况**
|
**备注**
|
| :----------- | :----------: | :--------------------: |
| GPIO | 支持 | GPION |
| UART | 支持 | UART0 |
| PWM | 支持 | 支持 |
| SPI | 支持 | 支持 |
| QSPI | 支持 | 支持开发板上QSPI FLASH |
| RTC | 支持 | |
| ADC | 支持 | |
| | | |
| | | |
| | | |
### 进阶使用
此 BSP 默认只开启了 GPIO 和 串口 0 的功能,更多高级功能需要利用 env 工具对 BSP 进行配置,步骤如下:
1.
在 bsp 下打开 env 工具。
2.
输入
`menuconfig`
命令配置工程,配置好之后保存退出。
3.
输入
`pkgs --update`
命令更新软件包。
4.
输入
`scons --target=mdk4/mdk5/iar`
命令重新生成工程。
## 支持其他开发板
客户可以将自己的开发板的.config文件和board/Kconfig文件到board/$(board_name)下面添加README.md即可,使用的时候替换.config文件
## 注意事项
## 联系人信息
维护人:
-
[supperthomas], 邮箱:
<78900636@qq.com>
\ No newline at end of file
bsp/maxim/MAX32660_EVSYS/SConscript
0 → 100644
浏览文件 @
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# for module compiling
import
os
Import
(
'RTT_ROOT'
)
from
building
import
*
cwd
=
GetCurrentDir
()
objs
=
[]
list
=
os
.
listdir
(
cwd
)
for
d
in
list
:
path
=
os
.
path
.
join
(
cwd
,
d
)
if
os
.
path
.
isfile
(
os
.
path
.
join
(
path
,
'SConscript'
)):
objs
=
objs
+
SConscript
(
os
.
path
.
join
(
d
,
'SConscript'
))
Return
(
'objs'
)
bsp/maxim/MAX32660_EVSYS/SConstruct
0 → 100644
浏览文件 @
0fe8fccf
import
os
import
sys
import
rtconfig
if
os
.
getenv
(
'RTT_ROOT'
):
RTT_ROOT
=
os
.
getenv
(
'RTT_ROOT'
)
else
:
RTT_ROOT
=
os
.
path
.
normpath
(
os
.
getcwd
()
+
'/../../..'
)
sys
.
path
=
sys
.
path
+
[
os
.
path
.
join
(
RTT_ROOT
,
'tools'
)]
try
:
from
building
import
*
except
:
print
(
'Cannot found RT-Thread root directory, please check RTT_ROOT'
)
print
(
RTT_ROOT
)
exit
(
-
1
)
TARGET
=
'rt-thread.'
+
rtconfig
.
TARGET_EXT
DefaultEnvironment
(
tools
=
[])
env
=
Environment
(
tools
=
[
'mingw'
],
AS
=
rtconfig
.
AS
,
ASFLAGS
=
rtconfig
.
AFLAGS
,
CC
=
rtconfig
.
CC
,
CCFLAGS
=
rtconfig
.
CFLAGS
,
AR
=
rtconfig
.
AR
,
ARFLAGS
=
'-rc'
,
LINK
=
rtconfig
.
LINK
,
LINKFLAGS
=
rtconfig
.
LFLAGS
)
env
.
PrependENVPath
(
'PATH'
,
rtconfig
.
EXEC_PATH
)
if
rtconfig
.
PLATFORM
==
'iar'
:
env
.
Replace
(
CCCOM
=
[
'$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'
])
env
.
Replace
(
ARFLAGS
=
[
''
])
env
.
Replace
(
LINKCOM
=
env
[
"LINKCOM"
]
+
' --map rt-thread.map'
)
Export
(
'RTT_ROOT'
)
Export
(
'rtconfig'
)
SDK_ROOT
=
os
.
path
.
abspath
(
'./'
)
if
os
.
path
.
exists
(
SDK_ROOT
+
'/libraries'
):
libraries_path_prefix
=
SDK_ROOT
+
'/libraries'
else
:
libraries_path_prefix
=
os
.
path
.
dirname
(
SDK_ROOT
)
+
'/libraries'
SDK_LIB
=
libraries_path_prefix
Export
(
'SDK_LIB'
)
print
(
SDK_LIB
)
# prepare building environment
objs
=
PrepareBuilding
(
env
,
RTT_ROOT
,
has_libcpu
=
False
)
# include drivers
objs
.
extend
(
SConscript
(
os
.
path
.
join
(
libraries_path_prefix
,
'drivers'
,
'SConscript'
)))
# include cmsis
objs
.
extend
(
SConscript
(
os
.
path
.
join
(
libraries_path_prefix
,
'cmsis'
,
'SConscript'
)))
# make a building
DoBuilding
(
TARGET
,
objs
)
bsp/maxim/MAX32660_EVSYS/applications/SConscript
0 → 100644
浏览文件 @
0fe8fccf
Import
(
'RTT_ROOT'
)
Import
(
'rtconfig'
)
from
building
import
*
cwd
=
os
.
path
.
join
(
str
(
Dir
(
'#'
)),
'applications'
)
src
=
Glob
(
'*.c'
)
CPPPATH
=
[
cwd
,
str
(
Dir
(
'#'
))]
group
=
DefineGroup
(
'Applications'
,
src
,
depend
=
[
''
],
CPPPATH
=
CPPPATH
)
Return
(
'group'
)
bsp/maxim/MAX32660_EVSYS/applications/application.c
0 → 100644
浏览文件 @
0fe8fccf
/*
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-04-29 supperthomas first version
*
*/
#include <rtthread.h>
#include <rtdevice.h>
#define DK_BOARD_LED_1 13
#define DK_BOARD_LED_2 14
int
main
(
void
)
{
int
count
=
1
;
rt_pin_mode
(
DK_BOARD_LED_1
,
PIN_MODE_OUTPUT
);
while
(
count
++
)
{
rt_pin_write
(
DK_BOARD_LED_1
,
PIN_HIGH
);
rt_thread_mdelay
(
500
);
rt_pin_write
(
DK_BOARD_LED_1
,
PIN_LOW
);
rt_thread_mdelay
(
500
);
}
return
RT_EOK
;
}
bsp/maxim/MAX32660_EVSYS/board/Kconfig
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menu "Hardware Drivers Config"
config SOC_NRF52840
bool
config SOC_NRF52840
select RT_USING_COMPONENTS_INIT
select RT_USING_USER_MAIN
default y
config NRFX_CLOCK_ENABLED
int
default 1
config NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY
int
default 7
config NRFX_CLOCK_CONFIG_LF_SRC
int
default 1
config SOC_NORDIC
bool
config SOC_NORDIC
default y
menu "Onboard Peripheral Drivers"
config BSP_USING_JLINK_TO_USART
bool "Enable JLINK TO USART (uart0|RX_PIN:8|TX_PIN:6)"
select BSP_USING_UART
select BSP_USING_UART0
default y
menuconfig BSP_USING_QSPI_FLASH
select PKG_USING_FAL
bool "Enable QSPI FLASH(MX25R64 8MB)"
default n
if BSP_USING_QSPI_FLASH
config NRFX_QSPI_ENABLED
int
default 1
config BSP_QSPI_SCK_PIN
int "QSPI SCK pin number"
range 0 31
default 19
config BSP_QSPI_CSN_PIN
int "QSPI CSN pin number"
range 0 31
default 17
config BSP_QSPI_IO0_PIN
int "QSPI IO0 pin number"
range 0 31
default 20
config BSP_QSPI_IO1_PIN
int "QSPI IO1 pin number"
range 0 31
default 21
config BSP_QSPI_IO2_PIN
int "QSPI IO2 pin number"
range 0 31
default 22
config BSP_QSPI_IO3_PIN
int "QSPI IO3 pin number"
range 0 31
default 23
config QSPI_FLASH_SIZE_KB
int "QSPI FLASH SIZE, DEFAULT size 8192 KB"
default 8192
endif
endmenu
menu "On-chip Peripheral Drivers"
config BSP_USING_GPIO
bool "Enable GPIO"
select RT_USING_PIN
default y
if BSP_USING_GPIO
config NRFX_GPIOTE_ENABLED
int
default 1
endif
config BSP_USING_SAADC
bool "Enable SAADC"
select RT_USING_ADC
default n
if BSP_USING_SAADC
config NRFX_SAADC_ENABLED
int
default 1
endif
menuconfig BSP_USING_PWM
bool "Enable PWM"
select RT_USING_PWM
default n
if BSP_USING_PWM
config NRFX_PWM_ENABLED
int
default 1
config BSP_USING_PWM0
bool "Enable PWM0 bus"
default y
if BSP_USING_PWM0
config NRFX_PWM0_ENABLED
int
default 1
config BSP_USING_PWM0_CH0
int "PWM0 channel 0 pin number set"
range 0 47
default 13
config BSP_USING_PWM0_CH1
int "PWM0 channel 1 pin number set"
range 0 47
default 14
config BSP_USING_PWM0_CH2
int "PWM0 channel 2 pin number set"
range 0 47
default 15
config BSP_USING_PWM0_CH3
int "PWM0 channel 3 pin number set"
range 0 47
default 16
endif
config BSP_USING_PWM1
bool "Enable PWM1 bus"
default n
if BSP_USING_PWM1
config NRFX_PWM1_ENABLED
int
default 1
config BSP_USING_PWM1_CH0
int "PWM1 channel 0 pin number set"
range 0 47
default 13
config BSP_USING_PWM1_CH1
int "PWM1 channel 1 pin number set"
range 0 47
default 14
config BSP_USING_PWM1_CH2
int "PWM1 channel 2 pin number set"
range 0 47
default 15
config BSP_USING_PWM1_CH3
int "PWM1 channel 3 pin number set"
range 0 47
default 16
endif
config BSP_USING_PWM2
bool "Enable PWM2 bus"
default n
if BSP_USING_PWM2
config NRFX_PWM2_ENABLED
int
default 1
config BSP_USING_PWM2_CH0
int "PWM2 channel 0 pin number set"
range 0 47
default 13
config BSP_USING_PWM2_CH1
int "PWM2 channel 1 pin number set"
range 0 47
default 14
config BSP_USING_PWM2_CH2
int "PWM2 channel 2 pin number set"
range 0 47
default 15
config BSP_USING_PWM2_CH3
int "PWM2 channel 3 pin number set"
range 0 47
default 16
endif
config BSP_USING_PWM3
bool "Enable PWM3 bus"
default n
if BSP_USING_PWM3
config NRFX_PWM3_ENABLED
int
default 1
config BSP_USING_PWM3_CH0
int "PWM3 channel 0 pin number set"
range 0 47
default 13
config BSP_USING_PWM3_CH1
int "PWM3 channel 1 pin number set"
range 0 47
default 14
config BSP_USING_PWM3_CH2
int "PWM3 channel 2 pin number set"
range 0 47
default 15
config BSP_USING_PWM3_CH3
int "PWM3 channel 3 pin number set"
range 0 47
default 16
endif
endif
config BSP_USING_UART
bool "Enable UART"
default y
select RT_USING_SERIAL
if BSP_USING_UART
choice
prompt "UART or UARTE"
default NRFX_USING_UART
help
Select the UART or UARTE
config NRFX_USING_UART
bool "UART"
config NRFX_USING_UARTE
bool "UARTE"
endchoice
endif
if BSP_USING_UART&&NRFX_USING_UART
config NRFX_UART_ENABLED
int
default 1
config BSP_USING_UART0
bool "Enable UART0"
default y
if BSP_USING_UART0
config NRFX_UART0_ENABLED
int
default 1
config BSP_UART0_RX_PIN
int "uart0 rx pin number"
range 0 31
default 8
config BSP_UART0_TX_PIN
int "uart0 tx pin number"
range 0 31
default 6
endif
endif
if BSP_USING_UART&&NRFX_USING_UARTE
config NRFX_UARTE_ENABLED
int
default 1
config BSP_USING_UART0
bool "Enable UARTE0"
default n
if BSP_USING_UART0
config NRFX_UARTE0_ENABLED
int
default 1
config BSP_UART0_RX_PIN
int "uarte0 rx pin number"
range 0 31
default 8
config BSP_UART0_TX_PIN
int "uarte0 tx pin number"
range 0 31
default 6
endif
config BSP_USING_UART1
bool "Enable UARTE1"
default n
if BSP_USING_UART1
config NRFX_UARTE1_ENABLED
int
default 1
config BSP_UART1_RX_PIN
int "uarte1 rx pin number"
range 0 31
default 7
config BSP_UART1_TX_PIN
int "uarte1 tx pin number"
range 0 31
default 5
endif
endif
config BSP_USING_I2C
bool "Enable I2C"
select RT_USING_I2C
default n
if BSP_USING_I2C
config NRFX_TWIM_ENABLED
int
default 1
config BSP_USING_I2C0
bool "Enable I2C0 bus"
default n
if BSP_USING_I2C0
config NRFX_TWIM0_ENABLED
int
default 1
config BSP_I2C0_SCL_PIN
int "i2c0 scl pin number"
range 0 31
default 27
config BSP_I2C0_SDA_PIN
int "I2C0 sda pin number"
range 0 31
default 26
endif
config BSP_USING_I2C1
bool "Enable I2C1 bus"
default n
if BSP_USING_I2C1
config NRFX_TWIM1_ENABLED
int
default 1
config BSP_I2C1_SCL_PIN
int "i2c1 scl pin number"
range 0 31
default 3
config BSP_I2C1_SDA_PIN
int "I2C1 sda pin number"
range 0 31
default 2
endif
endif
config BSP_USING_SPI
bool "Enable SPI"
select RT_USING_PIN
default y
if BSP_USING_SPI
config NRFX_SPI_ENABLED
int
default 1
config BSP_USING_SPI0
bool "Enable SPI0 bus"
default y
if BSP_USING_SPI0
config NRFX_SPI0_ENABLED
int "Enable SPI0 instance"
default 1
config BSP_SPI0_SCK_PIN
int "SPI0 sck pin number set"
range 0 47
default 28
config BSP_SPI0_MOSI_PIN
int "SPI0 mosi pin number set"
range 0 47
default 29
config BSP_SPI0_MISO_PIN
int "SPI0 miso pin number set"
range 0 47
default 30
config BSP_SPI0_SS_PIN
int "SPI0 ss pin number set"
range 0 47
default 31
endif
config BSP_USING_SPI1
bool "Enable SPI1 bus"
default n
if BSP_USING_SPI1
config NRFX_SPI1_ENABLED
int "Enable SPI1 instance"
default 1
config BSP_SPI1_SCK_PIN
int "SPI0 sck pin number set"
range 0 47
default 28
config BSP_SPI1_MOSI_PIN
int "SPI0 mosi pin number set"
range 0 47
default 29
config BSP_SPI1_MISO_PIN
int "SPI0 miso pin number set"
range 0 47
default 30
config BSP_SPI1_SS_PIN
int "SPI0 ss pin number set"
range 0 47
default 31
endif
config BSP_USING_SPI2
bool "Enable SPI2 bus"
default n
if BSP_USING_SPI2
config NRFX_SPI2_ENABLED
int "Enable SPI2 instance"
default 1
config BSP_SPI2_SCK_PIN
int "SPI0 sck pin number set"
range 0 47
default 28
config BSP_SPI2_MOSI_PIN
int "SPI0 mosi pin number set"
range 0 47
default 29
config BSP_SPI2_MISO_PIN
int "SPI0 miso pin number set"
range 0 47
default 30
config BSP_SPI2_SS_PIN
int "SPI0 ss pin number set"
range 0 47
default 31
endif
endif
config BSP_USING_ON_CHIP_FLASH
select PKG_USING_FAL
bool "Enable on-chip FLASH"
default n
menu "On-chip flash config"
config MCU_FLASH_START_ADDRESS
hex "MCU FLASH START ADDRESS"
default 0x00000000
config MCU_FLASH_SIZE_KB
int "MCU FLASH SIZE, MAX size 1024 KB"
range 1 1024
default 1024
config MCU_SRAM_START_ADDRESS
hex "MCU RAM START ADDRESS"
default 0x20000000
config MCU_SRAM_SIZE_KB
int "MCU RAM SIZE, MAX size 256 KB"
range 1 256
default 256
config MCU_FLASH_PAGE_SIZE
hex "MCU FLASH PAGE SIZE, please not change,nrfx default is 0x1000"
range 0x1000 0x1000
default 0x1000
endmenu
config BSP_USING_WDT
bool "Enable WDT"
select RT_USING_WDT
default n
if BSP_USING_WDT
config NRFX_WDT_ENABLED
int
default 1
config NRFX_WDT0_ENABLED
int
default 1
config NRFX_WDT_CONFIG_NO_IRQ
int
default 1
endif
menuconfig BSP_USING_ONCHIP_RTC
bool "Enable RTC"
select RT_USING_RTC
select RT_USING_LIBC
default n
if BSP_USING_ONCHIP_RTC
config NRFX_CLOCK_ENABLED
int
default 1
config NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY
int
default 7
config NRFX_RTC_ENABLED
int
default 1
config NRFX_RTC0_ENABLED
int
default 1
config NRFX_RTC1_ENABLED
int
default 1
config NRFX_RTC2_ENABLED
int
default 1
config RTC_INSTANCE_ID
int
default 2
config RTC_INSTANCE_ID
int "select RTC instance id, must be 0, 1, 2"
range 0 2
default 2
endif
endmenu
choice
prompt "BLE STACK"
default BLE_STACK_USING_NULL
help
Select the ble stack
config BLE_STACK_USING_NULL
bool "not use the ble stack"
config BSP_USING_SOFTDEVICE
select PKG_USING_NRF5X_SDK
bool "Nordic softdevice(perpheral)"
config BSP_USING_NIMBLE
select PKG_USING_NIMBLE
select PKG_NIMBLE_BSP_NRF52840
bool "use nimble stack(iot)"
endchoice
endmenu
bsp/maxim/MAX32660_EVSYS/board/SConscript
0 → 100644
浏览文件 @
0fe8fccf
Import
(
'RTT_ROOT'
)
Import
(
'rtconfig'
)
from
building
import
*
cwd
=
GetCurrentDir
()
src
=
Glob
(
'*.c'
)
CPPPATH
=
[
cwd
]
define
=
[
'USE_APP_CONFIG'
]
group
=
DefineGroup
(
'Drivers'
,
src
,
depend
=
[
''
],
CPPPATH
=
CPPPATH
,
CPPDEFINES
=
define
)
Return
(
'group'
)
bsp/maxim/MAX32660_EVSYS/board/app_config.h
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#ifndef APP_CONFIG_H
#define APP_CONFIG_H
#endif //APP_CONFIG_H
bsp/maxim/MAX32660_EVSYS/board/board.c
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/*
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-04-29 supperthomas first version
*
*/
#include <rtthread.h>
#include <rthw.h>
#include <nrfx_systick.h>
#include "board.h"
#include "drv_uart.h"
#include <nrfx_clock.h>
/**
* This is the timer interrupt service routine.
*
*/
void
SysTick_Handler
(
void
)
{
/* enter interrupt */
rt_interrupt_enter
();
rt_tick_increase
();
/* leave interrupt */
rt_interrupt_leave
();
}
static
void
clk_event_handler
(
nrfx_clock_evt_type_t
event
){}
void
SysTick_Configuration
(
void
)
{
nrfx_clock_init
(
clk_event_handler
);
nrfx_clock_enable
();
nrfx_clock_lfclk_start
();
/* Set interrupt priority */
NVIC_SetPriority
(
SysTick_IRQn
,
0xf
);
/* Configure SysTick to interrupt at the requested rate. */
nrf_systick_load_set
(
SystemCoreClock
/
RT_TICK_PER_SECOND
);
nrf_systick_val_clear
();
nrf_systick_csr_set
(
NRF_SYSTICK_CSR_CLKSOURCE_CPU
|
NRF_SYSTICK_CSR_TICKINT_ENABLE
|
NRF_SYSTICK_CSR_ENABLE
);
}
void
rt_hw_board_init
(
void
)
{
rt_hw_interrupt_enable
(
0
);
// sd_power_dcdc_mode_set(NRF_POWER_DCDC_ENABLE);
/* Activate deep sleep mode */
SCB
->
SCR
|=
SCB_SCR_SLEEPDEEP_Msk
;
SysTick_Configuration
();
#if defined(RT_USING_HEAP)
rt_system_heap_init
((
void
*
)
HEAP_BEGIN
,
(
void
*
)
HEAP_END
);
#endif
#ifdef RT_USING_SERIAL
rt_hw_uart_init
();
#endif
#ifdef RT_USING_CONSOLE
rt_console_set_device
(
RT_CONSOLE_DEVICE_NAME
);
#endif
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init
();
#endif
#ifdef BSP_USING_SOFTDEVICE
extern
uint32_t
Image
$$
RW_IRAM1
$$
Base
;
uint32_t
const
*
const
m_ram_start
=
&
Image
$$
RW_IRAM1
$$
Base
;
if
((
uint32_t
)
m_ram_start
==
0x20000000
)
{
rt_kprintf
(
"
\r\n
using softdevice the RAM couldn't be %p,please use the templete from package
\r\n
"
,
m_ram_start
);
while
(
1
);
}
else
{
rt_kprintf
(
"
\r\n
using softdevice the RAM at %p
\r\n
"
,
m_ram_start
);
}
#endif
}
bsp/maxim/MAX32660_EVSYS/board/board.h
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#ifndef _BOARD_H_
#define _BOARD_H_
#include <rtthread.h>
#include <rthw.h>
#include "nrf.h"
#define MCU_FLASH_SIZE MCU_FLASH_SIZE_KB*1024
#define MCU_FLASH_END_ADDRESS ((uint32_t)(MCU_FLASH_START_ADDRESS + MCU_FLASH_SIZE))
#define MCU_SRAM_SIZE MCU_SRAM_SIZE_KB*1024
#define MCU_SRAM_END_ADDRESS (MCU_SRAM_START_ADDRESS + MCU_SRAM_SIZE)
#if defined(__CC_ARM) || defined(__CLANG_ARM)
extern
int
Image
$$
RW_IRAM1
$$
ZI
$$
Limit
;
#define HEAP_BEGIN ((void *)&Image$$RW_IRAM1$$ZI$$Limit)
#elif __ICCARM__
#pragma section="CSTACK"
#define HEAP_BEGIN (__segment_end("CSTACK"))
#else
extern
int
__bss_end__
;
#define HEAP_BEGIN ((void *)&__bss_end__)
#endif
#define HEAP_SIZE 16*1024
#define HEAP_END (HEAP_BEGIN + HEAP_SIZE)
void
rt_hw_board_init
(
void
);
#endif
bsp/maxim/MAX32660_EVSYS/board/fal_cfg.h
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/*
* Copyright (c) 2006-2020, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
* Change Logs:
* Date Author Notes
* 2020-05-05 supperthomas this is sample you can change by yourself
*
*/
#ifndef _FAL_CFG_H_
#define _FAL_CFG_H_
#include <rtconfig.h>
#include <board.h>
#if (defined(BSP_USING_QSPI_FLASH)&&defined(BSP_USING_ON_CHIP_FLASH))
#define ON_CHIP_FLASH_DEV_NAME "mcu_onchip"
#define NOR_FLASH_DEV_NAME "norflash0"
extern
const
struct
fal_flash_dev
mcu_onchip_flash
;
extern
struct
fal_flash_dev
nor_flash0
;
/* flash device table */
#define FAL_FLASH_DEV_TABLE \
{ \
&mcu_onchip_flash, \
&nor_flash0, \
}
/* ====================== Partition Configuration ========================== */
#ifdef FAL_PART_HAS_TABLE_CFG
/* partition table */
#define FAL_PART_TABLE \
{ \
{FAL_PART_MAGIC_WORD, "bl", ON_CHIP_FLASH_DEV_NAME, 0, 64*1024, 0}, \
{FAL_PART_MAGIC_WORD, "app_flash", ON_CHIP_FLASH_DEV_NAME, 64*1024, 960*1024, 0}, \
{FAL_PART_MAGIC_WORD, "nor_flash_part_0", NOR_FLASH_DEV_NAME, 0, 1024*1024, 0}, \
{FAL_PART_MAGIC_WORD, "nor_flash_part_1", NOR_FLASH_DEV_NAME, 1024*1024, 7*1024*1024, 0}, \
}
#endif
/* FAL_PART_HAS_TABLE_CFG */
#elif defined(BSP_USING_QSPI_FLASH)
#define NOR_FLASH_DEV_NAME "norflash0"
extern
struct
fal_flash_dev
nor_flash0
;
/* flash device table */
#define FAL_FLASH_DEV_TABLE \
{ \
&nor_flash0, \
}
/* ====================== Partition Configuration ========================== */
#ifdef FAL_PART_HAS_TABLE_CFG
/* partition table */
#define FAL_PART_TABLE \
{ \
{FAL_PART_MAGIC_WORD, "nor_flash_part_0", NOR_FLASH_DEV_NAME, 0, 1024*1024, 0}, \
{FAL_PART_MAGIC_WORD, "nor_flash_part_1", NOR_FLASH_DEV_NAME, 1024*1024, 7*1024*1024, 0}, \
}
#endif
#elif defined(BSP_USING_ON_CHIP_FLASH)
extern
const
struct
fal_flash_dev
mcu_onchip_flash
;
#define ON_CHIP_FLASH_DEV_NAME "mcu_onchip"
/* flash device table */
#define FAL_FLASH_DEV_TABLE \
{ \
&mcu_onchip_flash, \
}
/* ====================== Partition Configuration ========================== */
#ifdef FAL_PART_HAS_TABLE_CFG
/* partition table */
#define FAL_PART_TABLE \
{ \
{FAL_PART_MAGIC_WORD, "bl", ON_CHIP_FLASH_DEV_NAME, 0, 64*1024, 0}, \
{FAL_PART_MAGIC_WORD, "app_flash", ON_CHIP_FLASH_DEV_NAME, 64*1024, 960*1024, 0}, \
}
#endif
#endif
#endif
/* _FAL_CFG_H_ */
bsp/maxim/MAX32660_EVSYS/board/linker_scripts/link.lds
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/* Linker script to configure memory regions. */
SEARCH_DIR(.)
GROUP(-lgcc -lc -lnosys)
MEMORY
{
FLASH (rx) : ORIGIN = 0x0, LENGTH = 0x100000
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x40000
CODE_RAM (rwx) : ORIGIN = 0x800000, LENGTH = 0x10000
}
INCLUDE "packages/nrfx-v2.1.0/mdk/nrf_common.ld"
bsp/maxim/MAX32660_EVSYS/board/linker_scripts/link.sct
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; *************************************************************
; *** Scatter-Loading Description File generated by uVision ***
; *************************************************************
LR_IROM1 0x00000000 0x100000 { ; load region size_region
ER_IROM1 0x00000000 0x100000 { ; load address = execution address
*.o (RESET, +First)
*(InRoot$$Sections)
.ANY (+RO)
}
RW_IRAM1 0x20000000 0x40000 { ; RW data
.ANY (+RW +ZI)
}
}
bsp/maxim/MAX32660_EVSYS/board/nrfx_config.h
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/**
* Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
*
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form, except as embedded into a Nordic
* Semiconductor ASA integrated circuit in a product or a software update for
* such product, must reproduce the above copyright notice, this list of
* conditions and the following disclaimer in the documentation and/or other
* materials provided with the distribution.
*
* 3. Neither the name of Nordic Semiconductor ASA nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* 4. This software, with or without modification, must only be used with a
* Nordic Semiconductor ASA integrated circuit.
*
* 5. Any software provided in binary form under this license must not be reverse
* engineered, decompiled, modified and/or disassembled.
*
* THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
* OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*/
#ifndef NRFX_CONFIG_H__
#define NRFX_CONFIG_H__
// TODO - temporary redirection
#include <sdk_config.h>
#endif // NRFX_CONFIG_H__
bsp/maxim/MAX32660_EVSYS/board/nrfx_glue.h
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/*
* Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef NRFX_GLUE_H__
#define NRFX_GLUE_H__
// THIS IS A TEMPLATE FILE.
// It should be copied to a suitable location within the host environment into
// which nrfx is integrated, and the following macros should be provided with
// appropriate implementations.
// And this comment should be removed from the customized file.
#ifdef __cplusplus
extern
"C"
{
#endif
#include <stdbool.h>
#include "nrf.h"
/**
* @defgroup nrfx_glue nrfx_glue.h
* @{
* @ingroup nrfx
*
* @brief This file contains macros that should be implemented according to
* the needs of the host environment into which @em nrfx is integrated.
*/
// Uncomment this line to use the standard MDK way of binding IRQ handlers
// at linking time.
#include <soc/nrfx_irqs.h>
//------------------------------------------------------------------------------
/**
* @brief Macro for placing a runtime assertion.
*
* @param expression Expression to be evaluated.
*/
#define NRFX_ASSERT(expression)
/**
* @brief Macro for placing a compile time assertion.
*
* @param expression Expression to be evaluated.
*/
#define NRFX_STATIC_ASSERT(expression)
//------------------------------------------------------------------------------
/**
* @brief Macro for setting the priority of a specific IRQ.
*
* @param irq_number IRQ number.
* @param priority Priority to be set.
*/
#define NRFX_IRQ_PRIORITY_SET(irq_number, priority) NVIC_SetPriority(irq_number, priority)
/**
* @brief Macro for enabling a specific IRQ.
*
* @param irq_number IRQ number.
*/
#define NRFX_IRQ_ENABLE(irq_number) NVIC_EnableIRQ(irq_number)
/**
* @brief Macro for checking if a specific IRQ is enabled.
*
* @param irq_number IRQ number.
*
* @retval true If the IRQ is enabled.
* @retval false Otherwise.
*/
#define NRFX_IRQ_IS_ENABLED(irq_number) _NRFX_IRQ_IS_ENABLED(irq_number)
static
inline
bool
_NRFX_IRQ_IS_ENABLED
(
IRQn_Type
irq_number
)
{
return
0
!=
(
NVIC
->
ISER
[
irq_number
/
32
]
&
(
1UL
<<
(
irq_number
%
32
)));
}
/**
* @brief Macro for disabling a specific IRQ.
*
* @param irq_number IRQ number.
*/
#define NRFX_IRQ_DISABLE(irq_number) _NRFX_IRQ_DISABLE(irq_number)
static
inline
void
_NRFX_IRQ_DISABLE
(
IRQn_Type
irq_number
)
{
NVIC_DisableIRQ
(
irq_number
);
}
/**
* @brief Macro for setting a specific IRQ as pending.
*
* @param irq_number IRQ number.
*/
#define NRFX_IRQ_PENDING_SET(irq_number)
/**
* @brief Macro for clearing the pending status of a specific IRQ.
*
* @param irq_number IRQ number.
*/
#define NRFX_IRQ_PENDING_CLEAR(irq_number)
/**
* @brief Macro for checking the pending status of a specific IRQ.
*
* @retval true If the IRQ is pending.
* @retval false Otherwise.
*/
#define NRFX_IRQ_IS_PENDING(irq_number)
/** @brief Macro for entering into a critical section. */
#define NRFX_CRITICAL_SECTION_ENTER()
/** @brief Macro for exiting from a critical section. */
#define NRFX_CRITICAL_SECTION_EXIT()
//------------------------------------------------------------------------------
/**
* @brief When set to a non-zero value, this macro specifies that
* @ref nrfx_coredep_delay_us uses a precise DWT-based solution.
* A compilation error is generated if the DWT unit is not present
* in the SoC used.
*/
#define NRFX_DELAY_DWT_BASED 0
/**
* @brief Macro for delaying the code execution for at least the specified time.
*
* @param us_time Number of microseconds to wait.
*/
#define NRFX_DELAY_US(us_time)
//------------------------------------------------------------------------------
/** @brief Atomic 32-bit unsigned type. */
#define nrfx_atomic_t
/**
* @brief Macro for storing a value to an atomic object and returning its previous value.
*
* @param[in] p_data Atomic memory pointer.
* @param[in] value Value to store.
*
* @return Previous value of the atomic object.
*/
#define NRFX_ATOMIC_FETCH_STORE(p_data, value)
/**
* @brief Macro for running a bitwise OR operation on an atomic object and returning its previous value.
*
* @param[in] p_data Atomic memory pointer.
* @param[in] value Value of the second operand in the OR operation.
*
* @return Previous value of the atomic object.
*/
#define NRFX_ATOMIC_FETCH_OR(p_data, value)
/**
* @brief Macro for running a bitwise AND operation on an atomic object
* and returning its previous value.
*
* @param[in] p_data Atomic memory pointer.
* @param[in] value Value of the second operand in the AND operation.
*
* @return Previous value of the atomic object.
*/
#define NRFX_ATOMIC_FETCH_AND(p_data, value)
/**
* @brief Macro for running a bitwise XOR operation on an atomic object
* and returning its previous value.
*
* @param[in] p_data Atomic memory pointer.
* @param[in] value Value of the second operand in the XOR operation.
*
* @return Previous value of the atomic object.
*/
#define NRFX_ATOMIC_FETCH_XOR(p_data, value)
/**
* @brief Macro for running an addition operation on an atomic object
* and returning its previous value.
*
* @param[in] p_data Atomic memory pointer.
* @param[in] value Value of the second operand in the ADD operation.
*
* @return Previous value of the atomic object.
*/
#define NRFX_ATOMIC_FETCH_ADD(p_data, value)
/**
* @brief Macro for running a subtraction operation on an atomic object
* and returning its previous value.
*
* @param[in] p_data Atomic memory pointer.
* @param[in] value Value of the second operand in the SUB operation.
*
* @return Previous value of the atomic object.
*/
#define NRFX_ATOMIC_FETCH_SUB(p_data, value)
//------------------------------------------------------------------------------
/**
* @brief When set to a non-zero value, this macro specifies that the
* @ref nrfx_error_codes and the @ref nrfx_err_t type itself are defined
* in a customized way and the default definitions from @c <nrfx_error.h>
* should not be used.
*/
#define NRFX_CUSTOM_ERROR_CODES 0
//------------------------------------------------------------------------------
/** @brief Bitmask that defines DPPI channels that are reserved for use outside of the nrfx library. */
#define NRFX_DPPI_CHANNELS_USED 0
/** @brief Bitmask that defines DPPI groups that are reserved for use outside of the nrfx library. */
#define NRFX_DPPI_GROUPS_USED 0
/** @brief Bitmask that defines PPI channels that are reserved for use outside of the nrfx library. */
#define NRFX_PPI_CHANNELS_USED 0
/** @brief Bitmask that defines PPI groups that are reserved for use outside of the nrfx library. */
#define NRFX_PPI_GROUPS_USED 0
/** @brief Bitmask that defines EGU instances that are reserved for use outside of the nrfx library. */
#define NRFX_EGUS_USED 0
/** @brief Bitmask that defines TIMER instances that are reserved for use outside of the nrfx library. */
#define NRFX_TIMERS_USED 0
/** @} */
#ifdef __cplusplus
}
#endif
#endif // NRFX_GLUE_H__
bsp/maxim/MAX32660_EVSYS/board/nrfx_log.h
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/*
* Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef NRFX_LOG_H__
#define NRFX_LOG_H__
// THIS IS A TEMPLATE FILE.
// It should be copied to a suitable location within the host environment into
// which nrfx is integrated, and the following macros should be provided with
// appropriate implementations.
// And this comment should be removed from the customized file.
#ifdef __cplusplus
extern
"C"
{
#endif
/**
* @defgroup nrfx_log nrfx_log.h
* @{
* @ingroup nrfx
*
* @brief This file contains macros that should be implemented according to
* the needs of the host environment into which @em nrfx is integrated.
*/
/**
* @brief Macro for logging a message with the severity level ERROR.
*
* @param format printf-style format string, optionally followed by arguments
* to be formatted and inserted in the resulting string.
*/
#define NRFX_LOG_ERROR(format, ...)
/**
* @brief Macro for logging a message with the severity level WARNING.
*
* @param format printf-style format string, optionally followed by arguments
* to be formatted and inserted in the resulting string.
*/
#define NRFX_LOG_WARNING(format, ...)
/**
* @brief Macro for logging a message with the severity level INFO.
*
* @param format printf-style format string, optionally followed by arguments
* to be formatted and inserted in the resulting string.
*/
#define NRFX_LOG_INFO(format, ...)
/**
* @brief Macro for logging a message with the severity level DEBUG.
*
* @param format printf-style format string, optionally followed by arguments
* to be formatted and inserted in the resulting string.
*/
#define NRFX_LOG_DEBUG(format, ...)
/**
* @brief Macro for logging a memory dump with the severity level ERROR.
*
* @param[in] p_memory Pointer to the memory region to be dumped.
* @param[in] length Length of the memory region in bytes.
*/
#define NRFX_LOG_HEXDUMP_ERROR(p_memory, length)
/**
* @brief Macro for logging a memory dump with the severity level WARNING.
*
* @param[in] p_memory Pointer to the memory region to be dumped.
* @param[in] length Length of the memory region in bytes.
*/
#define NRFX_LOG_HEXDUMP_WARNING(p_memory, length)
/**
* @brief Macro for logging a memory dump with the severity level INFO.
*
* @param[in] p_memory Pointer to the memory region to be dumped.
* @param[in] length Length of the memory region in bytes.
*/
#define NRFX_LOG_HEXDUMP_INFO(p_memory, length)
/**
* @brief Macro for logging a memory dump with the severity level DEBUG.
*
* @param[in] p_memory Pointer to the memory region to be dumped.
* @param[in] length Length of the memory region in bytes.
*/
#define NRFX_LOG_HEXDUMP_DEBUG(p_memory, length)
/**
* @brief Macro for getting the textual representation of a given error code.
*
* @param[in] error_code Error code.
*
* @return String containing the textual representation of the error code.
*/
#define NRFX_LOG_ERROR_STRING_GET(error_code)
/** @} */
#ifdef __cplusplus
}
#endif
#endif // NRFX_LOG_H__
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bsp/maxim/MAX32660_EVSYS/rtconfig.h
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#ifndef RT_CONFIG_H__
#define RT_CONFIG_H__
/* Automatically generated file; DO NOT EDIT. */
/* RT-Thread Configuration */
/* RT-Thread Kernel */
#define RT_NAME_MAX 8
#define RT_ALIGN_SIZE 4
#define RT_THREAD_PRIORITY_32
#define RT_THREAD_PRIORITY_MAX 32
#define RT_TICK_PER_SECOND 100
#define RT_USING_OVERFLOW_CHECK
#define RT_USING_HOOK
#define RT_USING_IDLE_HOOK
#define RT_IDLE_HOOK_LIST_SIZE 4
#define IDLE_THREAD_STACK_SIZE 256
#define RT_USING_TIMER_SOFT
#define RT_TIMER_THREAD_PRIO 4
#define RT_TIMER_THREAD_STACK_SIZE 512
#define RT_DEBUG
/* Inter-Thread communication */
#define RT_USING_SEMAPHORE
#define RT_USING_MUTEX
#define RT_USING_EVENT
#define RT_USING_MAILBOX
#define RT_USING_MESSAGEQUEUE
/* Memory Management */
#define RT_USING_MEMPOOL
#define RT_USING_SMALL_MEM
#define RT_USING_HEAP
/* Kernel Device Object */
#define RT_USING_DEVICE
#define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart0"
#define RT_VER_NUM 0x40003
/* RT-Thread Components */
#define RT_USING_COMPONENTS_INIT
#define RT_USING_USER_MAIN
#define RT_MAIN_THREAD_STACK_SIZE 2048
#define RT_MAIN_THREAD_PRIORITY 10
/* C++ features */
/* Command shell */
#define RT_USING_FINSH
#define FINSH_THREAD_NAME "tshell"
#define FINSH_USING_HISTORY
#define FINSH_HISTORY_LINES 5
#define FINSH_USING_SYMTAB
#define FINSH_USING_DESCRIPTION
#define FINSH_THREAD_PRIORITY 20
#define FINSH_THREAD_STACK_SIZE 4096
#define FINSH_CMD_SIZE 80
#define FINSH_USING_MSH
#define FINSH_USING_MSH_DEFAULT
#define FINSH_USING_MSH_ONLY
#define FINSH_ARG_MAX 10
/* Device virtual file system */
/* Device Drivers */
#define RT_USING_DEVICE_IPC
#define RT_PIPE_BUFSZ 512
#define RT_USING_SERIAL
#define RT_SERIAL_RB_BUFSZ 64
#define RT_USING_PIN
/* Using USB */
/* POSIX layer and C standard library */
#define RT_USING_LIBC
/* Network */
/* Socket abstraction layer */
/* Network interface device */
/* light weight TCP/IP stack */
/* AT commands */
/* VBUS(Virtual Software BUS) */
/* Utilities */
/* RT-Thread online packages */
/* IoT - internet of things */
/* Wi-Fi */
/* Marvell WiFi */
/* Wiced WiFi */
/* IoT Cloud */
/* security packages */
/* language packages */
/* multimedia packages */
/* tools packages */
/* system packages */
/* peripheral libraries and drivers */
#define PKG_USING_NRFX
#define PKG_USING_NRFX_V210
/* miscellaneous packages */
/* samples: kernel and components samples */
/* Hardware Drivers Config */
#define SOC_NRF52840
#define NRFX_CLOCK_ENABLED 1
#define NRFX_CLOCK_DEFAULT_CONFIG_IRQ_PRIORITY 7
#define NRFX_CLOCK_CONFIG_LF_SRC 1
#define SOC_NORDIC
/* Onboard Peripheral Drivers */
#define BSP_USING_JLINK_TO_USART
/* On-chip Peripheral Drivers */
#define BSP_USING_GPIO
#define NRFX_GPIOTE_ENABLED 1
#define BSP_USING_UART
#define NRFX_USING_UART
#define NRFX_UART_ENABLED 1
#define BSP_USING_UART0
#define NRFX_UART0_ENABLED 1
#define BSP_UART0_RX_PIN 8
#define BSP_UART0_TX_PIN 6
/* On-chip flash config */
#define MCU_FLASH_START_ADDRESS 0x00000000
#define MCU_FLASH_SIZE_KB 1024
#define MCU_SRAM_START_ADDRESS 0x20000000
#define MCU_SRAM_SIZE_KB 256
#define MCU_FLASH_PAGE_SIZE 0x1000
#define BLE_STACK_USING_NULL
#endif
bsp/maxim/MAX32660_EVSYS/rtconfig.py
0 → 100644
浏览文件 @
0fe8fccf
import
os
# toolchains options
ARCH
=
'arm'
CPU
=
'cortex-m4'
CROSS_TOOL
=
'keil'
if
os
.
getenv
(
'RTT_CC'
):
CROSS_TOOL
=
os
.
getenv
(
'RTT_CC'
)
# cross_tool provides the cross compiler
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
if
CROSS_TOOL
==
'gcc'
:
PLATFORM
=
'gcc'
EXEC_PATH
=
'D:/SourceryGCC/bin'
elif
CROSS_TOOL
==
'keil'
:
PLATFORM
=
'armcc'
EXEC_PATH
=
'C:/Keil_v5'
elif
CROSS_TOOL
==
'iar'
:
print
(
'================ERROR============================'
)
print
(
'Not support iar yet!'
)
print
(
'================================================='
)
exit
(
0
)
if
os
.
getenv
(
'RTT_EXEC_PATH'
):
EXEC_PATH
=
os
.
getenv
(
'RTT_EXEC_PATH'
)
BUILD
=
'debug'
if
PLATFORM
==
'gcc'
:
# toolchains
PREFIX
=
'arm-none-eabi-'
CC
=
PREFIX
+
'gcc'
AS
=
PREFIX
+
'gcc'
AR
=
PREFIX
+
'ar'
LINK
=
PREFIX
+
'gcc'
TARGET_EXT
=
'elf'
SIZE
=
PREFIX
+
'size'
OBJDUMP
=
PREFIX
+
'objdump'
OBJCPY
=
PREFIX
+
'objcopy'
DEVICE
=
' -mcpu=cortex-m4 -mthumb -ffunction-sections -fdata-sections'
CFLAGS
=
DEVICE
AFLAGS
=
' -c'
+
DEVICE
+
' -x assembler-with-cpp'
LFLAGS
=
DEVICE
+
' -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,Reset_Handler -T board/linker_scripts/link.lds'
CPATH
=
''
LPATH
=
''
if
BUILD
==
'debug'
:
CFLAGS
+=
' -O0 -gdwarf-2'
AFLAGS
+=
' -gdwarf-2'
else
:
CFLAGS
+=
' -O2'
POST_ACTION
=
OBJCPY
+
' -O binary $TARGET rtthread.bin
\n
'
+
SIZE
+
' $TARGET
\n
'
elif
PLATFORM
==
'armcc'
:
# toolchains
CC
=
'armcc'
AS
=
'armasm'
AR
=
'armar'
LINK
=
'armlink'
TARGET_EXT
=
'axf'
DEVICE
=
' --device DARMSTM'
CFLAGS
=
DEVICE
+
' --apcs=interwork'
AFLAGS
=
DEVICE
LFLAGS
=
DEVICE
+
' --info sizes --info totals --info unused --info veneers --list rtthread.map --scatter "board\linker_scripts\link.sct"'
CFLAGS
+=
' --c99'
CFLAGS
+=
' -I'
+
EXEC_PATH
+
'/ARM/RV31/INC'
LFLAGS
+=
' --libpath '
+
EXEC_PATH
+
'/ARM/RV31/LIB'
EXEC_PATH
+=
'/arm/bin40/'
if
BUILD
==
'debug'
:
CFLAGS
+=
' -g -O0'
AFLAGS
+=
' -g'
else
:
CFLAGS
+=
' -O2'
POST_ACTION
=
'fromelf --bin $TARGET --output rtthread.bin
\n
fromelf -z $TARGET'
bsp/maxim/MAX32660_EVSYS/template.uvoptx
0 → 100644
浏览文件 @
0fe8fccf
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt
xmlns:xsi=
"http://www.w3.org/2001/XMLSchema-instance"
xsi:noNamespaceSchemaLocation=
"project_optx.xsd"
>
<SchemaVersion>
1.0
</SchemaVersion>
<Header>
### uVision Project, (C) Keil Software
</Header>
<Extensions>
<cExt>
*.c
</cExt>
<aExt>
*.s*; *.src; *.a*
</aExt>
<oExt>
*.obj; *.o
</oExt>
<lExt>
*.lib
</lExt>
<tExt>
*.txt; *.h; *.inc
</tExt>
<pExt>
*.plm
</pExt>
<CppX>
*.cpp
</CppX>
<nMigrate>
0
</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>
0
</dwLowDateTime>
<dwHighDateTime>
0
</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>
rtthread
</TargetName>
<ToolsetNumber>
0x4
</ToolsetNumber>
<ToolsetName>
ARM-ADS
</ToolsetName>
<TargetOption>
<CLKADS>
12000000
</CLKADS>
<OPTTT>
<gFlags>
1
</gFlags>
<BeepAtEnd>
1
</BeepAtEnd>
<RunSim>
0
</RunSim>
<RunTarget>
1
</RunTarget>
<RunAbUc>
0
</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>
1
</HexSelection>
<FlashByte>
65535
</FlashByte>
<HexRangeLowAddress>
0
</HexRangeLowAddress>
<HexRangeHighAddress>
0
</HexRangeHighAddress>
<HexOffset>
0
</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>
79
</PageWidth>
<PageLength>
66
</PageLength>
<TabStop>
8
</TabStop>
<ListingPath>
.\build\
</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>
1
</CreateCListing>
<CreateAListing>
1
</CreateAListing>
<CreateLListing>
1
</CreateLListing>
<CreateIListing>
0
</CreateIListing>
<AsmCond>
1
</AsmCond>
<AsmSymb>
1
</AsmSymb>
<AsmXref>
0
</AsmXref>
<CCond>
1
</CCond>
<CCode>
0
</CCode>
<CListInc>
0
</CListInc>
<CSymb>
0
</CSymb>
<LinkerCodeListing>
0
</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>
1
</LMap>
<LComments>
1
</LComments>
<LGenerateSymbols>
1
</LGenerateSymbols>
<LLibSym>
1
</LLibSym>
<LLines>
1
</LLines>
<LLocSym>
1
</LLocSym>
<LPubSym>
1
</LPubSym>
<LXref>
0
</LXref>
<LExpSel>
0
</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>
0
</tvExp>
<tvExpOptDlg>
0
</tvExpOptDlg>
<IsCurrentTarget>
1
</IsCurrentTarget>
</OPTFL>
<CpuCode>
5
</CpuCode>
<DebugOpt>
<uSim>
0
</uSim>
<uTrg>
1
</uTrg>
<sLdApp>
1
</sLdApp>
<sGomain>
1
</sGomain>
<sRbreak>
1
</sRbreak>
<sRwatch>
1
</sRwatch>
<sRmem>
1
</sRmem>
<sRfunc>
1
</sRfunc>
<sRbox>
1
</sRbox>
<tLdApp>
1
</tLdApp>
<tGomain>
1
</tGomain>
<tRbreak>
1
</tRbreak>
<tRwatch>
1
</tRwatch>
<tRmem>
1
</tRmem>
<tRfunc>
0
</tRfunc>
<tRbox>
1
</tRbox>
<tRtrace>
1
</tRtrace>
<sRSysVw>
1
</sRSysVw>
<tRSysVw>
1
</tRSysVw>
<sRunDeb>
0
</sRunDeb>
<sLrtime>
0
</sLrtime>
<bEvRecOn>
1
</bEvRecOn>
<bSchkAxf>
0
</bSchkAxf>
<bTchkAxf>
0
</bTchkAxf>
<nTsel>
4
</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile></tIfile>
<pMon>
Segger\JL2CM3.dll
</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>
0
</Number>
<Key>
JL2CM3
</Key>
<Name>
-U683349164 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(2BA01477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8004 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC4000 -FN2 -FF0nrf52xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF52840_xxAA$Flash\nrf52xxx.flm) -FF1nrf52xxx_uicr.flm -FS110001000 -FL11000 -FP1($$Device:nRF52840_xxAA$Flash\nrf52xxx_uicr.flm)
</Name>
</SetRegEntry>
<SetRegEntry>
<Number>
0
</Number>
<Key>
UL2CM3
</Key>
<Name>
UL2CM3(-S0 -C0 -P0 ) -FN2 -FC4000 -FD20000000 -FF0nrf52xxx -FF1nrf52xxx_uicr -FL0200000 -FL11000 -FS00 -FS110001000 -FP0($$Device:nRF52840_xxAA$Flash\nrf52xxx.flm) -FP1($$Device:nRF52840_xxAA$Flash\nrf52xxx_uicr.flm)
</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>
0
</THDelay>
</Tracepoint>
<DebugFlag>
<trace>
0
</trace>
<periodic>
0
</periodic>
<aLwin>
0
</aLwin>
<aCover>
0
</aCover>
<aSer1>
0
</aSer1>
<aSer2>
0
</aSer2>
<aPa>
0
</aPa>
<viewmode>
0
</viewmode>
<vrSel>
0
</vrSel>
<aSym>
0
</aSym>
<aTbox>
0
</aTbox>
<AscS1>
0
</AscS1>
<AscS2>
0
</AscS2>
<AscS3>
0
</AscS3>
<aSer3>
0
</aSer3>
<eProf>
0
</eProf>
<aLa>
0
</aLa>
<aPa1>
0
</aPa1>
<AscS4>
0
</AscS4>
<aSer4>
0
</aSer4>
<StkLoc>
0
</StkLoc>
<TrcWin>
0
</TrcWin>
<newCpu>
0
</newCpu>
<uProt>
0
</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>
0
</bLintAuto>
<bAutoGenD>
0
</bAutoGenD>
<LntExFlags>
0
</LntExFlags>
<pMisraName></pMisraName>
<pszMrule></pszMrule>
<pSingCmds></pSingCmds>
<pMultCmds></pMultCmds>
<pMisraNamep></pMisraNamep>
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
<DebugDescription>
<Enable>
1
</Enable>
<EnableFlashSeq>
1
</EnableFlashSeq>
<EnableLog>
0
</EnableLog>
<Protocol>
2
</Protocol>
<DbgClock>
10000000
</DbgClock>
</DebugDescription>
</TargetOption>
</Target>
</ProjectOpt>
bsp/maxim/MAX32660_EVSYS/template.uvprojx
0 → 100644
浏览文件 @
0fe8fccf
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<Project
xmlns:xsi=
"http://www.w3.org/2001/XMLSchema-instance"
xsi:noNamespaceSchemaLocation=
"project_projx.xsd"
>
<SchemaVersion>
2.1
</SchemaVersion>
<Header>
### uVision Project, (C) Keil Software
</Header>
<Targets>
<Target>
<TargetName>
rtthread
</TargetName>
<ToolsetNumber>
0x4
</ToolsetNumber>
<ToolsetName>
ARM-ADS
</ToolsetName>
<pCCUsed>
5060422::V5.06 update 4 (build 422)::ARMCC
</pCCUsed>
<uAC6>
0
</uAC6>
<TargetOption>
<TargetCommonOption>
<Device>
nRF52840_xxAA
</Device>
<Vendor>
Nordic Semiconductor
</Vendor>
<PackID>
NordicSemiconductor.nRF_DeviceFamilyPack.8.32.1
</PackID>
<PackURL>
http://developer.nordicsemi.com/nRF5_SDK/pieces/nRF_DeviceFamilyPack/
</PackURL>
<Cpu>
IRAM(0x20000000,0x40000) IROM(0x00000000,0x100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE
</Cpu>
<FlashUtilSpec></FlashUtilSpec>
<StartupFile></StartupFile>
<FlashDriverDll>
UL2CM3(-S0 -C0 -P0 -FD20000000 -FC4000 -FN2 -FF0nrf52xxx -FS00 -FL0200000 -FF1nrf52xxx_uicr -FS110001000 -FL11000 -FP0($$Device:nRF52840_xxAA$Flash\nrf52xxx.flm) -FP1($$Device:nRF52840_xxAA$Flash\nrf52xxx_uicr.flm))
</FlashDriverDll>
<DeviceId>
0
</DeviceId>
<RegisterFile>
$$Device:nRF52840_xxAA$Device\Include\nrf.h
</RegisterFile>
<MemoryEnv></MemoryEnv>
<Cmp></Cmp>
<Asm></Asm>
<Linker></Linker>
<OHString></OHString>
<InfinionOptionDll></InfinionOptionDll>
<SLE66CMisc></SLE66CMisc>
<SLE66AMisc></SLE66AMisc>
<SLE66LinkerMisc></SLE66LinkerMisc>
<SFDFile>
$$Device:nRF52840_xxAA$SVD\nrf52840.svd
</SFDFile>
<bCustSvd>
0
</bCustSvd>
<UseEnv>
0
</UseEnv>
<BinPath></BinPath>
<IncludePath></IncludePath>
<LibPath></LibPath>
<RegisterFilePath></RegisterFilePath>
<DBRegisterFilePath></DBRegisterFilePath>
<TargetStatus>
<Error>
0
</Error>
<ExitCodeStop>
0
</ExitCodeStop>
<ButtonStop>
0
</ButtonStop>
<NotGenerated>
0
</NotGenerated>
<InvalidFlash>
1
</InvalidFlash>
</TargetStatus>
<OutputDirectory>
.\build\
</OutputDirectory>
<OutputName>
rtthread
</OutputName>
<CreateExecutable>
1
</CreateExecutable>
<CreateLib>
0
</CreateLib>
<CreateHexFile>
0
</CreateHexFile>
<DebugInformation>
1
</DebugInformation>
<BrowseInformation>
1
</BrowseInformation>
<ListingPath>
.\build\
</ListingPath>
<HexFormatSelection>
1
</HexFormatSelection>
<Merge32K>
0
</Merge32K>
<CreateBatchFile>
0
</CreateBatchFile>
<BeforeCompile>
<RunUserProg1>
0
</RunUserProg1>
<RunUserProg2>
0
</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>
0
</UserProg1Dos16Mode>
<UserProg2Dos16Mode>
0
</UserProg2Dos16Mode>
<nStopU1X>
0
</nStopU1X>
<nStopU2X>
0
</nStopU2X>
</BeforeCompile>
<BeforeMake>
<RunUserProg1>
0
</RunUserProg1>
<RunUserProg2>
0
</RunUserProg2>
<UserProg1Name></UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>
0
</UserProg1Dos16Mode>
<UserProg2Dos16Mode>
0
</UserProg2Dos16Mode>
<nStopB1X>
0
</nStopB1X>
<nStopB2X>
0
</nStopB2X>
</BeforeMake>
<AfterMake>
<RunUserProg1>
1
</RunUserProg1>
<RunUserProg2>
0
</RunUserProg2>
<UserProg1Name>
fromelf --bin !L --output rtthread.bin
</UserProg1Name>
<UserProg2Name></UserProg2Name>
<UserProg1Dos16Mode>
0
</UserProg1Dos16Mode>
<UserProg2Dos16Mode>
0
</UserProg2Dos16Mode>
<nStopA1X>
0
</nStopA1X>
<nStopA2X>
0
</nStopA2X>
</AfterMake>
<SelectedForBatchBuild>
0
</SelectedForBatchBuild>
<SVCSIdString></SVCSIdString>
</TargetCommonOption>
<CommonProperty>
<UseCPPCompiler>
0
</UseCPPCompiler>
<RVCTCodeConst>
0
</RVCTCodeConst>
<RVCTZI>
0
</RVCTZI>
<RVCTOtherData>
0
</RVCTOtherData>
<ModuleSelection>
0
</ModuleSelection>
<IncludeInBuild>
1
</IncludeInBuild>
<AlwaysBuild>
0
</AlwaysBuild>
<GenerateAssemblyFile>
0
</GenerateAssemblyFile>
<AssembleAssemblyFile>
0
</AssembleAssemblyFile>
<PublicsOnly>
0
</PublicsOnly>
<StopOnExitCode>
3
</StopOnExitCode>
<CustomArgument></CustomArgument>
<IncludeLibraryModules></IncludeLibraryModules>
<ComprImg>
1
</ComprImg>
</CommonProperty>
<DllOption>
<SimDllName>
SARMCM3.DLL
</SimDllName>
<SimDllArguments>
-MPU
</SimDllArguments>
<SimDlgDll>
DCM.DLL
</SimDlgDll>
<SimDlgDllArguments>
-pCM4
</SimDlgDllArguments>
<TargetDllName>
SARMCM3.DLL
</TargetDllName>
<TargetDllArguments>
-MPU
</TargetDllArguments>
<TargetDlgDll>
TCM.DLL
</TargetDlgDll>
<TargetDlgDllArguments>
-pCM4
</TargetDlgDllArguments>
</DllOption>
<DebugOption>
<OPTHX>
<HexSelection>
1
</HexSelection>
<HexRangeLowAddress>
0
</HexRangeLowAddress>
<HexRangeHighAddress>
0
</HexRangeHighAddress>
<HexOffset>
0
</HexOffset>
<Oh166RecLen>
16
</Oh166RecLen>
</OPTHX>
</DebugOption>
<Utilities>
<Flash1>
<UseTargetDll>
1
</UseTargetDll>
<UseExternalTool>
0
</UseExternalTool>
<RunIndependent>
0
</RunIndependent>
<UpdateFlashBeforeDebugging>
1
</UpdateFlashBeforeDebugging>
<Capability>
1
</Capability>
<DriverSelection>
4096
</DriverSelection>
</Flash1>
<bUseTDR>
1
</bUseTDR>
<Flash2>
BIN\UL2CM3.DLL
</Flash2>
<Flash3>
"" ()
</Flash3>
<Flash4></Flash4>
<pFcarmOut></pFcarmOut>
<pFcarmGrp></pFcarmGrp>
<pFcArmRoot></pFcArmRoot>
<FcArmLst>
0
</FcArmLst>
</Utilities>
<TargetArmAds>
<ArmAdsMisc>
<GenerateListings>
0
</GenerateListings>
<asHll>
1
</asHll>
<asAsm>
1
</asAsm>
<asMacX>
1
</asMacX>
<asSyms>
1
</asSyms>
<asFals>
1
</asFals>
<asDbgD>
1
</asDbgD>
<asForm>
1
</asForm>
<ldLst>
0
</ldLst>
<ldmm>
1
</ldmm>
<ldXref>
1
</ldXref>
<BigEnd>
0
</BigEnd>
<AdsALst>
1
</AdsALst>
<AdsACrf>
1
</AdsACrf>
<AdsANop>
0
</AdsANop>
<AdsANot>
0
</AdsANot>
<AdsLLst>
1
</AdsLLst>
<AdsLmap>
1
</AdsLmap>
<AdsLcgr>
1
</AdsLcgr>
<AdsLsym>
1
</AdsLsym>
<AdsLszi>
1
</AdsLszi>
<AdsLtoi>
1
</AdsLtoi>
<AdsLsun>
1
</AdsLsun>
<AdsLven>
1
</AdsLven>
<AdsLsxf>
1
</AdsLsxf>
<RvctClst>
0
</RvctClst>
<GenPPlst>
0
</GenPPlst>
<AdsCpuType>
"Cortex-M4"
</AdsCpuType>
<RvctDeviceName></RvctDeviceName>
<mOS>
0
</mOS>
<uocRom>
0
</uocRom>
<uocRam>
0
</uocRam>
<hadIROM>
1
</hadIROM>
<hadIRAM>
1
</hadIRAM>
<hadXRAM>
0
</hadXRAM>
<uocXRam>
0
</uocXRam>
<RvdsVP>
2
</RvdsVP>
<RvdsMve>
0
</RvdsMve>
<hadIRAM2>
0
</hadIRAM2>
<hadIROM2>
0
</hadIROM2>
<StupSel>
8
</StupSel>
<useUlib>
0
</useUlib>
<EndSel>
0
</EndSel>
<uLtcg>
0
</uLtcg>
<nSecure>
0
</nSecure>
<RoSelD>
3
</RoSelD>
<RwSelD>
3
</RwSelD>
<CodeSel>
0
</CodeSel>
<OptFeed>
0
</OptFeed>
<NoZi1>
0
</NoZi1>
<NoZi2>
0
</NoZi2>
<NoZi3>
0
</NoZi3>
<NoZi4>
0
</NoZi4>
<NoZi5>
0
</NoZi5>
<Ro1Chk>
0
</Ro1Chk>
<Ro2Chk>
0
</Ro2Chk>
<Ro3Chk>
0
</Ro3Chk>
<Ir1Chk>
1
</Ir1Chk>
<Ir2Chk>
0
</Ir2Chk>
<Ra1Chk>
0
</Ra1Chk>
<Ra2Chk>
0
</Ra2Chk>
<Ra3Chk>
0
</Ra3Chk>
<Im1Chk>
1
</Im1Chk>
<Im2Chk>
0
</Im2Chk>
<OnChipMemories>
<Ocm1>
<Type>
0
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</Ocm1>
<Ocm2>
<Type>
0
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</Ocm2>
<Ocm3>
<Type>
0
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</Ocm3>
<Ocm4>
<Type>
0
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</Ocm4>
<Ocm5>
<Type>
0
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</Ocm5>
<Ocm6>
<Type>
0
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</Ocm6>
<IRAM>
<Type>
0
</Type>
<StartAddress>
0x20000000
</StartAddress>
<Size>
0x40000
</Size>
</IRAM>
<IROM>
<Type>
1
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x100000
</Size>
</IROM>
<XRAM>
<Type>
0
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</XRAM>
<OCR_RVCT1>
<Type>
1
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</OCR_RVCT1>
<OCR_RVCT2>
<Type>
1
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</OCR_RVCT2>
<OCR_RVCT3>
<Type>
1
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</OCR_RVCT3>
<OCR_RVCT4>
<Type>
1
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x100000
</Size>
</OCR_RVCT4>
<OCR_RVCT5>
<Type>
1
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</OCR_RVCT5>
<OCR_RVCT6>
<Type>
0
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</OCR_RVCT6>
<OCR_RVCT7>
<Type>
0
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</OCR_RVCT7>
<OCR_RVCT8>
<Type>
0
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</OCR_RVCT8>
<OCR_RVCT9>
<Type>
0
</Type>
<StartAddress>
0x20000000
</StartAddress>
<Size>
0x40000
</Size>
</OCR_RVCT9>
<OCR_RVCT10>
<Type>
0
</Type>
<StartAddress>
0x0
</StartAddress>
<Size>
0x0
</Size>
</OCR_RVCT10>
</OnChipMemories>
<RvctStartVector></RvctStartVector>
</ArmAdsMisc>
<Cads>
<interw>
1
</interw>
<Optim>
1
</Optim>
<oTime>
0
</oTime>
<SplitLS>
0
</SplitLS>
<OneElfS>
1
</OneElfS>
<Strict>
0
</Strict>
<EnumInt>
0
</EnumInt>
<PlainCh>
0
</PlainCh>
<Ropi>
0
</Ropi>
<Rwpi>
0
</Rwpi>
<wLevel>
2
</wLevel>
<uThumb>
0
</uThumb>
<uSurpInc>
0
</uSurpInc>
<uC99>
1
</uC99>
<uGnu>
0
</uGnu>
<useXO>
0
</useXO>
<v6Lang>
1
</v6Lang>
<v6LangP>
1
</v6LangP>
<vShortEn>
1
</vShortEn>
<vShortWch>
1
</vShortWch>
<v6Lto>
0
</v6Lto>
<v6WtE>
0
</v6WtE>
<v6Rtti>
0
</v6Rtti>
<VariousControls>
<MiscControls>
--reduce_paths
</MiscControls>
<Define>
BLE_STACK_SUPPORT_REQD NRF_SD_BLE_API_VERSION=4 S140 SOFTDEVICE_PRESENT SWI_DISABLE0 CONFIG_GPIO_AS_PINRESET NRF52 NRF52832_XXAA NRF52_PAN_12 NRF52_PAN_15 NRF52_PAN_20 NRF52_PAN_31 NRF52_PAN_36 NRF52_PAN_51 NRF52_PAN_54 NRF52_PAN_55 NRF52_PAN_58 NRF52_PAN_64 NRF52_PAN_74
</Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Cads>
<Aads>
<interw>
1
</interw>
<Ropi>
0
</Ropi>
<Rwpi>
0
</Rwpi>
<thumb>
0
</thumb>
<SplitLS>
0
</SplitLS>
<SwStkChk>
0
</SwStkChk>
<NoWarn>
0
</NoWarn>
<uSurpInc>
0
</uSurpInc>
<useXO>
0
</useXO>
<uClangAs>
0
</uClangAs>
<VariousControls>
<MiscControls>
--cpreproc_opts=-DBLE_STACK_SUPPORT_REQD,-DNRF_SD_BLE_API_VERSION=4,-DS132,-DSOFTDEVICE_PRESENT,-DSWI_DISABLE0,-DCONFIG_GPIO_AS_PINRESET,-DNRF52,-DNRF52832_XXAA,-DNRF52_PAN_12,-DNRF52_PAN_15,-DNRF52_PAN_20,-DNRF52_PAN_31,-DNRF52_PAN_36,-DNRF52_PAN_51,-DNRF52_PAN_54,-DNRF52_PAN_55,-DNRF52_PAN_58,-DNRF52_PAN_64,-DNRF52_PAN_74
</MiscControls>
<Define></Define>
<Undefine></Undefine>
<IncludePath></IncludePath>
</VariousControls>
</Aads>
<LDads>
<umfTarg>
1
</umfTarg>
<Ropi>
0
</Ropi>
<Rwpi>
0
</Rwpi>
<noStLib>
0
</noStLib>
<RepFail>
1
</RepFail>
<useFile>
0
</useFile>
<TextAddressRange>
0x00000000
</TextAddressRange>
<DataAddressRange>
0x20000000
</DataAddressRange>
<pXoBase></pXoBase>
<ScatterFile></ScatterFile>
<IncludeLibs></IncludeLibs>
<IncludeLibsPath></IncludeLibsPath>
<Misc>
--diag_suppress 6330
</Misc>
<LinkerInputFile></LinkerInputFile>
<DisabledWarnings></DisabledWarnings>
</LDads>
</TargetArmAds>
</TargetOption>
</Target>
</Targets>
<RTE>
<apis/>
<components/>
<files/>
</RTE>
</Project>
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