1. 09 2月, 2007 1 次提交
  2. 04 12月, 2006 1 次提交
    • B
      [POWERPC] Make pci_read_irq_line the default · f90bb153
      Benjamin Herrenschmidt 提交于
      This patch reworks the way IRQs are fixed up on PCI for arch powerpc.
      
      It makes pci_read_irq_line() called by default in the PCI code for
      devices that are probed, and add an optional per-device fixup in
      ppc_md for platforms that really need to correct what they obtain
      from pci_read_irq_line().
      
      It also removes ppc_md.irq_bus_setup which was only used by pSeries
      and should not be needed anymore.
      
      I've also removed the pSeries s7a workaround as it can't work with
      the current interrupt code anyway. I'm trying to get one of these
      machines working so I can test a proper fix for that problem.
      
      I also haven't updated the old-style fixup code from 85xx_cds.c
      because it's actually buggy :) It assigns pci_dev->irq hard coded
      numbers which is no good with the new IRQ mapping code. It should
      at least use irq_create_mapping(NULL, hard_coded_number); and possibly
      also set_irq_type() to set them as level low.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      f90bb153
  3. 07 10月, 2006 1 次提交
  4. 06 10月, 2006 1 次提交
  5. 22 9月, 2006 2 次提交
    • V
      POWERPC: overhaul with cpm2_map mechanism · d3465c92
      Vitaly Bordug 提交于
      Incorporating the new way of cpm2 immr access, introduced in the previous
      patch, into CPM2 peripheral devices (fs_enet and cpm_uart). Both ppc and
      powerpc approved working( real actions taken in powerpc only, ppc just
      has a wrapper to keep init stuff consistent).
      Signed-off-by: NVitaly Bordug <vbordug@ru.mvista.com>
      d3465c92
    • V
      POWERPC: Add support for the mpc8560 eval board · 902f392d
      Vitaly Bordug 提交于
      This makes the 8560 evaluation board fully supported under arch/powerpc,
      as the first board with CPM2 SoC peripherals. The brand new devicetree
      nodes are introduced (intending to be a subset of the QuiccEngine-equipped
      models, with dts sources placed into the kernel according to the new convention.
      
      Assuming all the preceding stuff applied (PAL+fs_enet related+ CPM_UART
      update), the both TSEC eth ,FCC Eths, and both SCC UARTs are
      working. The relevant drivers are still capable to drive users in ppc,
      which was verified with 8272ADS (SCC uart+FCC eth).
      
      This is also verified on mpc8540 and actually make it work (PCI stuff
      working as well)
      Signed-off-by: NVitaly Bordug <vbordug@ru.mvista.com>
      902f392d
  6. 23 8月, 2006 1 次提交
  7. 31 7月, 2006 1 次提交
  8. 01 7月, 2006 1 次提交
  9. 31 3月, 2006 1 次提交
  10. 22 2月, 2006 1 次提交
  11. 10 2月, 2006 2 次提交
  12. 20 1月, 2006 1 次提交