- 03 1月, 2009 11 次提交
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由 Joerg Roedel 提交于
Impact: rename set_device_domain() to attach_device() Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
Impact: know how many devices are assigned to a domain Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
Impact: detect when a driver uses a device assigned otherwise Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
Imapct: add a new struct member to 'struct protection_domain' When using protection domains for dma_ops and KVM its better to know for which subsystem it was allocated. Add a flags member to struct protection domain for that purpose. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
Impact: add a function to flush a domain id on every IOMMU Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
Impact: save unneeded logic to add and remove domains to the list The removal of a protection domain from the iommu_pd_list is not necessary. Another benefit is that we save complexity because we don't have to readd it later when the device no longer uses the domain. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
Impact: refactoring of iommu_queue_inv_iommu_pages Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
Impact: split one function into three The separate functions are required synchronize commands across all hardware IOMMUs in the system. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
Impact: add code to release a domain id Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
Impact: change code to free pagetables from protection domains The dma_ops_free_pagetable function can only free pagetables from dma_ops domains. Change that to free pagetables of pure protection domains. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
Impact: function rename The iommu_map function maps only one page. Make this clear in the function name. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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- 17 12月, 2008 1 次提交
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由 Joerg Roedel 提交于
Impact: prevents data corruption after a failed completion wait loop Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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- 08 12月, 2008 5 次提交
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由 Joerg Roedel 提交于
Impact: minor fix Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
Impact: minor fix Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
Impact: cleanup Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
Impact: bugfix Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
Impact: bugfix in iommu_map_page function Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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- 03 12月, 2008 2 次提交
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由 Joerg Roedel 提交于
The access to the iommu->need_sync member needs to be protected by the iommu->lock. Otherwise this is a possible race condition. Fix it with this patch. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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由 Joerg Roedel 提交于
In some rare cases a request can arrive an IOMMU with its originial requestor id even it is aliased. Handle this by setting the device table entry to the same protection domain for the original and the aliased requestor id. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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- 28 11月, 2008 1 次提交
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由 Joerg Roedel 提交于
Impact: cleanup Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 18 11月, 2008 1 次提交
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由 Joerg Roedel 提交于
Impact: fix possible use of stale IO/TLB entries Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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- 06 11月, 2008 1 次提交
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由 Joerg Roedel 提交于
Lazy flushing needs to take care of the unmap path too which is not yet implemented and leads to stale IO/TLB entries. This is fixed by this patch. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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- 31 10月, 2008 1 次提交
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由 Joerg Roedel 提交于
This patch changes the code to use IOMMU_CAP_NPCACHE as a shift and not as a mask. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com>
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- 17 10月, 2008 2 次提交
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由 Joerg Roedel 提交于
Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: Muli Ben-Yehuda <muli@il.ibm.com> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Joerg Roedel 提交于
This series of patches re-introduces the iommu_num_pages function so that it can be used by each architecture specific IOMMU implementations. The series also changes IOMMU implementations for X86, Alpha, PowerPC and UltraSparc. The other implementations are not yet changed because the modifications required are not obvious and I can't test them on real hardware. This patch: This is a preparation patch for introducing a generic iommu_num_pages function. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com> Cc: "David S. Miller" <davem@davemloft.net> Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: FUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Cc: Muli Ben-Yehuda <muli@il.ibm.com> Cc: Dave Airlie <airlied@linux.ie> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 02 10月, 2008 1 次提交
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由 FUJITA Tomonori 提交于
AMD IOMMU can use iommu_device_max_index() instead of the homegrown function. Signed-off-by: NFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: NJoerg Roedel <joerg.roedel@amd.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 23 9月, 2008 1 次提交
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由 FUJITA Tomonori 提交于
This patch against tip/x86/iommu virtually reverts 2842e5bf. But just reverting the commit breaks AMD IOMMU so this patch also includes some fixes. The above commit adds new two options to x86 IOMMU generic kernel boot options, fullflush and nofullflush. But such change that affects all the IOMMUs needs more discussion (all IOMMU parties need the chance to discuss it): http://lkml.org/lkml/2008/9/19/106Signed-off-by: NFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: NJoerg Roedel <joerg.roedel@amd.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 22 9月, 2008 1 次提交
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由 FUJITA Tomonori 提交于
x86 has set_bit_string() that does the exact same thing that set_bit_area() in lib/iommu-helper.c does. This patch exports set_bit_area() in lib/iommu-helper.c as iommu_area_reserve(), converts GART, Calgary, and AMD IOMMU to use it. Signed-off-by: NFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Acked-by: NJoerg Roedel <joerg.roedel@amd.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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- 19 9月, 2008 12 次提交
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由 Joerg Roedel 提交于
The alloc_coherent implementation for AMD IOMMU currently uses *dev->dma_mask per default. This patch changes it to prefer dev->coherent_dma_mask if it is set. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Joerg Roedel 提交于
The current calculation is very complicated. This patch replaces it with a much simpler version. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Joerg Roedel 提交于
Remove the memset and use __GFP_ZERO at allocation time instead. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 FUJITA Tomonori 提交于
x86's common alloc_coherent (dma_alloc_coherent in dma-mapping.h) sets up the gfp flag according to the device dma_mask but AMD IOMMU doesn't need it for devices that the IOMMU can do virtual mappings for. This patch avoids unnecessary low zone allocation. Signed-off-by: NFUJITA Tomonori <fujita.tomonori@lab.ntt.co.jp> Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Joerg Roedel 提交于
Remove some magic numbers and split the pte_root using standard functions. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Joerg Roedel 提交于
In isolation mode the protection domains for the devices are preallocated and preassigned. This is bad if a device should be passed to a virtualization guest because the IOMMU code does not know if it is in use by a driver. This patch changes the code to assign the device to the preallocated domain only if there are dma mapping requests for it. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Joerg Roedel 提交于
This function determines if the AMD IOMMU implementation is responsible for a given device. So the DMA layer can get this information from the driver. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Joerg Roedel 提交于
This patch adds code for polling and printing out events generated by the AMD IOMMU. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Joerg Roedel 提交于
The AMD IOMMU can generate interrupts for various reasons. This patch adds the basic interrupt enabling infrastructure to the driver. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Joerg Roedel 提交于
The API definition for dma_alloc_coherent states that the bus address has to be aligned to the next power of 2 boundary greater than the allocation size. This is violated by AMD IOMMU so far and this patch fixes it. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Joerg Roedel 提交于
This patch adds branch hints to the cecks if a completion_wait is necessary. The completion_waits in the mapping paths are unlikly because they will only happen on software implementations of AMD IOMMU which don't exists today or with lazy IO/TLB flushing when the allocator wraps around the address space. With lazy IO/TLB flushing the completion_wait in the unmapping path is unlikely too. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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由 Joerg Roedel 提交于
The IO/TLB flushing on every unmaping operation is the most expensive part in AMD IOMMU code and not strictly necessary. It is sufficient to do the flush before any entries are reused. This is patch implements lazy IO/TLB flushing which does exactly this. Signed-off-by: NJoerg Roedel <joerg.roedel@amd.com> Signed-off-by: NIngo Molnar <mingo@elte.hu>
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