1. 06 1月, 2012 1 次提交
  2. 06 12月, 2011 9 次提交
    • J
      drm/ttm: isolate dma data from ttm_tt V4 · 8e7e7052
      Jerome Glisse 提交于
      Move dma data to a superset ttm_dma_tt structure which herit
      from ttm_tt. This allow driver that don't use dma functionalities
      to not have to waste memory for it.
      
      V2 Rebase on top of no memory account changes (where/when is my
         delorean when i need it ?)
      V3 Make sure page list is initialized empty
      V4 typo/syntax fixes
      Signed-off-by: NJerome Glisse <jglisse@redhat.com>
      Reviewed-by: NThomas Hellstrom <thellstrom@vmware.com>
      8e7e7052
    • K
      drm/ttm: provide dma aware ttm page pool code V9 · 2334b75f
      Konrad Rzeszutek Wilk 提交于
      In TTM world the pages for the graphic drivers are kept in three different
      pools: write combined, uncached, and cached (write-back). When the pages
      are used by the graphic driver the graphic adapter via its built in MMU
      (or AGP) programs these pages in. The programming requires the virtual address
      (from the graphic adapter perspective) and the physical address (either System RAM
      or the memory on the card) which is obtained using the pci_map_* calls (which does the
      virtual to physical - or bus address translation). During the graphic application's
      "life" those pages can be shuffled around, swapped out to disk, moved from the
      VRAM to System RAM or vice-versa. This all works with the existing TTM pool code
      - except when we want to use the software IOTLB (SWIOTLB) code to "map" the physical
      addresses to the graphic adapter MMU. We end up programming the bounce buffer's
      physical address instead of the TTM pool memory's and get a non-worky driver.
      There are two solutions:
      1) using the DMA API to allocate pages that are screened by the DMA API, or
      2) using the pci_sync_* calls to copy the pages from the bounce-buffer and back.
      
      This patch fixes the issue by allocating pages using the DMA API. The second
      is a viable option - but it has performance drawbacks and potential correctness
      issues - think of the write cache page being bounced (SWIOTLB->TTM), the
      WC is set on the TTM page and the copy from SWIOTLB not making it to the TTM
      page until the page has been recycled in the pool (and used by another application).
      
      The bounce buffer does not get activated often - only in cases where we have
      a 32-bit capable card and we want to use a page that is allocated above the
      4GB limit. The bounce buffer offers the solution of copying the contents
      of that 4GB page to an location below 4GB and then back when the operation has been
      completed (or vice-versa). This is done by using the 'pci_sync_*' calls.
      Note: If you look carefully enough in the existing TTM page pool code you will
      notice the GFP_DMA32 flag is used  - which should guarantee that the provided page
      is under 4GB. It certainly is the case, except this gets ignored in two cases:
       - If user specifies 'swiotlb=force' which bounces _every_ page.
       - If user is using a Xen's PV Linux guest (which uses the SWIOTLB and the
         underlaying PFN's aren't necessarily under 4GB).
      
      To not have this extra copying done the other option is to allocate the pages
      using the DMA API so that there is not need to map the page and perform the
      expensive 'pci_sync_*' calls.
      
      This DMA API capable TTM pool requires for this the 'struct device' to
      properly call the DMA API. It also has to track the virtual and bus address of
      the page being handed out in case it ends up being swapped out or de-allocated -
      to make sure it is de-allocated using the proper's 'struct device'.
      
      Implementation wise the code keeps two lists: one that is attached to the
      'struct device' (via the dev->dma_pools list) and a global one to be used when
      the 'struct device' is unavailable (think shrinker code). The global list can
      iterate over all of the 'struct device' and its associated dma_pool. The list
      in dev->dma_pools can only iterate the device's dma_pool.
                                                                  /[struct device_pool]\
              /---------------------------------------------------| dev                |
             /                                            +-------| dma_pool           |
       /-----+------\                                    /        \--------------------/
       |struct device|     /-->[struct dma_pool for WC]</         /[struct device_pool]\
       | dma_pools   +----+                                     /-| dev                |
       |  ...        |    \--->[struct dma_pool for uncached]<-/--| dma_pool           |
       \-----+------/                                         /   \--------------------/
              \----------------------------------------------/
      [Two pools associated with the device (WC and UC), and the parallel list
      containing the 'struct dev' and 'struct dma_pool' entries]
      
      The maximum amount of dma pools a device can have is six: write-combined,
      uncached, and cached; then there are the DMA32 variants which are:
      write-combined dma32, uncached dma32, and cached dma32.
      
      Currently this code only gets activated when any variant of the SWIOTLB IOMMU
      code is running (Intel without VT-d, AMD without GART, IBM Calgary and Xen PV
      with PCI devices).
      Tested-by: NMichel Dänzer <michel@daenzer.net>
      [v1: Using swiotlb_nr_tbl instead of swiotlb_enabled]
      [v2: Major overhaul - added 'inuse_list' to seperate used from inuse and reorder
      the order of lists to get better performance.]
      [v3: Added comments/and some logic based on review, Added Jerome tag]
      [v4: rebase on top of ttm_tt & ttm_backend merge]
      [v5: rebase on top of ttm memory accounting overhaul]
      [v6: New rebase on top of more memory accouting changes]
      [v7: well rebase on top of no memory accounting changes]
      [v8: make sure pages list is initialized empty]
      [v9: calll ttm_mem_global_free_page in unpopulate for accurate accountg]
      Signed-off-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Reviewed-by: NJerome Glisse <jglisse@redhat.com>
      Acked-by: NThomas Hellstrom <thellstrom@vmware.com>
      2334b75f
    • J
      drm/ttm: introduce callback for ttm_tt populate & unpopulate V4 · b1e5f172
      Jerome Glisse 提交于
      Move the page allocation and freeing to driver callback and
      provide ttm code helper function for those.
      
      Most intrusive change, is the fact that we now only fully
      populate an object this simplify some of code designed around
      the page fault design.
      
      V2 Rebase on top of memory accounting overhaul
      V3 New rebase on top of more memory accouting changes
      V4 Rebase on top of no memory account changes (where/when is my
         delorean when i need it ?)
      Signed-off-by: NJerome Glisse <jglisse@redhat.com>
      Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Reviewed-by: NThomas Hellstrom <thellstrom@vmware.com>
      b1e5f172
    • J
      drm/ttm: merge ttm_backend and ttm_tt V5 · 649bf3ca
      Jerome Glisse 提交于
      ttm_backend will only exist with a ttm_tt, and ttm_tt
      will only be of interest when bound to a backend. Merge them
      to avoid code and data duplication.
      
      V2 Rebase on top of memory accounting overhaul
      V3 Rebase on top of more memory accounting changes
      V4 Rebase on top of no memory account changes (where/when is my
         delorean when i need it ?)
      V5 make sure ttm is unbound before destroying, change commit
         message on suggestion from Tormod Volden
      Signed-off-by: NJerome Glisse <jglisse@redhat.com>
      Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Reviewed-by: NThomas Hellstrom <thellstrom@vmware.com>
      649bf3ca
    • J
      drm/ttm: page allocation use page array instead of list · 822c4d9a
      Jerome Glisse 提交于
      Use the ttm_tt pages array for pages allocations, move the list
      unwinding into the page allocation functions.
      Signed-off-by: NJerome Glisse <jglisse@redhat.com>
      822c4d9a
    • J
    • J
      drm/ttm: use ttm put pages function to properly restore cache attribute · 5e265680
      Jerome Glisse 提交于
      On failure we need to make sure the page we free has wb cache
      attribute. Do this pas call the proper ttm page helper function.
      Signed-off-by: NJerome Glisse <jglisse@redhat.com>
      Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Reviewed-by: NThomas Hellstrom <thellstrom@vmware.com>
      5e265680
    • J
      drm/ttm: remove split btw highmen and lowmem page · 667b7a27
      Jerome Glisse 提交于
      Split btw highmem and lowmem page was rendered useless by the
      pool code. Remove it. Note further cleanup would change the
      ttm page allocation helper to actualy take an array instead
      of relying on list this could drasticly reduce the number of
      function call in the common case of allocation whole buffer.
      Signed-off-by: NJerome Glisse <jglisse@redhat.com>
      Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Reviewed-by: NThomas Hellstrom <thellstrom@vmware.com>
      667b7a27
    • J
      drm/ttm: remove userspace backed ttm object support · 3316497b
      Jerome Glisse 提交于
      This was never use in none of the driver, properly using userspace
      page for bo would need more code (vma interaction mostly). Removing
      this dead code in preparation of ttm_tt & backend merge.
      Signed-off-by: NJerome Glisse <jglisse@redhat.com>
      Reviewed-by: NKonrad Rzeszutek Wilk <konrad.wilk@oracle.com>
      Reviewed-by: NThomas Hellstrom <thellstrom@vmware.com>
      3316497b
  3. 01 11月, 2011 1 次提交
  4. 28 6月, 2011 1 次提交
  5. 05 4月, 2011 1 次提交
  6. 23 2月, 2011 2 次提交
  7. 28 1月, 2011 2 次提交
  8. 09 11月, 2010 1 次提交
  9. 06 4月, 2010 1 次提交
    • P
      drm/ttm: add pool wc/uc page allocator V3 · 1403b1a3
      Pauli Nieminen 提交于
      On AGP system we might allocate/free routinely uncached or wc memory,
      changing page from cached (wb) to uc or wc is very expensive and involves
      a lot of flushing. To improve performance this allocator use a pool
      of uc,wc pages.
      
      Pools are protected with spinlocks to allow multiple threads to allocate pages
      simultanously. Expensive operations are done outside of spinlock to maximize
      concurrency.
      
      Pools are linked lists of pages that were recently freed. mm shrink callback
      allows kernel to claim back pages when they are required for something else.
      
      Fixes:
      * set_pages_array_wb handles highmem pages so we don't have to remove them
        from pool.
      * Add count parameter to ttm_put_pages to avoid looping in free code.
      * Change looping from _safe to normal in pool fill error path.
      * Initialize sum variable and make the loop prettier in get_num_unused_pages.
      
      * Moved pages_freed reseting inside the loop in ttm_page_pool_free.
      * Add warning comment about spinlock context in ttm_page_pool_free.
      
      Based on Jerome Glisse's and Dave Airlie's pool allocator.
      Signed-off-by: NJerome Glisse <jglisse@redhat.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      Signed-off-by: NPauli Nieminen <suokkos@gmail.com>
      Reviewed-by: NJerome Glisse <jglisse@redhat.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      1403b1a3
  10. 30 3月, 2010 1 次提交
    • T
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking... · 5a0e3ad6
      Tejun Heo 提交于
      include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit slab.h inclusion from percpu.h
      
      percpu.h is included by sched.h and module.h and thus ends up being
      included when building most .c files.  percpu.h includes slab.h which
      in turn includes gfp.h making everything defined by the two files
      universally available and complicating inclusion dependencies.
      
      percpu.h -> slab.h dependency is about to be removed.  Prepare for
      this change by updating users of gfp and slab facilities include those
      headers directly instead of assuming availability.  As this conversion
      needs to touch large number of source files, the following script is
      used as the basis of conversion.
      
        http://userweb.kernel.org/~tj/misc/slabh-sweep.py
      
      The script does the followings.
      
      * Scan files for gfp and slab usages and update includes such that
        only the necessary includes are there.  ie. if only gfp is used,
        gfp.h, if slab is used, slab.h.
      
      * When the script inserts a new include, it looks at the include
        blocks and try to put the new include such that its order conforms
        to its surrounding.  It's put in the include block which contains
        core kernel includes, in the same order that the rest are ordered -
        alphabetical, Christmas tree, rev-Xmas-tree or at the end if there
        doesn't seem to be any matching order.
      
      * If the script can't find a place to put a new include (mostly
        because the file doesn't have fitting include block), it prints out
        an error message indicating which .h file needs to be added to the
        file.
      
      The conversion was done in the following steps.
      
      1. The initial automatic conversion of all .c files updated slightly
         over 4000 files, deleting around 700 includes and adding ~480 gfp.h
         and ~3000 slab.h inclusions.  The script emitted errors for ~400
         files.
      
      2. Each error was manually checked.  Some didn't need the inclusion,
         some needed manual addition while adding it to implementation .h or
         embedding .c file was more appropriate for others.  This step added
         inclusions to around 150 files.
      
      3. The script was run again and the output was compared to the edits
         from #2 to make sure no file was left behind.
      
      4. Several build tests were done and a couple of problems were fixed.
         e.g. lib/decompress_*.c used malloc/free() wrappers around slab
         APIs requiring slab.h to be added manually.
      
      5. The script was run on all .h files but without automatically
         editing them as sprinkling gfp.h and slab.h inclusions around .h
         files could easily lead to inclusion dependency hell.  Most gfp.h
         inclusion directives were ignored as stuff from gfp.h was usually
         wildly available and often used in preprocessor macros.  Each
         slab.h inclusion directive was examined and added manually as
         necessary.
      
      6. percpu.h was updated not to include slab.h.
      
      7. Build test were done on the following configurations and failures
         were fixed.  CONFIG_GCOV_KERNEL was turned off for all tests (as my
         distributed build env didn't work with gcov compiles) and a few
         more options had to be turned off depending on archs to make things
         build (like ipr on powerpc/64 which failed due to missing writeq).
      
         * x86 and x86_64 UP and SMP allmodconfig and a custom test config.
         * powerpc and powerpc64 SMP allmodconfig
         * sparc and sparc64 SMP allmodconfig
         * ia64 SMP allmodconfig
         * s390 SMP allmodconfig
         * alpha SMP allmodconfig
         * um on x86_64 SMP allmodconfig
      
      8. percpu.h modifications were reverted so that it could be applied as
         a separate patch and serve as bisection point.
      
      Given the fact that I had only a couple of failures from tests on step
      6, I'm fairly confident about the coverage of this conversion patch.
      If there is a breakage, it's likely to be something in one of the arch
      headers which should be easily discoverable easily on most builds of
      the specific arch.
      Signed-off-by: NTejun Heo <tj@kernel.org>
      Guess-its-ok-by: NChristoph Lameter <cl@linux-foundation.org>
      Cc: Ingo Molnar <mingo@redhat.com>
      Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
      5a0e3ad6
  11. 15 3月, 2010 1 次提交
  12. 25 2月, 2010 1 次提交
  13. 20 2月, 2010 1 次提交
  14. 01 2月, 2010 1 次提交
  15. 07 12月, 2009 1 次提交
  16. 04 11月, 2009 1 次提交
    • D
      drm/radeon/kms: fix coherency issues on AGP cards. · df67bed9
      Dave Airlie 提交于
      When we are evicting from VRAM->RAM we allocate the ttm object,
      but we don't set the caching policy on it before blitting into it.
      This means on AGP we end up blitting into cached pages, and
      the CPU later flushes out on top of them. This was mostly seen as
      font corruption.
      
      The other question is why we don't evict VRAM->GTT in a lot of cases,
      this would save us some cache transitions since a lot of objects
      that are evicted from VRAM will probably end up being pulled back in
      a few operations later, and evicting them to system memory involves
      2 unnecessary cache transitions.
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      df67bed9
  17. 27 8月, 2009 1 次提交
  18. 19 8月, 2009 2 次提交
  19. 29 7月, 2009 2 次提交
  20. 15 7月, 2009 1 次提交
  21. 24 6月, 2009 1 次提交
  22. 19 6月, 2009 1 次提交
  23. 15 6月, 2009 1 次提交
    • T
      drm: Add the TTM GPU memory manager subsystem. · ba4e7d97
      Thomas Hellstrom 提交于
      TTM is a GPU memory manager subsystem designed for use with GPU
      devices with various memory types (On-card VRAM, AGP,
      PCI apertures etc.). It's essentially a helper library that assists
      the DRM driver in creating and managing persistent buffer objects.
      
      TTM manages placement of data and CPU map setup and teardown on
      data movement. It can also optionally manage synchronization of
      data on a per-buffer-object level.
      
      TTM takes care to provide an always valid virtual user-space address
      to a buffer object which makes user-space sub-allocation of
      big buffer objects feasible.
      
      TTM uses a fine-grained per buffer-object locking scheme, taking
      care to release all relevant locks when waiting for the GPU.
      Although this implies some locking overhead, it's probably a big
      win for devices with multiple command submission mechanisms, since
      the lock contention will be minimal.
      
      TTM can be used with whatever user-space interface the driver
      chooses, including GEM. It's used by the upcoming Radeon KMS DRM driver
      and is also the GPU memory management core of various new experimental
      DRM drivers.
      Signed-off-by: NThomas Hellstrom <thellstrom@vmware.com>
      Signed-off-by: NJerome Glisse <jglisse@redhat.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      ba4e7d97