1. 05 5月, 2012 3 次提交
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  4. 30 4月, 2012 1 次提交
    • E
      ASoC: tlv312aic23: unbreak resume · e875c1e3
      Eric Bénard 提交于
      * commit f9dfbf91 "ASoC: tlv320aic23: convert to soc-cache" leads to
      a bug preventing resumeof the codec as regmap expects a 9 bits data
      register but 0xFFFF is passed in tlv320aic23_set_bias_level and this
      values gets cached preventing any write to the TLV320AIC23_PWR
      register as the final value produced by regmap is (register << 9) | value
      
      * this patch solves the problem by only working on the 9 bits the
      register contains.
      Signed-off-by: NEric Bénard <eric@eukrea.com>
      Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
      Cc: stable@vger.kernel.org
      e875c1e3
  5. 25 4月, 2012 1 次提交
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  15. 07 4月, 2012 7 次提交