1. 07 1月, 2006 4 次提交
    • C
      [PATCH] atomic_long_t & include/asm-generic/atomic.h V2 · d3cb4871
      Christoph Lameter 提交于
      Several counters already have the need to use 64 atomic variables on 64 bit
      platforms (see mm_counter_t in sched.h).  We have to do ugly ifdefs to fall
      back to 32 bit atomic on 32 bit platforms.
      
      The VM statistics patch that I am working on will also make more extensive
      use of atomic64.
      
      This patch introduces a new type atomic_long_t by providing definitions in
      asm-generic/atomic.h that works similar to the c "long" type.  Its 32 bits
      on 32 bit platforms and 64 bits on 64 bit platforms.
      
      Also cleans up the determination of the mm_counter_t in sched.h.
      Signed-off-by: NChristoph Lameter <clameter@sgi.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      d3cb4871
    • A
      [PATCH] kill last zone_reclaim() bits · 7756b9e4
      Andrew Morton 提交于
      Remove the last bits of Martin's ill-fated sys_set_zone_reclaim().
      
      Cc: Martin Hicks <mort@wildopensource.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      7756b9e4
    • A
      [PATCH] mm: kvaddr_to_nid not used in common code · 9f3fd602
      Andy Whitcroft 提交于
      kvaddr_to_nid() isn't used in common code nor in i386 code.  Remove these
      definitions.
      Signed-off-by: NAndy Whitcroft <apw@shadowen.org>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      9f3fd602
    • B
      [PATCH] madvise(MADV_REMOVE): remove pages from tmpfs shm backing store · f6b3ec23
      Badari Pulavarty 提交于
      Here is the patch to implement madvise(MADV_REMOVE) - which frees up a
      given range of pages & its associated backing store.  Current
      implementation supports only shmfs/tmpfs and other filesystems return
      -ENOSYS.
      
      "Some app allocates large tmpfs files, then when some task quits and some
      client disconnect, some memory can be released.  However the only way to
      release tmpfs-swap is to MADV_REMOVE". - Andrea Arcangeli
      
      Databases want to use this feature to drop a section of their bufferpool
      (shared memory segments) - without writing back to disk/swap space.
      
      This feature is also useful for supporting hot-plug memory on UML.
      
      Concerns raised by Andrew Morton:
      
      - "We have no plan for holepunching!  If we _do_ have such a plan (or
        might in the future) then what would the API look like?  I think
        sys_holepunch(fd, start, len), so we should start out with that."
      
      - Using madvise is very weird, because people will ask "why do I need to
        mmap my file before I can stick a hole in it?"
      
      - None of the other madvise operations call into the filesystem in this
        manner.  A broad question is: is this capability an MM operation or a
        filesytem operation?  truncate, for example, is a filesystem operation
        which sometimes has MM side-effects.  madvise is an mm operation and with
        this patch, it gains FS side-effects, only they're really, really
        significant ones."
      
      Comments:
      
      - Andrea suggested the fs operation too but then it's more efficient to
        have it as a mm operation with fs side effects, because they don't
        immediatly know fd and physical offset of the range.  It's possible to
        fixup in userland and to use the fs operation but it's more expensive,
        the vmas are already in the kernel and we can use them.
      
      Short term plan &  Future Direction:
      
      - We seem to need this interface only for shmfs/tmpfs files in the short
        term.  We have to add hooks into the filesystem for correctness and
        completeness.  This is what this patch does.
      
      - In the future, plan is to support both fs and mmap apis also.  This
        also involves (other) filesystem specific functions to be implemented.
      
      - Current patch doesn't support VM_NONLINEAR - which can be addressed in
        the future.
      Signed-off-by: NBadari Pulavarty <pbadari@us.ibm.com>
      Cc: Hugh Dickins <hugh@veritas.com>
      Cc: Andrea Arcangeli <andrea@suse.de>
      Cc: Michael Kerrisk <mtk-manpages@gmx.net>
      Cc: Ulrich Drepper <drepper@redhat.com>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      f6b3ec23
  2. 04 1月, 2006 1 次提交
  3. 03 1月, 2006 1 次提交
    • D
      [PATCH] Avoid namespace pollution in <asm/param.h> · abe842eb
      Dag-Erling Smrgrav 提交于
      In commit 3D59121003721a8fad11ee72e646fd9d3076b5679c, the x86 and x86-64
      <asm/param.h> was changed to include <linux/config.h> for the
      configurable timer frequency.
      
      However, asm/param.h is sometimes used in userland (it is included
      indirectly from <sys/param.h>), so your commit pollutes the userland
      namespace with tons of CONFIG_FOO macros.  This greatly confuses
      software packages (such as BusyBox) which use CONFIG_FOO macros
      themselves to control the inclusion of optional features.
      
      After a short exchange, Christoph approved this patch
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      abe842eb
  4. 18 11月, 2005 2 次提交
  5. 15 11月, 2005 2 次提交
  6. 14 11月, 2005 3 次提交
  7. 11 11月, 2005 1 次提交
    • A
      [PATCH] PCI: Change MSI to use physical delivery mode always · b4033c17
      Ashok Raj 提交于
      MSI hardcoded delivery mode to use logical delivery mode. Recently
      x86_64 moved to use physical mode addressing to support physflat mode.
      With this mode enabled noticed that my eth with MSI werent working.
      
      msi_address_init()  was hardcoded to use logical mode for i386 and x86_64.
      So when we switch to use physical mode, things stopped working.
      
      Since anyway we dont use lowest priority delivery with MSI, its always
      directed to just a single CPU. Its safe  and simpler to use
      physical mode always, even when we use logical delivery mode for IPI's
      or other ioapic RTE's.
      Signed-off-by: NAshok Raj <ashok.raj@intel.com>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      b4033c17
  8. 10 11月, 2005 1 次提交
  9. 07 11月, 2005 3 次提交
  10. 01 11月, 2005 1 次提交
  11. 31 10月, 2005 8 次提交
  12. 30 10月, 2005 3 次提交
  13. 29 10月, 2005 1 次提交
    • A
      [PATCH] USB: Always do usb-handoff · 478a3bab
      Alan Stern 提交于
      This revised patch (as586b) makes usb-handoff permanently true and no
      longer a kernel boot parameter.  It also removes the piix3_usb quirk code;
      that was nothing more than an early version of the USB handoff code
      (written at a time when Intel's PIIX3 was about the only motherboard with
      USB support).  And it adds identifiers for the three PCI USB controller
      classes to pci_ids.h.
      Signed-off-by: NAlan Stern <stern@rowland.harvard.edu>
      Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
      478a3bab
  14. 09 10月, 2005 1 次提交
  15. 01 10月, 2005 1 次提交
  16. 22 9月, 2005 1 次提交
  17. 13 9月, 2005 4 次提交
  18. 11 9月, 2005 2 次提交
    • A
      [PATCH] include/asm-i386/: "extern inline" -> "static inline" · e2afe674
      Adrian Bunk 提交于
      "extern inline" doesn't make much sense.
      Signed-off-by: NAdrian Bunk <bunk@stusta.de>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      e2afe674
    • I
      [PATCH] spinlock consolidation · fb1c8f93
      Ingo Molnar 提交于
      This patch (written by me and also containing many suggestions of Arjan van
      de Ven) does a major cleanup of the spinlock code.  It does the following
      things:
      
       - consolidates and enhances the spinlock/rwlock debugging code
      
       - simplifies the asm/spinlock.h files
      
       - encapsulates the raw spinlock type and moves generic spinlock
         features (such as ->break_lock) into the generic code.
      
       - cleans up the spinlock code hierarchy to get rid of the spaghetti.
      
      Most notably there's now only a single variant of the debugging code,
      located in lib/spinlock_debug.c.  (previously we had one SMP debugging
      variant per architecture, plus a separate generic one for UP builds)
      
      Also, i've enhanced the rwlock debugging facility, it will now track
      write-owners.  There is new spinlock-owner/CPU-tracking on SMP builds too.
      All locks have lockup detection now, which will work for both soft and hard
      spin/rwlock lockups.
      
      The arch-level include files now only contain the minimally necessary
      subset of the spinlock code - all the rest that can be generalized now
      lives in the generic headers:
      
       include/asm-i386/spinlock_types.h       |   16
       include/asm-x86_64/spinlock_types.h     |   16
      
      I have also split up the various spinlock variants into separate files,
      making it easier to see which does what. The new layout is:
      
         SMP                         |  UP
         ----------------------------|-----------------------------------
         asm/spinlock_types_smp.h    |  linux/spinlock_types_up.h
         linux/spinlock_types.h      |  linux/spinlock_types.h
         asm/spinlock_smp.h          |  linux/spinlock_up.h
         linux/spinlock_api_smp.h    |  linux/spinlock_api_up.h
         linux/spinlock.h            |  linux/spinlock.h
      
      /*
       * here's the role of the various spinlock/rwlock related include files:
       *
       * on SMP builds:
       *
       *  asm/spinlock_types.h: contains the raw_spinlock_t/raw_rwlock_t and the
       *                        initializers
       *
       *  linux/spinlock_types.h:
       *                        defines the generic type and initializers
       *
       *  asm/spinlock.h:       contains the __raw_spin_*()/etc. lowlevel
       *                        implementations, mostly inline assembly code
       *
       *   (also included on UP-debug builds:)
       *
       *  linux/spinlock_api_smp.h:
       *                        contains the prototypes for the _spin_*() APIs.
       *
       *  linux/spinlock.h:     builds the final spin_*() APIs.
       *
       * on UP builds:
       *
       *  linux/spinlock_type_up.h:
       *                        contains the generic, simplified UP spinlock type.
       *                        (which is an empty structure on non-debug builds)
       *
       *  linux/spinlock_types.h:
       *                        defines the generic type and initializers
       *
       *  linux/spinlock_up.h:
       *                        contains the __raw_spin_*()/etc. version of UP
       *                        builds. (which are NOPs on non-debug, non-preempt
       *                        builds)
       *
       *   (included on UP-non-debug builds:)
       *
       *  linux/spinlock_api_up.h:
       *                        builds the _spin_*() APIs.
       *
       *  linux/spinlock.h:     builds the final spin_*() APIs.
       */
      
      All SMP and UP architectures are converted by this patch.
      
      arm, i386, ia64, ppc, ppc64, s390/s390x, x64 was build-tested via
      crosscompilers.  m32r, mips, sh, sparc, have not been tested yet, but should
      be mostly fine.
      
      From: Grant Grundler <grundler@parisc-linux.org>
      
        Booted and lightly tested on a500-44 (64-bit, SMP kernel, dual CPU).
        Builds 32-bit SMP kernel (not booted or tested).  I did not try to build
        non-SMP kernels.  That should be trivial to fix up later if necessary.
      
        I converted bit ops atomic_hash lock to raw_spinlock_t.  Doing so avoids
        some ugly nesting of linux/*.h and asm/*.h files.  Those particular locks
        are well tested and contained entirely inside arch specific code.  I do NOT
        expect any new issues to arise with them.
      
       If someone does ever need to use debug/metrics with them, then they will
        need to unravel this hairball between spinlocks, atomic ops, and bit ops
        that exist only because parisc has exactly one atomic instruction: LDCW
        (load and clear word).
      
      From: "Luck, Tony" <tony.luck@intel.com>
      
         ia64 fix
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      Signed-off-by: NArjan van de Ven <arjanv@infradead.org>
      Signed-off-by: NGrant Grundler <grundler@parisc-linux.org>
      Cc: Matthew Wilcox <willy@debian.org>
      Signed-off-by: NHirokazu Takata <takata@linux-m32r.org>
      Signed-off-by: NMikael Pettersson <mikpe@csd.uu.se>
      Signed-off-by: NBenoit Boissinot <benoit.boissinot@ens-lyon.org>
      Signed-off-by: NAndrew Morton <akpm@osdl.org>
      Signed-off-by: NLinus Torvalds <torvalds@osdl.org>
      fb1c8f93