1. 25 4月, 2007 5 次提交
    • S
      IB/sa: Set src_path_bits correctly in ib_init_ah_from_path() · d0e7bb14
      Sean Hefty 提交于
      src_path_bits needs to mask off the base LID value.
      Signed-off-by: NSean Hefty <sean.hefty@intel.com>
      d0e7bb14
    • S
      IB/ucm: Simplify ib_ucm_event() · 9d41b7fd
      Sean Hefty 提交于
      Use wait_event_interruptible() instead of a more complicated
      open-coded equivalent.
      Signed-off-by: NSean Hefty <sean.hefty@intel.com>
      9d41b7fd
    • S
      RDMA/ucma: Simplify ucma_get_event() · d92f7644
      Sean Hefty 提交于
      Use wait_event_interruptible() instead of a more complicated
      open-coded equivalent.
      Signed-off-by: NSean Hefty <sean.hefty@intel.com>
      d92f7644
    • R
      IB/mthca: Simplify CQ cleaning in mthca_free_qp() · 30c00986
      Roland Dreier 提交于
      mthca_free_qp() already has local variables to hold the QP's send_cq
      and recv_cq, so we can slightly clean up the calls to mthca_cq_clean()
      by using those local variables instead of expressions like
      to_mcq(qp->ibqp.send_cq).
      
      Also, by cleaning the recv_cq first, we can avoid worrying about
      whether the QP is attached to an SRQ for the second call, because we
      would only clean send_cq if send_cq is not equal to recv_cq, and that
      means send_cq cannot have any receive completions from the QP being
      destroyed.
      
      All this work even improves the generated code a bit:
      
      add/remove: 0/0 grow/shrink: 0/1 up/down: 0/-5 (-5)
      function                                     old     new   delta
      mthca_free_qp                                510     505      -5
      Signed-off-by: NRoland Dreier <rolandd@cisco.com>
      30c00986
    • R
      IB/mthca: Fix mthca_write_mtt() on HCAs with hidden memory · 532c3b58
      Roland Dreier 提交于
      Commit b2875d4c ("IB/mthca: Always fill MTTs from CPU") causes a crash
      in mthca_write_mtt() with non-memfree HCAs that have their memory
      hidden (that is, have only two PCI BARs instead of having a third BAR
      that allows access to the RAM attached to the HCA) on 64-bit
      architectures.  This is because the commit just before, c20e20ab
      ("IB/mthca: Merge MR and FMR space on 64-bit systems") makes
      dev->mr_table.fmr_mtt_buddy equal to &dev->mr_table.mtt_buddy and
      hence mthca_write_mtt() tries to write directly into the HCA's MTT
      table.  However, since that table is in the HCA's memory, this is
      impossible without the PCI BAR that gives access to that memory.
      
      This causes a crash because mthca_tavor_write_mtt_seg() basically
      tries to dereference some offset of a NULL pointer.  Fix this by
      adding a test of MTHCA_FLAG_FMR in mthca_write_mtt() so that we always
      use the WRITE_MTT firmware command rather than writing directly if
      FMRs are not enabled.
      Signed-off-by: NRoland Dreier <rolandd@cisco.com>
      532c3b58
  2. 19 4月, 2007 35 次提交