- 28 9月, 2015 1 次提交
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由 Russell King 提交于
RiscPC fails to build if MMU is disabled: arch/arm/mach-rpc/ecard.c: In function 'ecard_init_pgtables': arch/arm/mach-rpc/ecard.c:229:2: error: implicit declaration of function 'pgd_offset' [-Werror=implicit-function-declaration] arrange for RiscPC to depend on MMU. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 11 9月, 2015 1 次提交
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由 Dave Young 提交于
There are two kexec load syscalls, kexec_load another and kexec_file_load. kexec_file_load has been splited as kernel/kexec_file.c. In this patch I split kexec_load syscall code to kernel/kexec.c. And add a new kconfig option KEXEC_CORE, so we can disable kexec_load and use kexec_file_load only, or vice verse. The original requirement is from Ted Ts'o, he want kexec kernel signature being checked with CONFIG_KEXEC_VERIFY_SIG enabled. But kexec-tools use kexec_load syscall can bypass the checking. Vivek Goyal proposed to create a common kconfig option so user can compile in only one syscall for loading kexec kernel. KEXEC/KEXEC_FILE selects KEXEC_CORE so that old config files still work. Because there's general code need CONFIG_KEXEC_CORE, so I updated all the architecture Kconfig with a new option KEXEC_CORE, and let KEXEC selects KEXEC_CORE in arch Kconfig. Also updated general kernel code with to kexec_load syscall. [akpm@linux-foundation.org: coding-style fixes] Signed-off-by: NDave Young <dyoung@redhat.com> Cc: Eric W. Biederman <ebiederm@xmission.com> Cc: Vivek Goyal <vgoyal@redhat.com> Cc: Petr Tesarik <ptesarik@suse.cz> Cc: Theodore Ts'o <tytso@mit.edu> Cc: Josh Boyer <jwboyer@fedoraproject.org> Cc: David Howells <dhowells@redhat.com> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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- 27 8月, 2015 1 次提交
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由 Russell King 提交于
Provide a software-based implementation of the priviledged no access support found in ARMv8.1. Userspace pages are mapped using a different domain number from the kernel and IO mappings. If we switch the user domain to "no access" when we enter the kernel, we can prevent the kernel from touching userspace. However, the kernel needs to be able to access userspace via the various user accessor functions. With the wrapping in the previous patch, we can temporarily enable access when the kernel needs user access, and re-disable it afterwards. This allows us to trap non-intended accesses to userspace, eg, caused by an inadvertent dereference of the LIST_POISON* values, which, with appropriate user mappings setup, can be made to succeed. This in turn can allow use-after-free bugs to be further exploited than would otherwise be possible. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 21 8月, 2015 1 次提交
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由 Benjamin Cama 提交于
Since v3.18, attempts to deliver IRQ0 are rejected, breaking orion5x. Fix this by increasing all interrupts by one, as did 5d6bed2a for dove. Also, force MULTI_IRQ_HANDLER for all orion platforms (including dove) as the specific handler is needed to shift back IRQ numbers by one. [gregory.clement@free-electrons.com]: moved the select MULTI_IRQ_HANDLER from PLAT_ORION_LEGACY to ARCH_ORION5X as it broke the build for dove. Fixes: a71b092a ("ARM: Convert handle_IRQ to use __handle_domain_irq") Signed-off-by: NBenjamin Cama <benoar@dolka.fr> Signed-off-by: NGregory CLEMENT <gregory.clement@free-electrons.com> Cc: <stable@vger.kernel.org> Tested-by: NDetlef Vollmann <dv@vollmann.ch>
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- 18 8月, 2015 1 次提交
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由 Stefan Agner 提交于
Add early fixmap support, initially to support permanent, fixed mapping support for early console. A temporary, early pte is created which is migrated to a permanent mapping in paging_init. This is also needed since the attributes may change as the memory types are initialized. The 3MiB range of fixmap spans two pte tables, but currently only one pte is created for early fixmap support. Re-add FIX_KMAP_BEGIN to the index calculation in highmem.c since the index for kmap does not start at zero anymore. This reverts 4221e2e6 ("ARM: 8031/1: fixmap: remove FIX_KMAP_BEGIN and FIX_KMAP_END") to some extent. Cc: Mark Salter <msalter@redhat.com> Cc: Kees Cook <keescook@chromium.org> Cc: Laura Abbott <lauraa@codeaurora.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: NRob Herring <robh@kernel.org> Signed-off-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 03 8月, 2015 1 次提交
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由 Mark Rutland 提交于
Now that the common PSCI client code has been factored out to drivers/firmware, and made safe for 32-bit use, move the 32-bit ARM code over to it. This results in a moderate reduction of duplicated lines, and will prevent further duplication as the PSCI client code is updated for PSCI 1.0 and beyond. The two legacy platform users of the PSCI invocation code are updated to account for interface changes. In both cases the power state parameter (which is constant) is now generated using macros, so that the pack/unpack logic can be killed in preparation for PSCI 1.0 power state changes. Signed-off-by: NMark Rutland <mark.rutland@arm.com> Acked-by: NRob Herring <robh@kernel.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Ashwin Chaugule <ashwin.chaugule@linaro.org> Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: NWill Deacon <will.deacon@arm.com>
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- 31 7月, 2015 1 次提交
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由 Mark Rutland 提交于
To enable sharing of the arm_pmu code with arm64, this patch factors it out to drivers/perf/. A new drivers/perf directory is added for performance monitor drivers to live under. MAINTAINERS is updated accordingly. Files added previously without a corresponsing MAINTAINERS update (perf_regs.c, perf_callchain.c, and perf_event.h) are also added. Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Peter Zijlstra <a.p.zijlstra@chello.nl> Cc: Russell King <linux@arm.linux.org.uk> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by: NMark Rutland <mark.rutland@arm.com> [will: augmented Kconfig help slightly] Signed-off-by: NWill Deacon <will.deacon@arm.com>
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- 17 7月, 2015 1 次提交
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由 H Hartley Sweeten 提交于
The ARM_PATCH_PHYS_VIRT option makes the ep93xx memory configuration options obsolete. This allows support for all the ep93xx variations to be built into a single kernel. Signed-off-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 08 7月, 2015 1 次提交
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由 Linus Walleij 提交于
This switches the EP93xx to use GENERIC_CLOCKEVENTS and CLKSRC_MMIO. Also implements a sched_clock() hook. Tested on the SIM.ONE. Use only oneshot events. Tested-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: NLinus Walleij <linus.walleij@linaro.org>
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- 29 6月, 2015 1 次提交
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由 Russell King 提交于
Add some help text for the HIGHPTE configuration entry. This comes from the x86 entry, but reworded to be more a more accurate description of what this option does. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 02 6月, 2015 1 次提交
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由 Sudeep Holla 提交于
The ARM Dual-Timer SP804 module is peripheral found not only on ARM32 platforms but also on ARM64 platforms. This patch moves the driver out of arch/arm to driver/clocksource so that it can be used on ARM64 platforms also. Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Rob Herring <robh@kernel.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Olof Johansson <olof@lixom.net> Acked-by: NThomas Gleixner <tglx@linutronix.de> Signed-off-by: NSudeep Holla <sudeep.holla@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 01 6月, 2015 1 次提交
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由 Maxime Coquelin 提交于
STM32 clocksource driver needs to be selected if ARCH_STM32. Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 30 5月, 2015 1 次提交
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由 Gregory Fong 提交于
Out of the brcmstb SoCs that I know, BCM3390 has the largest numbers of GPIOs, with its - 320 "peripheral" GPIOs - 5*32 = 160 UPG GPIOs (counting unused lines, which do get counted) - 2*32 = 64 UPG AON GPIOs (counting unused lines) Total: 544 I suspect that the upper limit will only need to be higher in the future, so set it to 1024. Signed-off-by: NGregory Fong <gregory.0xf0@gmail.com> Signed-off-by: NFlorian Fainelli <f.fainelli@gmail.com>
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- 28 5月, 2015 4 次提交
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由 Borislav Petkov 提交于
So first of all, this atomic_scrub() function's naming is bad. It looks like an atomic_t helper. Change it to edac_atomic_scrub(). The bigger problem is that this function is arch-specific and every new arch which doesn't necessarily need that functionality still needs to define it, otherwise EDAC doesn't compile. So instead of doing that and including arch-specific headers, have each arch define an EDAC_ATOMIC_SCRUB symbol which can be used in edac_mc.c for ifdeffery. Much cleaner. And we already are doing this with another symbol - EDAC_SUPPORT. This is also much cleaner than having CONFIG_EDAC enumerate all the arches which need/have EDAC support and drivers. This way I can kill the useless edac.h header in tile too. Acked-by: NRalf Baechle <ralf@linux-mips.org> Acked-by: NMichael Ellerman <mpe@ellerman.id.au> Acked-by: NChris Metcalf <cmetcalf@ezchip.com> Acked-by: NIngo Molnar <mingo@kernel.org> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Doug Thompson <dougthompson@xmission.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linuxppc-dev@lists.ozlabs.org Cc: "Maciej W. Rozycki" <macro@codesourcery.com> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Mauro Carvalho Chehab <mchehab@osg.samsung.com> Cc: Paul Mackerras <paulus@samba.org> Cc: "Steven J. Hill" <Steven.Hill@imgtec.com> Cc: x86@kernel.org Signed-off-by: NBorislav Petkov <bp@suse.de>
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由 Arnd Bergmann 提交于
Kprobes, irqflags tracing and kexec don't currently build on kernels targetting ARMv7-M, so for now, we should just disallow those combinations. Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Arnd Bergmann 提交于
KGDB requires code patching, which only works on little-endian or newer big-endian (BE8) machines but not on the older big-endian ones (BE32) where it results in this build error: arch/arm/kernel/patch.c: In function '__patch_text_real': arch/arm/kernel/patch.c:93:4: error: implicit declaration of function '__opcode_to_mem_thumb32' [-Werror=implicit-function-declaration] insn = __opcode_to_mem_thumb32(insn); This adds a Kconfig dependency to avoid the broken case and for all other symbols that require code patching. Fixes: 23a4e405 ("arm: kgdb: Handle read-only text / modules") Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Arnd Bergmann 提交于
Any SMP kernel now requires the irq_work code after generic_smp_call_function_single_interrupt() started using it, or we get: kernel/built-in.o: In function `flush_smp_call_function_queue': :(.text+0x4dc3a): undefined reference to `irq_work_run' Fixes: 47885016 ("irq_work: Implement remote queueing") Signed-off-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 22 5月, 2015 1 次提交
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由 Stefan Agner 提交于
Use the new config symbol ARM_SINGLE_ARMV7M which groups config symbols used by modern ARMv7-M platforms. This allows supporting multiple ARMv7-M platforms in one kernel image. However, a common kernel image requires the combined platforms to share the same main memory layout to be bootable. Signed-off-by: NStefan Agner <stefan@agner.ch> Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by: NJoachim Eastwood <manabian@gmail.com> Acked-by: NMaxime Coquelin <maxime.coquelin@st.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 21 5月, 2015 3 次提交
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由 Stefan Agner 提交于
This introduces a new top level config symbol ARM_SINGLE_ARMV7M for non-MMU, ARMv7-M platforms. It also support multiple ARMv7-M platforms in one kernel image since the cores share the same basic memory layout and interrupt controller. However, this works only if the combined platforms also have a similar (main) memory layout. Signed-off-by: NStefan Agner <stefan@agner.ch> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Tony Lindgren 提交于
Change interrupt numbering for sparse IRQ. We do this using a fixed offset until we can drop irqs.h once all it's users have been updated. Note that this depends on the GPIO fix for the MPUIO IRQs "gpio: omap: Fix regression for MPUIO interrupts". Also note that this patch adds some extra irq alloc warnings that will go away when we stop calling irq_alloc_descs in gpio-omap.c with a follow-up patch. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Tony Lindgren 提交于
This allows us to get a bit further with SPARSE_IRQ and MULTIARCH support. Note that we now also rename omap_irq_flags to omap_l2_irq as that's the omap_irq_flags naming is confusing. It just contains the interrupt number for the l2 irq. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 16 5月, 2015 3 次提交
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由 Jun Nie 提交于
Add basic code for ZTE ZX296702 platform. [arnd: removed unused zx296702_init_machine function, and changed l2c aux val to default] Signed-off-by: NJun Nie <jun.nie@linaro.org> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Joachim Eastwood 提交于
Add support for NXP's LPC18xx (Cortex-M3) and LPC43xx (Cortex-M4) SoCs. These SoCs are NXP's high preformance MCU line and can run at clock speeds up to 180 MHz for LPC18xx and 204 MHz for LPC43xx. LPC43xx is more or less a LPC18xx with a Cortex-M4F core and a few extra peripherals. The LPC43xx series also features one or two Cortex-M0 cores that can be used to offload the main M4 core. Signed-off-by: NJoachim Eastwood <manabian@gmail.com> Reviewed-by: NEzequiel Garcia <ezequiel@vanguardiasur.com.ar> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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由 Maxime Coquelin 提交于
STMicrolectronics's STM32 series is a family of Cortex-M microcontrollers. It is used in various applications, and proposes a wide range of peripherals. Tested-by: NChanwoo Choi <cw00.choi@samsung.com> Signed-off-by: NMaxime Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 13 5月, 2015 2 次提交
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由 Robert Jarzmik 提交于
Transition the PXA25x, PXA27x and PXA3xx CPUs to the clock framework. This transition still enables legacy platforms to run without device tree as before, ie relying on platform data encoded in board specific files. This is the last step of clock framework transition for pxa platforms. It was tested on lubbock (pxa25x), mioa701 (pxa27x) and zylonite (pxa3xx). Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
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由 Robert Jarzmik 提交于
Transition the PXA25x and PXA27x CPUs to the clock framework. This transition still enables legacy platforms to run without device tree as before, ie relying on platform data encoded in board specific files. The transition breaks the previous clocks activation of pin control (gpio11 and gpio12). Machine files should be amended to take that into account. This is the last step of clock framework transition for pxa25x and pxa27x, leaving only pxa3xx for further work. Reviewed-by: NMichael Turquette <mturquette@linaro.org> Signed-off-by: NRobert Jarzmik <robert.jarzmik@free.fr>
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- 12 5月, 2015 1 次提交
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由 Masahiro Yamada 提交于
Initial commit for a new SoC family, UniPhier, developed by Socionext Inc. (formerly, System LSI Business Division of Panasonic Corporation). This commit includes a minimal set of components for booting the kernel, including SMP support. Signed-off-by: NMasahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 08 5月, 2015 1 次提交
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由 Ard Biesheuvel 提交于
Loading modules far away from the kernel in memory is problematic because the 'bl' instruction only has limited reach, and modules are not built with PLTs. Instead of using the -mlong-calls option (which affects all compiler emitted bl instructions, but not the ones in assembler), this patch allocates some additional space at module load time, and populates it with PLT like veneers when encountering relocations that are out of range. This should work with all relocations against symbols exported by the kernel, including those resulting from GCC generated implicit function calls for ftrace etc. The module memory size increases by about 5% on average, regardless of whether any PLT entries were actually needed. However, due to the page based rounding that occurs when allocating module memory, the average memory footprint increase is negligible. Reviewed-by: NNicolas Pitre <nico@linaro.org> Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 15 4月, 2015 5 次提交
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由 Kees Cook 提交于
This fixes the "offset2lib" weakness in ASLR for arm, arm64, mips, powerpc, and x86. The problem is that if there is a leak of ASLR from the executable (ET_DYN), it means a leak of shared library offset as well (mmap), and vice versa. Further details and a PoC of this attack is available here: http://cybersecurity.upv.es/attacks/offset2lib/offset2lib.html With this patch, a PIE linked executable (ET_DYN) has its own ASLR region: $ ./show_mmaps_pie 54859ccd6000-54859ccd7000 r-xp ... /tmp/show_mmaps_pie 54859ced6000-54859ced7000 r--p ... /tmp/show_mmaps_pie 54859ced7000-54859ced8000 rw-p ... /tmp/show_mmaps_pie 7f75be764000-7f75be91f000 r-xp ... /lib/x86_64-linux-gnu/libc.so.6 7f75be91f000-7f75beb1f000 ---p ... /lib/x86_64-linux-gnu/libc.so.6 7f75beb1f000-7f75beb23000 r--p ... /lib/x86_64-linux-gnu/libc.so.6 7f75beb23000-7f75beb25000 rw-p ... /lib/x86_64-linux-gnu/libc.so.6 7f75beb25000-7f75beb2a000 rw-p ... 7f75beb2a000-7f75beb4d000 r-xp ... /lib64/ld-linux-x86-64.so.2 7f75bed45000-7f75bed46000 rw-p ... 7f75bed46000-7f75bed47000 r-xp ... 7f75bed47000-7f75bed4c000 rw-p ... 7f75bed4c000-7f75bed4d000 r--p ... /lib64/ld-linux-x86-64.so.2 7f75bed4d000-7f75bed4e000 rw-p ... /lib64/ld-linux-x86-64.so.2 7f75bed4e000-7f75bed4f000 rw-p ... 7fffb3741000-7fffb3762000 rw-p ... [stack] 7fffb377b000-7fffb377d000 r--p ... [vvar] 7fffb377d000-7fffb377f000 r-xp ... [vdso] The change is to add a call the newly created arch_mmap_rnd() into the ELF loader for handling ET_DYN ASLR in a separate region from mmap ASLR, as was already done on s390. Removes CONFIG_BINFMT_ELF_RANDOMIZE_PIE, which is no longer needed. Signed-off-by: NKees Cook <keescook@chromium.org> Reported-by: NHector Marco-Gisbert <hecmargi@upv.es> Cc: Russell King <linux@arm.linux.org.uk> Reviewed-by: NIngo Molnar <mingo@kernel.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Alexander Viro <viro@zeniv.linux.org.uk> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: "David A. Long" <dave.long@linaro.org> Cc: Andrey Ryabinin <a.ryabinin@samsung.com> Cc: Arun Chandran <achandran@mvista.com> Cc: Yann Droneaud <ydroneaud@opteya.com> Cc: Min-Hua Chen <orca.chen@gmail.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Alex Smith <alex@alex-smith.me.uk> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Vineeth Vijayan <vvijayan@mvista.com> Cc: Jeff Bailey <jeffbailey@google.com> Cc: Michael Holzheu <holzheu@linux.vnet.ibm.com> Cc: Ben Hutchings <ben@decadent.org.uk> Cc: Behan Webster <behanw@converseincode.com> Cc: Ismael Ripoll <iripoll@upv.es> Cc: Jan-Simon Mller <dl9pf@gmx.de> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Kees Cook 提交于
When an architecture fully supports randomizing the ELF load location, a per-arch mmap_rnd() function is used to find a randomized mmap base. In preparation for randomizing the location of ET_DYN binaries separately from mmap, this renames and exports these functions as arch_mmap_rnd(). Additionally introduces CONFIG_ARCH_HAS_ELF_RANDOMIZE for describing this feature on architectures that support it (which is a superset of ARCH_BINFMT_ELF_RANDOMIZE_PIE, since s390 already supports a separated ET_DYN ASLR from mmap ASLR without the ARCH_BINFMT_ELF_RANDOMIZE_PIE logic). Signed-off-by: NKees Cook <keescook@chromium.org> Cc: Hector Marco-Gisbert <hecmargi@upv.es> Cc: Russell King <linux@arm.linux.org.uk> Reviewed-by: NIngo Molnar <mingo@kernel.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: Michael Ellerman <mpe@ellerman.id.au> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Alexander Viro <viro@zeniv.linux.org.uk> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Andy Lutomirski <luto@amacapital.net> Cc: "David A. Long" <dave.long@linaro.org> Cc: Andrey Ryabinin <a.ryabinin@samsung.com> Cc: Arun Chandran <achandran@mvista.com> Cc: Yann Droneaud <ydroneaud@opteya.com> Cc: Min-Hua Chen <orca.chen@gmail.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Alex Smith <alex@alex-smith.me.uk> Cc: Markos Chandras <markos.chandras@imgtec.com> Cc: Vineeth Vijayan <vvijayan@mvista.com> Cc: Jeff Bailey <jeffbailey@google.com> Cc: Michael Holzheu <holzheu@linux.vnet.ibm.com> Cc: Ben Hutchings <ben@decadent.org.uk> Cc: Behan Webster <behanw@converseincode.com> Cc: Ismael Ripoll <iripoll@upv.es> Cc: Jan-Simon Mller <dl9pf@gmx.de> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Kirill A. Shutemov 提交于
We would want to use number of page table level to define mm_struct. Let's expose it as CONFIG_PGTABLE_LEVELS. Signed-off-by: NKirill A. Shutemov <kirill.shutemov@linux.intel.com> Cc: Russell King <linux@arm.linux.org.uk> Tested-by: NGuenter Roeck <linux@roeck-us.net> Signed-off-by: NAndrew Morton <akpm@linux-foundation.org> Signed-off-by: NLinus Torvalds <torvalds@linux-foundation.org>
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由 Russell King 提交于
This errata covers all r1 variants of Cortex A8, it's not limited to just r1p0..r1p2. Update the documentation to reflect this. The code already applies the workaround to all r1p* A8 CPUs. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
The effects of not having ARM errata 643719 enabled on affected CPUs can be very confusing and hard to debug. Rather than leave this to chance, enable this workaround by default. Now that we have rearranged the code, it should have a low impact on the majority of CPUs. Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Reviewed-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 13 4月, 2015 1 次提交
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由 Richard Weinberger 提交于
The RISC OS personality seems to be unused and untested for a long time. It is doubtful whether this personality worked ever as expected. Let's rip it out. Signed-off-by: NRichard Weinberger <richard@nod.at> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 02 4月, 2015 1 次提交
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由 Geert Uytterhoeven 提交于
Several interrupt controllers support both edge and level interrupts, so it's useful to provide that information in /proc/interrupts. Signed-off-by: NGeert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 28 3月, 2015 1 次提交
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由 Stephen Boyd 提交于
The maintainers for mach-msm no longer have any plans to support or test the platforms supported by this architecture[1]. Most likely there aren't any active users of this code anyway, so let's delete it. [1] http://lkml.kernel.org/r/20150307031212.GA8434@fifo99.com Cc: David Brown <davidb@codeaurora.org> Cc: Bryan Huntsman <bryanh@codeaurora.org> Cc: Daniel Walker <dwalker@fifo99.com> Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NKumar Gala <galak@codeaurora.org>
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- 19 3月, 2015 2 次提交
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由 Alexandre Belloni 提交于
Drop AT91_TIMER_HZ as this can be handled using HZ_FIXED. Initial help message was: On AT91rm9200 chips where you're using a system clock derived from the 32768 Hz hardware clock, this tick rate should divide it exactly: use a power-of-two value, such as 128 or 256, to reduce timing errors caused by rounding. Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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由 Alexandre Belloni 提交于
Switch AT91 to multiplatform as all SoCs are properly handled. Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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- 16 3月, 2015 1 次提交
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由 Tsahee Zidenberg 提交于
This patch introduces initial architecture and device-tree support. Signed-off-by: NSaeed Bishara <saeed@annapurnalabs.com> Signed-off-by: NTsahee Zidenberg <tsahee@annapurnalabs.com> Acked-by: NArnd Bergmann <arnd@arndb.de> Signed-off-by: NArnd Bergmann <arnd@arndb.de>
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- 13 3月, 2015 1 次提交
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由 Boris BREZILLON 提交于
Add new structures and functions to handle AT91 SoC detection. [alexandre.belloni@free-electrons.com: reworked DBGU detection] Signed-off-by: NAlexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: NBoris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: NNicolas Ferre <nicolas.ferre@atmel.com>
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