- 16 2月, 2011 1 次提交
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由 Russell King 提交于
Since the debug macros no longer depend on the machine type information, the machine type lookup can be deferred to setup_arch() in setup.c which simplifies the code somewhat. We also move the __error_a functionality into setup.c for displaying a message when a bad machine ID is passed to the kernel via the LL debug code. We also log this into the kernel ring buffer which makes it possible to retrieve the message via a debugger. Original idea from Grant Likely. Acked-by: NGrant Likely <grant.likely@secretlab.ca> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 15 1月, 2011 1 次提交
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由 Dima Zavin 提交于
Do not use memory bank info to request the "system ram" resources as they do not track holes created by memblock_remove inside machine's reserve callback. If the removed memory is passed as platform_device's ioresource, then drivers that call request_mem_region would fail due to a conflict with the incorrectly configured system ram resource. Instead, iterate through the regions of memblock.memory and add those as "System RAM" resources. Signed-off-by: NDima Zavin <dima@android.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 12 1月, 2011 1 次提交
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由 Alexander Holler 提交于
When CONFIG_CMDLINE_FORCE is used, the warning Ignoring unrecognised tag 0x54410009 was displayed. Change this to Ignoring tag cmdline (using the default kernel command line) Signed-off-by: NAlexander Holler <holler@ahsoftware.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 24 12月, 2010 3 次提交
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由 Russell King 提交于
This allows platforms to hook into the initialization early to setup things like scheduler clocks, etc. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Rather than storing each machine init hook separately, store a pointer to the machine description record and dereference this instead. This pointer is only available while the init sections are present, which is not a problem as we only use it from init code. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 eric miao 提交于
Normally different ARM platform has different way to decode the IRQ hardware status and demultiplex to the corresponding IRQ handler. This is highly optimized by macro irq_handler in entry-armv.S, and each machine defines their own macro to decode the IRQ number. However, this prevents multiple machine classes to be built into a single kernel. By allowing each machine to specify thier own handler, and making function pointer 'handle_arch_irq' to point to it at run time, this can be solved. And introduce CONFIG_MULTI_IRQ_HANDLER to allow both solutions to work. Comparing with the highly optimized macro of irq_handler, the new function must be written with care not to lose too much performance. And the IPI stuff on SMP is expected to move to the provided arch IRQ handler as well. The assembly code to invoke handle_arch_irq is optimized by Russell King. Signed-off-by: NEric Miao <eric.miao@canonical.com> Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 05 12月, 2010 1 次提交
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 08 10月, 2010 2 次提交
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由 Russell King 提交于
Use _sdata as the start of the data section, rather than _data. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Linus Walleij 提交于
The kernel does not compile for my ARM926EJ-S system U300 due to the isb instruction inserted in generic assember statement from commit 8925ec4c, "ARM: 6385/1: setup: detect aliasing I-cache when D-cache is non-aliasing" hey the isb is only available when assembling for v7 so let's use the generic isb() macro from setup.h instead. Acked-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 05 10月, 2010 2 次提交
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由 Will Deacon 提交于
Currently, the Kernel assumes that if a CPU has a non-aliasing D-cache then the I-cache is also non-aliasing. This may not be true on ARM cores from v6 onwards, which may have aliasing I-caches but non-aliasing D-caches. This patch adds a cpu_has_aliasing_icache function, which is called from cacheid_init and adds CACHEID_VIPT_I_ALIASING to the cacheid when appropriate. A utility macro, icache_is_vipt_aliasing(), is also provided. Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
UP systems do not implement all the instructions that SMP systems have, so in order to boot a SMP kernel on a UP system, we need to rewrite parts of the kernel. Do this using an 'alternatives' scheme, where the kernel code and data is modified prior to initialization to replace the SMP instructions, thereby rendering the problematical code ineffectual. We use the linker to generate a list of 32-bit word locations and their replacement values, and run through these replacements when we detect a UP system. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 27 7月, 2010 2 次提交
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由 Russell King 提交于
Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 16 7月, 2010 1 次提交
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由 Russell King 提交于
Everything should now be using sparsemem rather than discontigmem, so remove the code supporting discontigmem from ARM. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 09 7月, 2010 4 次提交
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由 Mika Westerberg 提交于
This parameter is used by primary kernel to pass address of vmcore header to the dump capture kernel. Signed-off-by: NMika Westerberg <ext-mika.1.westerberg@nokia.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Mika Westerberg 提交于
Implemented ARM support for command line option "crashkernel=size@start" which allows user to reserve some memory for a dump capture kernel. Signed-off-by: NMika Westerberg <ext-mika.1.westerberg@nokia.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Tony Lindgren 提交于
The TLS register is only available on ARM1136 r1p0 and later. Set HWCAP_TLS flags if hardware TLS is available and test for it if CONFIG_CPU_32v6K is not set for V6. Note that we set the TLS instruction in __kuser_get_tls dynamically as suggested by Jamie Lokier <jamie@shareable.org>. Also the __switch_to code is optimized out in most cases as suggested by Nicolas Pitre <nico@fluxnic.net>. Reviewed-by: NNicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 eric miao 提交于
So to allow NR_IRQS to be dynamic and platforms to specify the number of IRQs really needed. Acked-by: NPaul Mundt <lethal@linux-sh.org> Signed-off-by: NEric Miao <eric.y.miao@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 07 7月, 2010 1 次提交
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由 Uwe Kleine-König 提交于
This was deprecated in 2001 and announced to live on for 5 years. For now provide a kernel parameter for those who still need it. Acked-by: NEric Miao <eric.miao@canonical.com> Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de>
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- 25 5月, 2010 1 次提交
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由 Alexander Holler 提交于
Add an option to force usage of the in-kernel cmdline even if the boot loader passes another command string to the kernel. Useful if someone cannot or don't want to change the command-line options of the boot loader but is able to change the kernel. Signed-off-by: NAlexander Holler <holler@ahsoftware.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 19 2月, 2010 1 次提交
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由 Santosh Shilimkar 提交于
The 'outer_cache' variable is needed by the outer_inv_range(), outer_clean_range() and outer_flush_range() functions, which are declared as inline in asm/cacheflush.h. Otherwise drivers built as a loadable module, which access these functions, will have an undefined symbol. Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 16 2月, 2010 3 次提交
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由 Jeremy Kerr 提交于
drivers/of/fdt expects a cmd_line symbol, while arm uses command_line. Change to the former, so that we can eventually share with the fdt code. Signed-off-by: NJeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Jeremy Kerr 提交于
The ARM setup code includes its own parser for early params, there's also one in the generic init code. This patch removes __early_init (and related code) from arch/arm/kernel/setup.c, and changes users to the generic early_init macro instead. The generic macro takes a char * argument, rather than char **, so we need to update the parser functions a little. Signed-off-by: NJeremy Kerr <jeremy.kerr@canonical.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Always creating this directory avoids other users having to jump through silly hoops when they want to share this directory. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 16 9月, 2009 1 次提交
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由 Linus Walleij 提交于
This adds the TCM interface to Linux, when active, it will detect and report TCM memories and sizes early in boot if present, introduce generic TCM memory handling, provide a generic TCM memory pool and select TCM memory for the U300 platform. See the Documentation/arm/tcm.txt for documentation. Signed-off-by: NLinus Walleij <linus.walleij@stericsson.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 24 7月, 2009 1 次提交
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由 Catalin Marinas 提交于
This patch implements the ARM/Thumb-2 unified kernel start-up and exception handling code. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
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- 03 3月, 2009 1 次提交
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由 Catalin Marinas 提交于
The cacheid_init() function assumes that if cpu_architecture() returns 7, the caches are VIPT_NONALIASING. The cpu_architecture() function returns the version of the supported MMU features (e.g. TEX remapping) but it doesn't make any assumptions about the cache type. The patch adds the checking of the Cache Type Register for the ARMv7 format. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 19 2月, 2009 1 次提交
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由 Catalin Marinas 提交于
This patch adds the main functionality for parsing the stack unwinding information generated by the ARM EABI toolchains. The unwinding information consists of an index with a pair of words per function and a table with unwinding instructions. For more information, see "Exception Handling ABI for the ARM Architecture" at: http://infocenter.arm.com/help/topic/com.arm.doc.subset.swdev.abi/index.htmlSigned-off-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 12 2月, 2009 1 次提交
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由 Catalin Marinas 提交于
The VFPv3D16 is a VFPv3 CPU configuration where only 16 double registers are present, as the VFPv2 configuration. This patch adds the corresponding hwcap bits so that applications or debuggers have more information about the supported features. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 01 12月, 2008 1 次提交
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由 Russell King 提交于
Update to use the asm/sections.h header rather than declaring these symbols ourselves. Change __data_start to _data to conform with the naming found within asm/sections.h. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 28 11月, 2008 1 次提交
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由 Nicolas Pitre 提交于
Currently there are two instances of struct meminfo: one in kernel/setup.c marked __initdata, and another in mm/init.c with permanent storage. Let's keep only the later to directly populate the permanent version from arm_add_memory(). Also move common validation tests between the MMU and non-MMU cases into arm_add_memory() to remove some duplication. Protection against overflowing the membank array is also moved in there in order to cover the kernel cmdline parsing path as well. Signed-off-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 06 11月, 2008 2 次提交
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由 Catalin Marinas 提交于
Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
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由 Catalin Marinas 提交于
This part was missed in the initial patch adding ThumbEE support. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com>
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- 03 10月, 2008 1 次提交
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由 Nicolas Pitre 提交于
There is no point converting memory bank addresses from physical to virtual just to convert them back to physical addresses. Furthermore this isn't "right" for highmem even if in this case the end result is the correct one. Signed-off-by: NNicolas Pitre <nico@marvell.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 01 10月, 2008 1 次提交
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由 Russell King 提交于
There's no point scattering this around the tree, the parsing of the parameter might as well live beside the code which uses it. That also means we can make vmalloc_reserve a static variable. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 25 9月, 2008 3 次提交
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由 Russell King 提交于
This replaces the original cache type decoding printks. We now indicate how we're treating the cache which we found, rather than what we found. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Rather than trying to (inaccurately) decode the cache type from the registers each time we need to decide what type of cache we have, use a bitmask initialized early during boot. Since the setup is a one-off initialization, we can be a little more clever and take account of the CPU architecture as well. Note that we continue to achieve the compactness on optimised kernels by forcing tests to always-false or always-true as appropriate, thereby allowing the compiler to do build-time code elimination. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
The cache type register found in ARMv5 and later CPUs changes format and meaning depending on the CPU architecture version. Currently, this code: a) doesn't work for everything - Xscale's are identified as 'unknown 5'. b) is not able to tell whether the caches are VIVT or VIPT from the cache type. c) prints rubbish on some ARMv6 and ARMv7+ CPUs. The two solutions to this are: 1. Add yet more code to decode and print the various different register formats. 2. Remove the code altogther. The code only exists to decode and print the cache parameters. Increasing the complexity of it just for the sake of a few prinks isn't worth it. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 06 9月, 2008 2 次提交
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由 Russell King 提交于
... some of which are now in linux/*.h headers. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
This quietens some sparse warnings about phys_initrd_start and phys_initrd_size. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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