1. 18 9月, 2015 3 次提交
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      dmaengine: Add support for the Analog Devices AXI-DMAC DMA controller · 0e3b67b3
      Lars-Peter Clausen 提交于
      Add support for the Analog Devices AXI-DMAC DMA controller. This controller
      is a soft peripheral that can be instantiated in a FPGA and is often used
      in Analog Devices' reference designs for FPGA platforms.
      
      The peripheral has various configuration options that can be selected at
      synthesis time and influence the supported features of the instantiated
      peripheral, those options are represented as device-tree properties to
      allow the driver to behave accordingly.
      
      The peripheral has a zero latency architecture, which means it is possible
      to switch from one to the next descriptor without any delay. This is
      archived by having a internal queue which can hold multiple descriptors.
      The driver supports this, which means it will submit new descriptors
      directly to the hardware until the queue is full and not wait for a
      descriptor to complete before the next one is submitted. Interrupts are
      used for the descriptor queue flow control.
      
      Currently the driver supports SG, cyclic and interleaved slave DMA.
      Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
      Signed-off-by: NVinod Koul <vinod.koul@intel.com>
      0e3b67b3
  13. 21 8月, 2015 3 次提交
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  18. 11 8月, 2015 6 次提交