- 25 9月, 2015 1 次提交
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由 Kishon Vijay Abraham I 提交于
"ARM: dts: <omap2/omap4/omap5/dra7>: add minimal l4 bus layout with control module support" moved pbias_regulator dt node from being a child node of ocp to be the child node of 'syscon'. Since 'syscon' doesn't have the 'ranges' property, address translation fails while trying to convert the address to resource. Fix it here by populating 'ranges' property in syscon dt node. Fixes: 72b10ac0 ("ARM: dts: omap24xx: add minimal l4 bus layout with control module support") Fixes: 7415b0b4 ("ARM: dts: omap4: add minimal l4 bus layout with control module support") Fixes: ed8509ed ("ARM: dts: omap5: add minimal l4 bus layout with control module support") Fixes: d919501f ("ARM: dts: dra7: add minimal l4 bus layout with control module support") Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> [tony@atomide.com: fixed omap3 pbias to work] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 15 9月, 2015 2 次提交
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由 Vishal Mahaveer 提交于
Register address in name of the node is wrong Signed-off-by: NVishal Mahaveer <vishalm@ti.com> Acked-by: NMugunthan V N <mugunthanvnm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Kishon Vijay Abraham I 提交于
Use platform specific compatible strings instead of the common "ti,pbias-omap" compatible string. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 14 8月, 2015 1 次提交
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由 Mugunthan V N 提交于
CPSW driver has been updated with compatibles for enabling errata workarounds. So updating cpsw compatibles. Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NDavid S. Miller <davem@davemloft.net>
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- 12 8月, 2015 1 次提交
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由 Kishon Vijay Abraham I 提交于
gpio2_8 is connected to the PCIe_RESETn line and it has to be driven low to reset the PCIe cards. Add gpios property to PCIe DT node. Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NBjorn Helgaas <bhelgaas@google.com> Acked-by: NTony Lindgren <tony@atomide.com>
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- 05 8月, 2015 5 次提交
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由 Kishon Vijay Abraham I 提交于
commit <d919501f> ("ARM: dts: dra7: add minimal l4 bus layout with control module support") moved pbias_regulator dt node from being a child node of ocp to be the child node of scm_conf. After this device for pbias_regulator is not created. Fix it by adding "simple-bus" compatible property to scm_conf dt node. Fixes: d919501f ("ARM: dts: dra7: add minimal l4 bus layout with control module support") Cc: <stable@vger.kernel.org> # v4.1 Suggested-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> Tested-by: NGrygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
This region contains CTRL_CORE_SMA_SW2..9 registers which are not specific to any domain and can be reasonably accessed via syscon driver. Signed-off-by: NRoger Quadros <rogerq@ti.com> Acked-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
We need to add 4 bytes to include the last 32-bit register space. Signed-off-by: NRoger Quadros <rogerq@ti.com> Acked-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
These nodes are wrongly placed. They must come under the scm node. Nobody uses them either so get rid of them. Signed-off-by: NRoger Quadros <rogerq@ti.com> Acked-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Sekhar Nori 提交于
Add "ti,dra742-uart" to the compatible list so the driver workaround for UART module disable errata is enabled. This does not break backward compatibility as existing DTBs should continue to work with newer kernels albeit without the capability to idle the UART module when DMA is used. Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NGreg Kroah-Hartman <gregkh@linuxfoundation.org>
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- 04 8月, 2015 2 次提交
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由 Roger Quadros 提交于
This register is required to be passed to the SATA PHY driver to workaround errata i783 (SATA Lockup After SATA DPLL Unlock/Relock). Signed-off-by: NRoger Quadros <rogerq@ti.com> Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com>
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由 Roger Quadros 提交于
Add interrupt names so that the same can be used for OTG easily. Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 14 7月, 2015 1 次提交
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由 Peter Ujfalusi 提交于
The sDMA requests are routed through the DMA crossbar and without the crossbar only peripherals using DMA request 0-127 can be used. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 04 6月, 2015 1 次提交
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由 Tomi Valkeinen 提交于
DRA7xxx contains a very similar DSS to OMAP5. The main differences are: * no DSI or RFBI support. * 1 or 2 dedicated video PLLs. * need to do additional configuration to the DRA7 CONTROL module. DRA72xx has only one video PLL, and DRA74xx has two. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Cc: devicetree@vger.kernel.org Acked-by: NTony Lindgren <tony@atomide.com>
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- 03 6月, 2015 1 次提交
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由 Tomi Valkeinen 提交于
Add a new Linux clock for DRA7 based SoCs to control DESHDCP clock. Signed-off-by: NTomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: NTero Kristo <t-kristo@ti.com>
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- 05 5月, 2015 2 次提交
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由 Nishanth Menon 提交于
Fix a typo in DRA7 dtsi where 12 bytes are needed for register description of ABB efuse registers, however only 8 bytes are provided to map. For some weird reason, this does not generate abort at offset 0x8, probably due to default maps already provided in io.c for the bus register ranges. Reported-by: NMatt Gessner <Matt.Gessner@windriver.com> Reported-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NNishanth Menon <nm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Nishanth Menon 提交于
With commit bc078316 ("ARM: dts: DRA7: Add node for RTC"), we now have AM57xx RTC register itself as alias 0 even before DS1307 or TPS rtc drivers are loaded up. However, since neither TPS, nor AM57xx RTC are capable of being backedup by battery, we would like to maintain the "primary" rtc as mcp79410 rtc device. This also generates the following warnings in the bootlog highlighting the issue: [ 5.895445] rtc-ds1307 2-006f: /aliases ID 0 not available ... [ 6.476285] palmas-rtc 48070000.i2c:tps659038@58:tps659038_rtc: /aliases ID 1 not available So, add proper aliases to ensure that RTC order is always consistent to userspace immaterial of probe order. Signed-off-by: NNishanth Menon <nm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 01 4月, 2015 1 次提交
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由 Tero Kristo 提交于
This patch creates the l4_cfg and l4_wkup interconnects for DRA7, and moves some of the generic peripherals under it. System control module support is added to the device tree also, and the existing SCM related functionality is moved under it. Signed-off-by: NTero Kristo <t-kristo@ti.com>
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- 27 3月, 2015 1 次提交
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由 Keerthy 提交于
Add bandgap and related thermal nodes. The patch adds 5 thermal sensors. Only one cooling device for mpu as of now. The sensors are the exact same on both dra72 and dra7. Introduce CPU, GPU, core nodes for the moment as they are direct reuse of OMAP5 entities. NOTE: OMAP4 has a finer counter granularity, which allows for a delay of 1000ms in the thermal zone polling intervals. DRA7 have different counter mechanism, which allows at maximum a 500ms timer. Adjust the cpu thermal zone accordingly for DRA7. Signed-off-by: NKeerthy <j-keerthy@ti.com> [t-kristo@ti.com: few reuse from OMAP5 entities] Signed-off-by: NTero Kristo <t-kristo@ti.com> Signed-off-by: NNishanth Menon <nm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 19 3月, 2015 1 次提交
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由 Kishon Vijay Abraham I 提交于
Now that we don't have hwmod entry for pcie PHY remove the ti,hwmod property from PCIE PHY's. Otherwise we will get: platform 4a094000.pciephy: Cannot lookup hwmod 'pcie1-phy' Signed-off-by: NKishon Vijay Abraham I <kishon@ti.com> [tony@atomide.com: updated comments] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 17 3月, 2015 1 次提交
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由 Suman Anna 提交于
Remove the 'ti,timer-dsp' and 'ti,timer-pwm' properties from the timer nodes that still have them. This seems to be copied from OMAP5, on which only certain timers are capable of providing PWM functionality or be able to interrupt the DSP. All the GPTimers On DRA7 are capable of PWM and interrupting any core (due to the presence of Crossbar). These properties were used by the driver to add capabilities to each timer, and support requesting timers by capability. In the DT world, we expect any users of timers to use phandles to the respective timer, and use the omap_dm_timer_request_by_node() API. The API to request using capabilities, omap_dm_timer_request_by_cap() API should be deprecated eventually. Signed-off-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 15 3月, 2015 2 次提交
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由 Marc Zyngier 提交于
OMAP4/5 has been (ab)using the gic_arch_extn to provide wakeup from suspend, and it makes a lot of sense to convert this code to use stacked domains instead. This patch does just this, updating the DT files to actually reflect what the HW provides. BIG FAT WARNING: because the DTs were so far lying by not exposing the WUGEN HW block, kernels with this patch applied won't have any suspend-resume facility when booted with old DTs, and old kernels with updated DTs won't even boot. On a platform with this patch applied, the system looks like this: root@bacon-fat:~# cat /proc/interrupts CPU0 CPU1 16: 0 0 WUGEN 37 gp_timer 19: 233799 155916 GIC 27 arch_timer 23: 0 0 WUGEN 9 l3-dbg-irq 24: 1 0 WUGEN 10 l3-app-irq 27: 282 0 WUGEN 13 omap-dma-engine 44: 0 0 4ae10000.gpio 13 DMA 294: 0 0 WUGEN 20 gpmc 297: 506 0 WUGEN 56 48070000.i2c 298: 0 0 WUGEN 57 48072000.i2c 299: 0 0 WUGEN 61 48060000.i2c 300: 0 0 WUGEN 62 4807a000.i2c 301: 8 0 WUGEN 60 4807c000.i2c 308: 2439 0 WUGEN 74 OMAP UART2 312: 362 0 WUGEN 83 mmc2 313: 502 0 WUGEN 86 mmc0 314: 13 0 WUGEN 94 mmc1 350: 0 0 PRCM pinctrl, pinctrl 406: 35155709 0 GIC 109 ehci_hcd:usb1 407: 0 0 WUGEN 7 palmas 409: 0 0 WUGEN 119 twl6040 410: 0 0 twl6040 5 twl6040_irq_ready 411: 0 0 twl6040 0 twl6040_irq_th IPI0: 0 1 CPU wakeup interrupts IPI1: 0 0 Timer broadcast interrupts IPI2: 95334 902334 Rescheduling interrupts IPI3: 0 0 Function call interrupts IPI4: 479 648 Single function call interrupts IPI5: 0 0 CPU stop interrupts IPI6: 0 0 IRQ work interrupts IPI7: 0 0 completion interrupts Err: 0 Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088629-15377-8-git-send-email-marc.zyngier@arm.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>
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由 Marc Zyngier 提交于
Support for the TI crossbar used on the DRA7 family of chips is implemented as an ugly hack on the side of the GIC. Converting it to stacked domains makes it slightly more palatable, as it results in a cleanup. Unfortunately, as the DT bindings failed to acknowledge the fact that this is actually yet another interrupt controller (the third, actually), we have yet another breakage. Oh well. Acked-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NMarc Zyngier <marc.zyngier@arm.com> Link: https://lkml.kernel.org/r/1426088629-15377-3-git-send-email-marc.zyngier@arm.comSigned-off-by: NJason Cooper <jason@lakedaemon.net>
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- 25 2月, 2015 2 次提交
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由 Peter Ujfalusi 提交于
According to the Documentation/devicetree/bindings/dma/dma.txt the dma-channels and dma-requests property should not have '#'. Signed-off-by: NPeter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
The sata_ref_clk is a reference clock to the SATA phy. This fixes SATA malfunction across suspend/resume or when SATA driver is used as a module. Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 16 1月, 2015 1 次提交
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由 Felipe Balbi 提交于
Whenever Suspend PHY bit is set on DRA7x devices, USB will not work due to Set EP Configuration command always failing. This was only found after a recent commit 2164a476 (usb: dwc3: set SUSPHY bit for all cores, which will be merged for v3.19) added a missing *required* step to dwc3 initialization. Synopsys Databook requires that we enable Suspend PHY bit after initialization but that, unfortunately, breaks DRA7x. Note that the same regression was already patched for AM437x. Reported-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NFelipe Balbi <balbi@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 08 1月, 2015 1 次提交
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由 Vignesh R 提交于
Since phyid is no longer used by pcie driver, this field can be dropped from the DT. Signed-off-by: NVignesh R <vigneshr@ti.com> Acked-by: NKishon Vijay Abraham I <kishon@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 24 11月, 2014 2 次提交
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由 Roger Quadros 提交于
The SoC supports 2 DCAN nodes. Add them. Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
Display and DCAN drivers use syscon regmap to access some registers in the CORE control area. Add the syscon regmap node for this area. Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Nishanth Menon <nm@ti.com> Signed-off-by: NRoger Quadros <rogerq@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 22 11月, 2014 1 次提交
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由 Lokesh Vutla 提交于
Add node for RTC. Note that on dra7xx are no separate interrupts for alram and timer unlike for SoCs. Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com> [nm@ti.com: update with rtc crossbar number] Signed-off-by: NNishanth Menon <nm@ti.com> [tony@atomide.com: updated comments] Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 12 11月, 2014 2 次提交
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由 Lokesh Vutla 提交于
OMAP wdt driver supports only ti,omap3-wdt compatible. In DRA7 dt wdt compatible property is defined as ti,omap4-wdt by mistake instead of ti,omap3-wdt. Correcting the typo. Fixes: 6e58b8f1 ("ARM: dts: DRA7: Add the dts files for dra7 SoC and dra7-evm board") Signed-off-by: NLokesh Vutla <lokeshvutla@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Nishanth Menon 提交于
Add serial port aliases for consoles > 6. Signed-off-by: NNishanth Menon <nm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 11 11月, 2014 6 次提交
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由 Felipe Balbi 提交于
by adding labels to DWC3 nodes, it's far easier for boards to reference them. Signed-off-by: NFelipe Balbi <balbi@ti.com> [tony@atomide.com: updated for otg 4 move to dra74x.dtsi] Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Roger Quadros 提交于
The 4th USB controller instance present only on the DRA74x family of devices so move it there. Signed-off-by: NRoger Quadros <rogerq@ti.com> Acked-by: NNishanth Menon <nm@ti.com> Signed-off-by: NSekhar Nori <nsekhar@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Mugunthan V N 提交于
Add CPSW and MDIO related device tree data for DRA7XX and made as status disabled. Phy-id, pinmux for active and sleep state needs to be added in board dts files and enable the CPSW device. Signed-off-by: NMugunthan V N <mugunthanvnm@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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Cc: devicetree@vger.kernel.org Reviewed-by: NTony Lindgren <tony@atomide.com> Tested-by: NTony Lindgren <tony@atomide.com> Signed-off-by: NSebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Suman Anna 提交于
The '#mbox-cells' property is added to all the OMAP mailbox nodes. This property is mandatory with the new mailbox framework. Cc: "Benoît Cousson" <bcousson@baylibre.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Signed-off-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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由 Suman Anna 提交于
Add the interrupts property to all the 13 mailbox nodes in DRA7xx. The interrupts property information added is inline with the expected values with the DRA7xx crossbar driver, and is common to both DRA74x and DRA72x SoCs. Do note that the mailbox 1 is only capable of generating out 3 interrupts, while all the remaining mailboxes have 4 interrupts each. Signed-off-by: NSuman Anna <s-anna@ti.com> Signed-off-by: NTony Lindgren <tony@atomide.com>
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- 09 9月, 2014 2 次提交
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由 Nishanth Menon 提交于
We've had deeper idle states working on omaps for few years now, but only in the legacy mode. When booted with device tree, the wake-up events did not have a chance to work until commit 3e6cee17 ("pinctrl: single: Add support for wake-up interrupts") that recently got merged. In addition to that we also needed commit 79d97015 ("of/irq: create interrupts-extended property") that's now also merged. Note that there's no longer need to specify the wake-up bit in the pinctrl settings, the request_irq on the wake-up pin takes care of that. Signed-off-by: NNishanth Menon <nm@ti.com>
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由 Nishanth Menon 提交于
Now that ti,dra7-padconf is available, switch over to that compatible property. Retain pinctrl-single for legacy support. While at it, mark pinctrl as interrupt controller so that it can be used with interrupts-extended property for wakeup events. Signed-off-by: NNishanth Menon <nm@ti.com>
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