1. 18 5月, 2009 3 次提交
  2. 12 5月, 2009 1 次提交
    • Y
      x86: read apic ID in the !acpi_lapic case · 4797f6b0
      Yinghai Lu 提交于
      Ed found that on 32-bit, boot_cpu_physical_apicid is not read right,
      when the mptable is broken.
      
      Interestingly, actually three paths use/set it:
      
       1. acpi: at that time that is already read from reg
       2. mptable: only read from mptable
       3. no madt, and no mptable, that use default apic id 0 for 64-bit, -1 for 32-bit
      
      so we could read the apic id for the 2/3 path. We trust the hardware
      register more than we trust a BIOS data structure (the mptable).
      
      We can also avoid the double set_fixmap() when acpi_lapic
      is used, and also need to move cpu_has_apic earlier and
      call apic_disable().
      
      Also when need to update the apic id, we'd better read and
      set the apic version as well - so that quirks are applied precisely.
      
      v2: make path 3 with 64bit, use -1 as apic id, so could read it later.
      v3: fix whitespace problem pointed out by Ed Swierk
      v5: fix boot crash
      
      [ Impact: get correct apic id for bsp other than acpi path ]
      Reported-by: NEd Swierk <eswierk@aristanetworks.com>
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Acked-by: NCyrill Gorcunov <gorcunov@openvz.org>
      LKML-Reference: <49FC85A9.2070702@kernel.org>
      [ v4: sanity-check in the ACPI case too ]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      4797f6b0
  3. 11 5月, 2009 11 次提交
    • C
      x86: apic: Fixmap apic address even if apic disabled · cec6be6d
      Cyrill Gorcunov 提交于
      In case if apic were disabled by boot option
      we still need read_apic operation. So fixmap
      a fake apic area if needed.
      
      [ Impact: fix boot crash ]
      Signed-off-by: NCyrill Gorcunov <gorcunov@openvz.org>
      Cc: yinghai@kernel.org
      Cc: eswierk@aristanetworks.com
      LKML-Reference: <20090511134140.GH4624@lenovo>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      cec6be6d
    • A
      x86: display extended apic registers with print_local_APIC and cpu_debug code · 97a52714
      Andreas Herrmann 提交于
      Both print_local_APIC (used when apic=debug kernel param is set) and
      cpu_debug code missed support for some extended APIC registers that
      I'd like to see.
      
      This adds support to show:
      
       - extended APIC feature register
       - extended APIC control register
       - extended LVT registers
      
      [ Impact: print more debug info ]
      Signed-off-by: NAndreas Herrmann <andreas.herrmann3@amd.com>
      Cc: Jaswinder Singh Rajput <jaswinder@kernel.org>
      Cc: Cyrill Gorcunov <gorcunov@openvz.org>
      LKML-Reference: <20090508162350.GO29045@alberich.amd.com>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      97a52714
    • Y
      x86: read apic ID in the !acpi_lapic case · 4401da61
      Yinghai Lu 提交于
      Ed found that on 32-bit, boot_cpu_physical_apicid is not read right,
      when the mptable is broken.
      
      Interestingly, actually three paths use/set it:
      
       1. acpi: at that time that is already read from reg
       2. mptable: only read from mptable
       3. no madt, and no mptable, that use default apic id 0 for 64-bit, -1 for 32-bit
      
      so we could read the apic id for the 2/3 path. We trust the hardware
      register more than we trust a BIOS data structure (the mptable).
      
      We can also avoid the double set_fixmap() when acpi_lapic
      is used, and also need to move cpu_has_apic earlier and
      call apic_disable().
      
      Also when need to update the apic id, we'd better read and
      set the apic version as well - so that quirks are applied precisely.
      
      v2: make path 3 with 64bit, use -1 as apic id, so could read it later.
      v3: fix whitespace problem pointed out by Ed Swierk
      
      [ Impact: get correct apic id for bsp other than acpi path ]
      Reported-by: NEd Swierk <eswierk@aristanetworks.com>
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Acked-by: NCyrill Gorcunov <gorcunov@openvz.org>
      LKML-Reference: <49FC85A9.2070702@kernel.org>
      [ v4: sanity-check in the ACPI case too ]
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      4401da61
    • Y
      x86: apic: Check rev 3 fadt correctly for physical_apic bit · 61fe91e1
      Yinghai Lu 提交于
      Impact: fix fadt version checking
      
      FADT2_REVISION_ID has value 3 aka rev 3 FADT. So need to use >= instead
      of >, as other places in the code do.
      
      [ Impact: extend scope of APIC boot quirk ]
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      LKML-Reference: <new-submission>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      61fe91e1
    • Y
      x86/pci: update pirq_enable_irq() to setup io apic routing · b9c61b70
      Yinghai Lu 提交于
      So we can set io apic routing only when enabling the device irq.
      
      This is advantageous for IRQ descriptor allocation affinity: if we set up
      the IO-APIC entry later, we have a chance to allocate the IRQ descriptor
      later and know which device it is on and can set affinity accordingly.
      
      [ Impact: standardize/enhance irq-enabling sequence for mptable irqs ]
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Cc: Len Brown <lenb@kernel.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      LKML-Reference: <4A01C46E.8000501@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      b9c61b70
    • Y
      x86/acpi: move setup io apic routing out of CONFIG_ACPI scope · 5ef21837
      Yinghai Lu 提交于
      So we could set io apic routing when ACPI is not enabled.
      
      [ Impact: prepare for new functionality ]
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
      Cc: Len Brown <lenb@kernel.org>
      LKML-Reference: <4A01C422.5070400@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      5ef21837
    • Y
      x86/pci: add 4 more return parameters to IO_APIC_get_PCI_irq_vector() · e20c06fd
      Yinghai Lu 提交于
      To prepare those params for pcibios_irq_enable() to call setup_io_apic_routing().
      
      [ Impact: extend function call API to prepare for new functionality ]
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Acked-by: NJesse Barnes <jbarnes@virtuousgeek.org>
      Cc: Len Brown <lenb@kernel.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      LKML-Reference: <4A01C406.2040303@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      e20c06fd
    • Y
      x86/acpi: move pin_programmed bit map to io_apic.c · bdfe8ac1
      Yinghai Lu 提交于
      Prepare to call setup_io_apic_routing() in pcibios_irq_enable()
      also remove not needed member apic_id.
      
      [ Impact: clean up, prepare for future change ]
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
      Cc: Len Brown <lenb@kernel.org>
      LKML-Reference: <4A01C3DD.3050104@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      bdfe8ac1
    • Y
      x86/acpi: call mp_config_acpi_gsi() in mp_register_gsi() · a31f8205
      Yinghai Lu 提交于
      The patch to call mp_config_acpi_gsi() from the ACPI IRQ registration
      code never got mainline because there were open discussions about it.
      
      This call is needed to properly update the kernel's copy of the mptable,
      when the update_mptable boot parameter is needed.
      
      Now that the dust has settled with the APIC unification, and since there
      were no objections when the patch was re-submitted, try this again.
      
      [ Impact: fix the update_mptable boot parameter ]
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
      Cc: Len Brown <lenb@kernel.org>
      LKML-Reference: <4A01C387.7090103@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      a31f8205
    • Y
      x86: fix alloc_mptable() · ee214558
      Yinghai Lu 提交于
      Fix the conditions when we stop updating the mptable due to
      running out of slots.
      
      [ Impact: fix memory corruption / non-working update_mptable boot parameter ]
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
      Cc: Len Brown <lenb@kernel.org>
      LKML-Reference: <4A01C3BB.1000609@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      ee214558
    • Y
      x86/acpi: remove irq-compression trick on 32-bit · b9e0353f
      Yinghai Lu 提交于
      We already have a per cpu vector on 32-bit via recent changes, and
      don't need this trick any more (which trick obfuscates the real GSI
      mappings and which only triggers on larger systems to begin with):
      
      On 3 ioapic system (24 per ioapic) before patch I got:
      
      ACPI: PCI Interrupt Link [ILSB] enabled at IRQ 71
      IOAPIC[2]: Set routing entry (10-23 -> 0xa9 -> IRQ 64 Mode:1 Active:1)
      pci 0000:80:01.1: PCI INT A -> Link[ILSB] -> GSI 71 (level, low) -> IRQ 64
      ACPI: PCI Interrupt Link [LE5B] enabled at IRQ 67
      IOAPIC[2]: Set routing entry (10-19 -> 0xb1 -> IRQ 65 Mode:1 Active:1)
      pci 0000:83:00.0: PCI INT B -> Link[LE5B] -> GSI 67 (level, low) -> IRQ 65
      ACPI: PCI Interrupt Link [LE5A] enabled at IRQ 66
      IOAPIC[2]: Set routing entry (10-18 -> 0xb9 -> IRQ 66 Mode:1 Active:1)
      pci 0000:83:00.1: PCI INT A -> Link[LE5A] -> GSI 66 (level, low) -> IRQ 66
      ACPI: PCI Interrupt Link [LE5D] enabled at IRQ 65
      IOAPIC[2]: Set routing entry (10-17 -> 0xc1 -> IRQ 67 Mode:1 Active:1)
      pci 0000:84:00.0: PCI INT B -> Link[LE5D] -> GSI 65 (level, low) -> IRQ 67
      ACPI: PCI Interrupt Link [LE5C] enabled at IRQ 64
      IOAPIC[2]: Set routing entry (10-16 -> 0xc9 -> IRQ 68 Mode:1 Active:1)
      pci 0000:84:00.1: PCI INT A -> Link[LE5C] -> GSI 64 (level, low) -> IRQ 68
      pci 0000:87:00.0: PCI INT B -> Link[LE5A] -> GSI 66 (level, low) -> IRQ 66
      pci 0000:87:00.1: PCI INT A -> Link[LE5D] -> GSI 65 (level, low) -> IRQ 67
      pci 0000:88:00.0: PCI INT B -> Link[LE5C] -> GSI 64 (level, low) -> IRQ 68
      pci 0000:88:00.1: PCI INT A -> Link[LE5B] -> GSI 67 (level, low) -> IRQ 65
      pci 0000:8b:00.0: PCI INT B -> Link[LE5A] -> GSI 66 (level, low) -> IRQ 66
      pci 0000:8b:00.1: PCI INT A -> Link[LE5D] -> GSI 65 (level, low) -> IRQ 67
      pci 0000:8c:00.0: PCI INT B -> Link[LE5C] -> GSI 64 (level, low) -> IRQ 68
      pci 0000:8c:00.1: PCI INT A -> Link[LE5B] -> GSI 67 (level, low) -> IRQ 65
      
      after the patch we get:
      
      ACPI: PCI Interrupt Link [ILSB] enabled at IRQ 71
      IOAPIC[2]: Set routing entry (10-23 -> 0xa9 -> IRQ 71 Mode:1 Active:1)
      pci 0000:80:01.1: PCI INT A -> Link[ILSB] -> GSI 71 (level, low) -> IRQ 71
      ACPI: PCI Interrupt Link [LE5B] enabled at IRQ 67
      IOAPIC[2]: Set routing entry (10-19 -> 0xb1 -> IRQ 67 Mode:1 Active:1)
      pci 0000:83:00.0: PCI INT B -> Link[LE5B] -> GSI 67 (level, low) -> IRQ 67
      ACPI: PCI Interrupt Link [LE5A] enabled at IRQ 66
      IOAPIC[2]: Set routing entry (10-18 -> 0xb9 -> IRQ 66 Mode:1 Active:1)
      pci 0000:83:00.1: PCI INT A -> Link[LE5A] -> GSI 66 (level, low) -> IRQ 66
      ACPI: PCI Interrupt Link [LE5D] enabled at IRQ 65
      IOAPIC[2]: Set routing entry (10-17 -> 0xc1 -> IRQ 65 Mode:1 Active:1)
      pci 0000:84:00.0: PCI INT B -> Link[LE5D] -> GSI 65 (level, low) -> IRQ 65
      ACPI: PCI Interrupt Link [LE5C] enabled at IRQ 64
      IOAPIC[2]: Set routing entry (10-16 -> 0xc9 -> IRQ 64 Mode:1 Active:1)
      pci 0000:84:00.1: PCI INT A -> Link[LE5C] -> GSI 64 (level, low) -> IRQ 64
      pci 0000:87:00.0: PCI INT B -> Link[LE5A] -> GSI 66 (level, low) -> IRQ 66
      pci 0000:87:00.1: PCI INT A -> Link[LE5D] -> GSI 65 (level, low) -> IRQ 65
      pci 0000:88:00.0: PCI INT B -> Link[LE5C] -> GSI 64 (level, low) -> IRQ 64
      pci 0000:88:00.1: PCI INT A -> Link[LE5B] -> GSI 67 (level, low) -> IRQ 67
      pci 0000:8b:00.0: PCI INT B -> Link[LE5A] -> GSI 66 (level, low) -> IRQ 66
      pci 0000:8b:00.1: PCI INT A -> Link[LE5D] -> GSI 65 (level, low) -> IRQ 65
      pci 0000:8c:00.0: PCI INT B -> Link[LE5C] -> GSI 64 (level, low) -> IRQ 64
      pci 0000:8c:00.1: PCI INT A -> Link[LE5B] -> GSI 67 (level, low) -> IRQ 67
      
      As it can be seen that GSIs now get mapped lineary.
      
      [ Impact: simplify irq number mapping on bigger 32-bit systems ]
      Signed-off-by: NYinghai Lu <yinghai@kernel.org>
      Cc: Andrew Morton <akpm@linux-foundation.org>
      Cc: Jesse Barnes <jbarnes@virtuousgeek.org>
      Cc: Len Brown <lenb@kernel.org>
      LKML-Reference: <4A01C35C.7060207@kernel.org>
      Signed-off-by: NIngo Molnar <mingo@elte.hu>
      b9e0353f
  4. 08 5月, 2009 6 次提交
  5. 07 5月, 2009 1 次提交
  6. 06 5月, 2009 4 次提交
  7. 05 5月, 2009 11 次提交
  8. 04 5月, 2009 1 次提交
  9. 03 5月, 2009 2 次提交