- 13 10月, 2007 10 次提交
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由 Qing He 提交于
This patch changes the PIC interrupts delivery. Now it is only delivered to vcpu0 when either condition is met (on vcpu0): 1. local APIC is hardware disabled 2. LVT0 is unmasked and configured to delivery mode ExtInt It fixes the 2x faster wall clock on x86_64 and SMP i386 Linux guests Signed-off-by: NEddie (Yaozu) Dong <eddie.dong@intel.com> Signed-off-by: NQing He <qing.he@intel.com> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Eddie Dong 提交于
This reduces overhead by accessing cachelines from the wrong node, as well as simplifying locking. [Qing: fix for inactive or expired one-shot timer] Signed-off-by: NYaozu (Eddie) Dong <Eddie.Dong@intel.com> Signed-off-by: NQing He <qing.he@intel.com> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Eddie Dong 提交于
APIC timer IRQ is set every time when a certain period expires at host time, but the guest may be descheduled at that time and thus the irq be overwritten by later fire. This patch keep track of firing irq numbers and decrease only when the IRQ is injected to guest or buffered in APIC. Signed-off-by: NYaozu (Eddie) Dong <Eddie.Dong@intel.com> Signed-off-by: NQing He <qing.he@intel.com> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Yang, Sheng 提交于
This patch enables TPR shadow of VMX on CR8 access. 64bit Windows using CR8 access TPR frequently. The TPR shadow can improve the performance of access TPR by not causing vmexit. Signed-off-by: NSheng Yang <sheng.yang@intel.com> Signed-off-by: NYaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: NQing He <qing.he@intel.com> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Eddie Dong 提交于
This patch adds a new vcpu-based IOCTL to save and restore the local apic registers for a single vcpu. The kernel only copies the apic page as a whole, extraction of registers is left to userspace side. On restore, the APIC timer is restarted from the initial count, this introduces a little delay, but works fine. Signed-off-by: NYaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: NQing He <qing.he@intel.com> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 He, Qing 提交于
This patch adds support for in-kernel ioapic save and restore (to and from userspace). It uses the same get/set_irqchip ioctl as in-kernel PIC. Signed-off-by: NQing He <qing.he@intel.com> Signed-off-by: NYaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 He, Qing 提交于
This patch adds two new ioctls to dump and write kernel irqchips for save/restore and live migration. PIC s/r and l/m is implemented in this patch. Signed-off-by: NYaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: NQing He <qing.he@intel.com> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Eddie Dong 提交于
This allows in-kernel host-side device drivers to raise guest interrupts without going to userspace. [avi: fix level-triggered interrupt redelivery on eoi] [avi: add missing #include] [avi: avoid redelivery of edge-triggered interrupt] [avi: implement polarity] [avi: don't deliver edge-triggered interrupts when unmasking] [avi: fix host oops on invalid guest access] Signed-off-by: NYaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Eddie Dong 提交于
Because lightweight exits (exits which don't involve userspace) are many times faster than heavyweight exits, it makes sense to emulate high usage devices in the kernel. The local APIC is one such device, especially for Windows and for SMP, so we add an APIC model to kvm. It also allows in-kernel host-side drivers to inject interrupts without going through userspace. [compile fix on i386 from Jindrich Makovicka] Signed-off-by: NYaozu (Eddie) Dong <Eddie.Dong@intel.com> Signed-off-by: NQing He <qing.he@intel.com> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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由 Eddie Dong 提交于
Signed-off-by: NYaozu (Eddie) Dong <eddie.dong@intel.com> Signed-off-by: NAvi Kivity <avi@qumranet.com>
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