- 20 7月, 2011 2 次提交
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由 Thomas Abraham 提交于
Signed-off-by: NThomas Abraham <thomas.ab@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Thomas Abraham 提交于
Signed-off-by: NThomas Abraham <thomas.ab@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 26 5月, 2011 2 次提交
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由 Jeffrey Ohlstein 提交于
Hotplug support was added in 9f1890a5 (msm: hotplug: support cpu hotplug on msm, 2010-12-02) Signed-off-by: NJeff Ohlstein <johlstei@codeaurora.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Will Deacon 提交于
In commit eb33575c ("[ARM] Double check memmap is actually valid with a memmap has unexpected holes V2"), a new function, memmap_valid_within, was introduced to mmzone.h so that holes in the memmap which pass pfn_valid in SPARSEMEM configurations can be detected and avoided. The fix to this problem checks that the pfn <-> page linkages are correct by calculating the page for the pfn and then checking that page_to_pfn on that page returns the original pfn. Unfortunately, in SPARSEMEM configurations, this results in reading from the page flags to determine the correct section. Since the memmap here has been freed, junk is read from memory and the check is no longer robust. In the best case, reading from /proc/pagetypeinfo will give you the wrong answer. In the worst case, you get SEGVs, Kernel OOPses and hung CPUs. Furthermore, ioremap implementations that use pfn_valid to disallow the remapping of normal memory will break. This patch allows architectures to provide their own pfn_valid function instead of using the default implementation used by sparsemem. The architecture-specific version is aware of the memmap state and will return false when passed a pfn for a freed page within a valid section. Acked-by: NMel Gorman <mgorman@suse.de> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Tested-by: NH Hartley Sweeten <hsweeten@visionengravers.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 25 5月, 2011 2 次提交
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select ARM_PATCH_PHYS_VIRT as with ARM_PATCH_PHYS_VIRT you can patch boot_params at runtime or any recent bootloader will provide a valid atags pointer in r2 as point out by Russell on AT91 we never use XIP so se do not need PLAT_PHYS_OFFSET Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com> Cc: Andrew Victor <linux@maxim.org.za> Cc: Russell King <rmk+kernel@arm.linux.org.uk>
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we do not change the clock naming convention so does not need to switch the AVR32 yet Signed-off-by: NJean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: NNicolas Ferre <nicolas.ferre@atmel.com> Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
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- 24 5月, 2011 6 次提交
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由 Russell King 提交于
bcmring has a set of four sp804 timers incorporated, yet it has its own copy of the sp804 code. Convert its clocksource implementation to the standard sp804 support code. Cc: Jiandong Zheng <jdzheng@broadcom.com> Cc: Scott Branden <sbranden@broadcom.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Convert the MXS timrotv2 32-bit down counting clocksource to the generic clocksource infrastructure. Cc: Sascha Hauer <kernel@pengutronix.de> Acked-by: NShawn Guo <shawn.guo@freescale.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Convert SPEAr platforms 16-bit up counting clocksource, which requires a 16-bit register access read rather than 32-bit. Acked-by: NViresh Kumar <viresh.kumar@st.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Convert the W90x900 24-bit down-counting clocksource to the generic mmio clocksource infrastructure Acked-by: NWan ZongShun <mcuos.com@gmail.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Convert SP804, MXC, Nomadik and Orion 32-bit down-counting clocksources to generic mmio clocksource infrastructure. Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Alessandro Rubini <rubini@unipv.it> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Cc: Lennert Buytenhek <kernel@wantstofly.org> Acked-by: NNicolas Pitre <nico@fluxnic.net> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Convert ixp4xx, lpc32xx, mxc, netx, pxa, sa1100, tcc8k, tegra and u300 to use the generic mmio clocksource recently introduced. Cc: Imre Kaloz <kaloz@openwrt.org> Cc: Krzysztof Halasa <khc@pm.waw.pl> Acked-by: NEric Miao <eric.y.miao@gmail.com> Acked-by: N"Hans J. Koch" <hjk@hansjkoch.de> Acked-by: NColin Cross <ccross@android.com> Cc: Erik Gilling <konkers@android.com> Cc: Olof Johansson <olof@lixom.net> Acked-by: NLinus Walleij <linus.walleij@linaro.org> Acked-by: NSascha Hauer <s.hauer@pengutronix.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 23 5月, 2011 1 次提交
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由 Russell King 提交于
As a result of c42321c7 (genirq: Make generic irq chip depend on CONFIG_GENERIC_IRQ_CHIP), we now need those platforms using this in my tree to select this symbol. Acked-by: NThomas Gleixner <tglx@linutronix.de> Acked-by: NNicolas Pitre <nico@fluxnic.net> Acked-by: NSekhar Nori <nsekhar@ti.com> Acked-by: NKevin Hilman <khilman@ti.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 16 5月, 2011 1 次提交
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由 Kukjin Kim 提交于
The current mainline codes of ARCH_S5PC100 cannot support suspend to ram. So needs this for preventing build error. Cc: Russell King <rmk+kernel at arm.linux.org.uk> Signed-off-by: Kukjin Kim <kgene.kim at samsung.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 12 5月, 2011 5 次提交
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由 Victor Boivie 提交于
This patch allows the provided CONFIG_CMDLINE to be concatenated with the one provided by the boot loader. This is useful to merge the static values defined in CONFIG_CMDLINE with the boot loader's (possibly) more dynamic values, such as startup reasons and more. Signed-off-by: NVictor Boivie <victor.boivie@sonyericsson.com> Reviewed-by: NBjorn Andersson <bjorn.andersson@sonyericsson.com> Signed-off-by: NOskar Andero <oskar.andero@sonyericsson.com> Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org> Acked-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Improve the Kconfig help texts for the phys-to-virt patching feature. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
Highmem on ARM has been around for a while now, without any major issues being raised. So, drop the experimental status of this feature. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Russell King 提交于
SMP on ARM has been around for a while now, without any major issues being raised. So, drop the experimental status of this feature. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Kukjin Kim 提交于
Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 11 5月, 2011 1 次提交
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由 Grant Likely 提交于
Add some basic empty infrastructure for DT support on ARM. v5: - Fix off-by-one error in size calculation of initrd - Stop mucking with cmd_line, and load command line from dt into boot_command_line instead which matches the behaviour of ATAGS booting v3: - moved cmd_line export and initrd setup to this patch to make the series bisectable. - switched to alloc_bootmem_align() for allocation when unflattening the device tree. memblock_alloc() was not the right interface. Signed-off-by: NJeremy Kerr <jeremy.kerr@canonical.com> Tested-by: NTony Lindgren <tony@atomide.com> Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org> Acked-by: NRussell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NGrant Likely <grant.likely@secretlab.ca>
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- 04 5月, 2011 1 次提交
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由 Konstantin Porotchkin 提交于
Disabled legacy support for ARMv6 architecture on Dove platform. Latest Dove HW uses only ARMv7 model. Signed-off-by: NKonstantin Porotchkin <kostap@marvell.com> Signed-off-by: NNicolas Pitre <nico@fluxnic.net>
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- 03 5月, 2011 1 次提交
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由 Wolfram Sang 提交于
Now that both users of plat-stmp have been deleted in previous patches, delete the platform, too. Signed-off-by: NWolfram Sang <w.sang@pengutronix.de> Acked-by: NShawn Guo <shawn.guo@freescale.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 29 4月, 2011 1 次提交
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由 Uwe Kleine-König 提交于
The port is actually unmaintained and only received global cleanups and a few build fixes since mid 2008. Signed-off-by: NUwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 11 4月, 2011 1 次提交
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由 Catalin Marinas 提交于
The HIGHPTE config option depends on !OUTER_CACHE. However, there is no set_pte_ext() function that does outer cache maintenance by physical address, hence no need for such restriction. Signed-off-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 02 4月, 2011 1 次提交
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由 Russell King 提交于
Offering CONFIG_PM_SLEEP for CPUs which do not support suspend leads to build errors, so only set CONFIG_ARCH_SUSPEND_POSSIBLE if we have a CPU selected which supports suspend. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 31 3月, 2011 1 次提交
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由 Lucas De Marchi 提交于
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: NLucas De Marchi <lucas.demarchi@profusion.mobi>
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- 29 3月, 2011 1 次提交
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由 Thomas Gleixner 提交于
Use the generic version and just keep the arch specific output. Signed-off-by: NThomas Gleixner <tglx@linutronix.de>
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- 28 3月, 2011 1 次提交
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由 Kukjin Kim 提交于
The current mainline codes of ARCH_S5P64X0 and ARCH_S5P6442 can not support suspend to ram. So needs this for preventing build error on them. Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Rafael J. Wysocki <rjw@sisk.pl> Cc: Len Brown <len.brown@intel.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 23 3月, 2011 1 次提交
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由 Jan Weitzel 提交于
Add sched_clock using cyc_to_sched_clock and update_sched_clock with HAVE_SCHED_CLOCK tested on iMX27 and iMX35 Signed-off-by: NJan Weitzel <j.weitzel@phytec.de> Signed-off-by: NSascha Hauer <s.hauer@pengutronix.de>
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- 12 3月, 2011 1 次提交
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由 Sangbeom Kim 提交于
This patch updates s5pv210_defconfig and s5p64x0_defconfig for HRT support and CONFIG_S5P_HRT is used for its configuration. Signed-off-by: NSangbeom Kim <sbkim73@samsung.com> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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- 11 3月, 2011 3 次提交
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由 Changhwan Youn 提交于
The Multi-Core Timer(MCT) of EXYNOS4 is designed for implementing clock source timer and clock event timers. This patch implements 1 clock source timer with 64 bit free running counter of MCT and 2 clock event timers with two of 31-bit tick counters. Signed-off-by: NChanghwan Youn <chaos.youn@samsung.com> Cc: Ben Dooks <ben-linux@fluff.org> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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由 Dave Martin 提交于
Various binutils versions can resolve Thumb-2 branches to locally-defined, preemptible global symbols as short-range "b.n" branch instructions. This is a problem, because there's no guarantee the final destination of the symbol, or any candidate locations for a trampoline, are within range of the branch. For this reason, the kernel does not support fixing up the R_ARM_THM_JUMP11 (102) relocation in modules at all, and it makes little sense to add support. The symptom is that the kernel fails with an "unsupported relocation" error when loading some modules. Until fixed tools are available, passing -fno-optimize-sibling-calls to gcc should prevent gcc generating code which hits this problem, at the cost of a bit of extra runtime stack usage in some cases. The problem is described in more detail at: https://bugs.launchpad.net/binutils-linaro/+bug/725126 Only Thumb-2 kernels are affected. This patch adds a new CONFIG_THUMB2_AVOID_R_ARM_THM_JUMP11 config option which adds -fno-optimize-sibling-calls to CFLAGS_MODULE when building a Thumb-2 kernel. Signed-off-by: NDave Martin <dave.martin@linaro.org> Acked-by: NNicolas Pitre <nicolas.pitre@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Nicolas Pitre 提交于
Adding Thumb2 support to the runtime patching of the virt_to_phys and phys_to_virt opcodes. Tested both the 8-bit and the 16-bit fixups, using different placements in memory to exercize all code paths. Signed-off-by: NNicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: NDave Martin <dave.martin@linaro.org> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 10 3月, 2011 2 次提交
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由 Will Deacon 提交于
On revisions of the Cortex-A9 prior to r2p0, the Store Buffer does not have any automatic draining mechanism and therefore a livelock may occur if an external agent continuously polls a memory location waiting to observe an update. This workaround defines cpu_relax() as smp_mb(), preventing correctly written polling loops from denying visibility of updates to memory. Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Will Deacon 提交于
On the r2p* and r3p* versions of the Cortex-A9, a speculative memory access may cause a page table walk which starts prior to an ASID switch but completes afterwards. This can populate the micro-TLB with a stale entry which may be hit with the new ASID. This workaround places two dsb instructions in the mm switching code so that no page table walks can cross the ASID switch. Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NWill Deacon <will.deacon@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 09 3月, 2011 2 次提交
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由 Rob Herring 提交于
Use straight 64-bit values as 64-bit operations are fairly efficient on ARM. Comparing the asm output with and without KTIME_SCALAR, using 64-bit math generates clearly better code. Comparing kernel/hrtimer.c .text size, it goes from 0x1414 to 0x119c with this change. Signed-off-by: NRob Herring <rob.herring@calxeda.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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由 Santosh Shilimkar 提交于
PL310 implements the Clean & Invalidate by Way L2 cache maintenance operation (offset 0x7FC). This operation runs in background so that PL310 can handle normal accesses while it is in progress. Under very rare circumstances, due to this erratum, write data can be lost when PL310 treats a cacheable write transaction during a Clean & Invalidate by Way operation. Workaround: Disable Write-Back and Cache Linefill (Debug Control Register) Clean & Invalidate by Way (0x7FC) Re-enable Write-Back and Cache Linefill (Debug Control Register) This patch also removes any OMAP dependency on PL310 Errata's Signed-off-by: NSantosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: NCatalin Marinas <catalin.marinas@arm.com> Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 01 3月, 2011 1 次提交
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由 Stephen Boyd 提交于
Migrating to clkdev has several advantages: * Less code in mach-msm/clock.c * A more robust clk_get() implementation * clk_add_alias() support * clk_get_sys() support In general, this will help board authors setup clock aliases and break the dependency on device pointers in the clock tables. Signed-off-by: NStephen Boyd <sboyd@codeaurora.org> Signed-off-by: NDavid Brown <davidb@codeaurora.org>
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- 24 2月, 2011 1 次提交
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由 Russell King 提交于
Move L1_CACHE_SHIFT related options together, rather than spreading them across two separate Kconfig files. Signed-off-by: NRussell King <rmk+kernel@arm.linux.org.uk>
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- 22 2月, 2011 1 次提交
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由 Kukjin Kim 提交于
This patch changes the Kconfig and Makefile for the new ARCH_EXYNOS4. It also updates arch/arm/Kconfig, Makeifile and arch/arm/mm/Kconfig to include support for the new ARCH_EXYNOS4. Cc: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: NKukjin Kim <kgene.kim@samsung.com>
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