1. 21 7月, 2010 2 次提交
    • B
      drm/nouveau: fix pcirom vbios shadow breakage from acpi rom patch · 14d7ec11
      Ben Skeggs 提交于
      On nv50 it became impossible to attempt a PCI ROM shadow of the VBIOS,
      which will break some setups.
      
      This patch also removes the different ordering of shadow methods for
      pre-nv50 chipsets.  The reason for the different ordering was paranoia,
      but it should hopefully be OK to try shadowing PRAMIN first.
      Signed-off-by: NBen Skeggs <bskeggs@redhat.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      14d7ec11
    • A
      drm/radeon/kms: fix shared ddc harder · 42f14c4b
      Alex Deucher 提交于
      This fixes a regression caused by b2ea4aa6
      due to the way shared ddc with multiple digital connectors was handled.
      
      You generally have two cases where DDC lines are shared:
      - HDMI + VGA
      - HDMI + DVI-D
      
      HDMI + VGA is easy to deal with because you can check the EDID for the
      to see if the attached monitor is digital.  A shared DDC line with two
      digital connectors is more complex.  You can't use the hdmi bits in the
      EDID since they may not be there with DVI<->HDMI adapters.  In this case
      all we can do is check the HPD pins to see which is connected as we have
      no way of knowing using the EDID.
      
      Reported-by: trapdoor6@gmail.com
      Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
      Cc: stable@kernel.org
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      42f14c4b
  2. 20 7月, 2010 6 次提交
  3. 16 7月, 2010 1 次提交
    • A
      drm/radeon/kms: fix gtt MC base alignment on rs4xx/rs690/rs740 asics · 8d369bb1
      Alex Deucher 提交于
      The asics in question have the following requirements with regard to
      their gart setups:
      
      1. The GART aperture size has to be in the form of 2^X bytes, where X is from 25 to 31
      2. The GART aperture MC base has to be aligned to a boundary equal to the size of the
      aperture.
      3. The GART page table has to be aligned to the boundary equal to the size of the table.
      4. The GART page table size is: table_entry_size * (aperture_size / page_size)
      5. The GART page table has to be allocated in non-paged, non-cached, contiguous system
      memory.
      
      This patch takes care 2.  The rest should already be handled properly.
      
      This fixes a regression noticed by: Torsten Kaiser <just.for.lkml@googlemail.com>
      Tested-by: NTorsten Kaiser <just.for.lkml@googlemail.com>
      Signed-off-by: NAlex Deucher <alexdeucher@gmail.com>
      Signed-off-by: NDave Airlie <airlied@redhat.com>
      8d369bb1
  4. 14 7月, 2010 1 次提交
  5. 13 7月, 2010 7 次提交
  6. 12 7月, 2010 6 次提交
  7. 10 7月, 2010 2 次提交
  8. 09 7月, 2010 15 次提交