提交 cf5a15be 编写于 作者: M Maarten Lankhorst 提交者: Daniel Vetter

drm/i915: Move scaler setup to check crtc function, v2.

The scaler setup may add planes, but since they're unchanged we only
have to wait for primary flips. Also set planes_changed to indicate
at least 1 plane is modified.

Changes since v1:
- Instead of removing planes, do minimal validation needed.
Signed-off-by: NMaarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: NMatt Roper <matthew.d.roper@intel.com>
Tested-by(IVB): Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: NDaniel Vetter <daniel.vetter@ffwll.ch>
上级 6d3a1ce7
......@@ -100,14 +100,6 @@ int intel_atomic_check(struct drm_device *dev,
if (ret)
return ret;
/*
* FIXME: move to crtc atomic check function once this is
* more atomic friendly.
*/
ret = intel_atomic_setup_scalers(dev, nuclear_crtc, crtc_state);
if (ret)
return ret;
return ret;
}
......@@ -349,6 +341,15 @@ int intel_atomic_setup_scalers(struct drm_device *dev,
plane->base.id);
return PTR_ERR(state);
}
/*
* the plane is added after plane checks are run,
* but since this plane is unchanged just do the
* minimum required validation.
*/
if (plane->type == DRM_PLANE_TYPE_PRIMARY)
intel_crtc->atomic.wait_for_flips = true;
crtc_state->base.planes_changed = true;
}
intel_plane = to_intel_plane(plane);
......
......@@ -6586,7 +6586,6 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
struct drm_device *dev = crtc->base.dev;
struct drm_i915_private *dev_priv = dev->dev_private;
struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
int ret;
/* FIXME should check pixel clock limits on all platforms */
if (INTEL_INFO(dev)->gen < 4) {
......@@ -6632,14 +6631,7 @@ static int intel_crtc_compute_config(struct intel_crtc *crtc,
if (pipe_config->has_pch_encoder)
return ironlake_fdi_compute_config(crtc, pipe_config);
/* FIXME: remove below call once atomic mode set is place and all crtc
* related checks called from atomic_crtc_check function */
ret = 0;
DRM_DEBUG_KMS("intel_crtc = %p drm_state (pipe_config->base.state) = %p\n",
crtc, pipe_config->base.state);
ret = intel_atomic_setup_scalers(dev, crtc, pipe_config);
return ret;
return 0;
}
static int skylake_get_display_clock_speed(struct drm_device *dev)
......@@ -11726,7 +11718,10 @@ static bool check_encoder_cloning(struct drm_atomic_state *state,
static int intel_crtc_atomic_check(struct drm_crtc *crtc,
struct drm_crtc_state *crtc_state)
{
struct drm_device *dev = crtc->dev;
struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
struct intel_crtc_state *pipe_config =
to_intel_crtc_state(crtc_state);
struct drm_atomic_state *state = crtc_state->state;
int idx = crtc->base.id;
bool mode_changed = needs_modeset(crtc_state);
......@@ -11740,7 +11735,7 @@ static int intel_crtc_atomic_check(struct drm_crtc *crtc,
"[CRTC:%i] mismatch between state->active(%i) and crtc->active(%i)\n",
idx, crtc->state->active, intel_crtc->active);
return 0;
return intel_atomic_setup_scalers(dev, intel_crtc, pipe_config);
}
static const struct drm_crtc_helper_funcs intel_helper_funcs = {
......
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