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体验新版 GitCode,发现更多精彩内容 >>
提交
bc98540b
编写于
8月 10, 2014
作者:
B
Ben Skeggs
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
drm/nouveau/dmaobj: update to an improved style of class definition
Signed-off-by:
N
Ben Skeggs
<
bskeggs@redhat.com
>
上级
586491e6
变更
16
隐藏空白更改
内联
并排
Showing
16 changed file
with
157 addition
and
209 deletion
+157
-209
drivers/gpu/drm/nouveau/core/engine/device/gm100.c
drivers/gpu/drm/nouveau/core/engine/device/gm100.c
+1
-1
drivers/gpu/drm/nouveau/core/engine/device/nv04.c
drivers/gpu/drm/nouveau/core/engine/device/nv04.c
+2
-2
drivers/gpu/drm/nouveau/core/engine/device/nv10.c
drivers/gpu/drm/nouveau/core/engine/device/nv10.c
+8
-8
drivers/gpu/drm/nouveau/core/engine/device/nv20.c
drivers/gpu/drm/nouveau/core/engine/device/nv20.c
+4
-4
drivers/gpu/drm/nouveau/core/engine/device/nv30.c
drivers/gpu/drm/nouveau/core/engine/device/nv30.c
+5
-5
drivers/gpu/drm/nouveau/core/engine/device/nv40.c
drivers/gpu/drm/nouveau/core/engine/device/nv40.c
+16
-16
drivers/gpu/drm/nouveau/core/engine/device/nv50.c
drivers/gpu/drm/nouveau/core/engine/device/nv50.c
+14
-14
drivers/gpu/drm/nouveau/core/engine/device/nvc0.c
drivers/gpu/drm/nouveau/core/engine/device/nvc0.c
+9
-9
drivers/gpu/drm/nouveau/core/engine/device/nve0.c
drivers/gpu/drm/nouveau/core/engine/device/nve0.c
+7
-7
drivers/gpu/drm/nouveau/core/engine/dmaobj/base.c
drivers/gpu/drm/nouveau/core/engine/dmaobj/base.c
+23
-2
drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c
drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c
+11
-32
drivers/gpu/drm/nouveau/core/engine/dmaobj/nv50.c
drivers/gpu/drm/nouveau/core/engine/dmaobj/nv50.c
+11
-31
drivers/gpu/drm/nouveau/core/engine/dmaobj/nvc0.c
drivers/gpu/drm/nouveau/core/engine/dmaobj/nvc0.c
+11
-31
drivers/gpu/drm/nouveau/core/engine/dmaobj/nvd0.c
drivers/gpu/drm/nouveau/core/engine/dmaobj/nvd0.c
+12
-28
drivers/gpu/drm/nouveau/core/engine/dmaobj/priv.h
drivers/gpu/drm/nouveau/core/engine/dmaobj/priv.h
+19
-0
drivers/gpu/drm/nouveau/core/include/engine/dmaobj.h
drivers/gpu/drm/nouveau/core/include/engine/dmaobj.h
+4
-19
未找到文件。
drivers/gpu/drm/nouveau/core/engine/device/gm100.c
浏览文件 @
bc98540b
...
...
@@ -81,7 +81,7 @@ gm100_identify(struct nouveau_device *device)
device->oclass[NVDEV_SUBDEV_PWR ] = nv108_pwr_oclass;
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
#endif
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv108_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
gm107_graph_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/device/nv04.c
浏览文件 @
bc98540b
...
...
@@ -56,7 +56,7 @@ nv04_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv04_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv04_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv04_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv04_graph_oclass
;
...
...
@@ -74,7 +74,7 @@ nv04_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv04_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv04_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv04_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv04_graph_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/device/nv10.c
浏览文件 @
bc98540b
...
...
@@ -58,7 +58,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv10_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv10_graph_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DISP
]
=
nv04_disp_oclass
;
break
;
...
...
@@ -75,7 +75,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv10_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv10_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv10_graph_oclass
;
...
...
@@ -94,7 +94,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv10_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv10_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv10_graph_oclass
;
...
...
@@ -113,7 +113,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv1a_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv10_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv10_graph_oclass
;
...
...
@@ -132,7 +132,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv10_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv10_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv10_graph_oclass
;
...
...
@@ -151,7 +151,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv10_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv10_graph_oclass
;
...
...
@@ -170,7 +170,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv1a_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv10_graph_oclass
;
...
...
@@ -189,7 +189,7 @@ nv10_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv10_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv10_graph_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/device/nv20.c
浏览文件 @
bc98540b
...
...
@@ -59,7 +59,7 @@ nv20_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv20_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv20_graph_oclass
;
...
...
@@ -78,7 +78,7 @@ nv20_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv25_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv25_graph_oclass
;
...
...
@@ -97,7 +97,7 @@ nv20_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv25_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv25_graph_oclass
;
...
...
@@ -116,7 +116,7 @@ nv20_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv25_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv2a_graph_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/device/nv30.c
浏览文件 @
bc98540b
...
...
@@ -59,7 +59,7 @@ nv30_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv30_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv30_graph_oclass
;
...
...
@@ -78,7 +78,7 @@ nv30_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv35_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv35_graph_oclass
;
...
...
@@ -97,7 +97,7 @@ nv30_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv30_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv30_graph_oclass
;
...
...
@@ -117,7 +117,7 @@ nv30_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv36_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv35_graph_oclass
;
...
...
@@ -137,7 +137,7 @@ nv30_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_FB
]
=
nv10_fb_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv04_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv17_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv34_graph_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/device/nv40.c
浏览文件 @
bc98540b
...
...
@@ -65,7 +65,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
...
...
@@ -88,7 +88,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv41_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
...
...
@@ -111,7 +111,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv41_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
...
...
@@ -134,7 +134,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv41_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
...
...
@@ -157,7 +157,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv04_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
...
...
@@ -180,7 +180,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv41_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
...
...
@@ -203,7 +203,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv41_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
...
...
@@ -226,7 +226,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv41_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
...
...
@@ -249,7 +249,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
...
...
@@ -272,7 +272,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
...
...
@@ -295,7 +295,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
...
...
@@ -318,7 +318,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
...
...
@@ -341,7 +341,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
...
...
@@ -364,7 +364,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
...
...
@@ -387,7 +387,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
...
...
@@ -410,7 +410,7 @@ nv40_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv40_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv44_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv04_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv40_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv10_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv40_graph_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/device/nv50.c
浏览文件 @
bc98540b
...
...
@@ -74,7 +74,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv50_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
...
...
@@ -99,7 +99,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
...
...
@@ -127,7 +127,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
...
...
@@ -155,7 +155,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
...
...
@@ -183,7 +183,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
...
...
@@ -211,7 +211,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
...
...
@@ -239,7 +239,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
...
...
@@ -267,7 +267,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
...
...
@@ -295,7 +295,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
...
...
@@ -323,7 +323,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nv50_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
...
...
@@ -352,7 +352,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
nva3_pwr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
...
...
@@ -382,7 +382,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
nva3_pwr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
...
...
@@ -411,7 +411,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
nva3_pwr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
...
...
@@ -440,7 +440,7 @@ nv50_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nv50_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
nva3_pwr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nv50_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv84_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nv50_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
&
nv50_graph_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/device/nvc0.c
浏览文件 @
bc98540b
...
...
@@ -77,7 +77,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
nvc0_pwr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvc0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nvc0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nvc0_graph_oclass
;
...
...
@@ -109,7 +109,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
nvc0_pwr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvc0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nvc0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nvc4_graph_oclass
;
...
...
@@ -141,7 +141,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
nvc0_pwr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvc0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nvc0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nvc4_graph_oclass
;
...
...
@@ -172,7 +172,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
nvc0_pwr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvc0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nvc0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nvc4_graph_oclass
;
...
...
@@ -204,7 +204,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
nvc0_pwr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvc0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nvc0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nvc4_graph_oclass
;
...
...
@@ -236,7 +236,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
nvc0_pwr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvc0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nvc0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nvc1_graph_oclass
;
...
...
@@ -267,7 +267,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
nvc0_pwr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvc0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nvc0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nvc8_graph_oclass
;
...
...
@@ -299,7 +299,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
nvd0_pwr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nvd9_graph_oclass
;
...
...
@@ -328,7 +328,7 @@ nvc0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nvc0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nvd7_graph_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/device/nve0.c
浏览文件 @
bc98540b
...
...
@@ -77,7 +77,7 @@ nve0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
gk104_pwr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nve0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nve4_graph_oclass
;
...
...
@@ -110,7 +110,7 @@ nve0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
nvd0_pwr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nve0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nve4_graph_oclass
;
...
...
@@ -143,7 +143,7 @@ nve0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
gk104_pwr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nve0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nve4_graph_oclass
;
...
...
@@ -167,7 +167,7 @@ nve0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_INSTMEM
]
=
nv50_instmem_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VM
]
=
&
nvc0_vmmgr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
gk20a_bar_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
gk20a_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
gk20a_graph_oclass
;
...
...
@@ -194,7 +194,7 @@ nve0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
nvd0_pwr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nve0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nvf0_graph_oclass
;
...
...
@@ -227,7 +227,7 @@ nve0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
nvd0_pwr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nve0_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
gk110b_graph_oclass
;
...
...
@@ -260,7 +260,7 @@ nve0_identify(struct nouveau_device *device)
device
->
oclass
[
NVDEV_SUBDEV_BAR
]
=
&
nvc0_bar_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_PWR
]
=
nv108_pwr_oclass
;
device
->
oclass
[
NVDEV_SUBDEV_VOLT
]
=
&
nv40_volt_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
&
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_DMAOBJ
]
=
nvd0_dmaeng_oclass
;
device
->
oclass
[
NVDEV_ENGINE_FIFO
]
=
nv108_fifo_oclass
;
device
->
oclass
[
NVDEV_ENGINE_SW
]
=
nvc0_software_oclass
;
device
->
oclass
[
NVDEV_ENGINE_GR
]
=
nv108_graph_oclass
;
...
...
drivers/gpu/drm/nouveau/core/engine/dmaobj/base.c
浏览文件 @
bc98540b
...
...
@@ -26,7 +26,8 @@
#include <core/class.h>
#include <subdev/fb.h>
#include <engine/dmaobj.h>
#include "priv.h"
static
int
nouveau_dmaobj_ctor
(
struct
nouveau_object
*
parent
,
...
...
@@ -111,10 +112,30 @@ nouveau_dmaobj_ofuncs = {
.
fini
=
nouveau_object_fini
,
};
struct
nouveau_oclass
st
atic
st
ruct
nouveau_oclass
nouveau_dmaobj_sclass
[]
=
{
{
NV_DMA_FROM_MEMORY_CLASS
,
&
nouveau_dmaobj_ofuncs
},
{
NV_DMA_TO_MEMORY_CLASS
,
&
nouveau_dmaobj_ofuncs
},
{
NV_DMA_IN_MEMORY_CLASS
,
&
nouveau_dmaobj_ofuncs
},
{}
};
int
_nvkm_dmaeng_ctor
(
struct
nouveau_object
*
parent
,
struct
nouveau_object
*
engine
,
struct
nouveau_oclass
*
oclass
,
void
*
data
,
u32
size
,
struct
nouveau_object
**
pobject
)
{
const
struct
nvkm_dmaeng_impl
*
impl
=
(
void
*
)
oclass
;
struct
nouveau_dmaeng
*
dmaeng
;
int
ret
;
ret
=
nouveau_engine_create
(
parent
,
engine
,
oclass
,
true
,
"DMAOBJ"
,
"dmaobj"
,
&
dmaeng
);
*
pobject
=
nv_object
(
dmaeng
);
if
(
ret
)
return
ret
;
nv_engine
(
dmaeng
)
->
sclass
=
nouveau_dmaobj_sclass
;
dmaeng
->
bind
=
impl
->
bind
;
return
0
;
}
drivers/gpu/drm/nouveau/core/engine/dmaobj/nv04.c
浏览文件 @
bc98540b
...
...
@@ -28,11 +28,7 @@
#include <subdev/fb.h>
#include <subdev/vm/nv04.h>
#include <engine/dmaobj.h>
struct
nv04_dmaeng_priv
{
struct
nouveau_dmaeng
base
;
};
#include "priv.h"
static
int
nv04_dmaobj_bind
(
struct
nouveau_dmaeng
*
dmaeng
,
...
...
@@ -113,31 +109,14 @@ nv04_dmaobj_bind(struct nouveau_dmaeng *dmaeng,
return
ret
;
}
static
int
nv04_dmaeng_ctor
(
struct
nouveau_object
*
parent
,
struct
nouveau_object
*
engine
,
struct
nouveau_oclass
*
oclass
,
void
*
data
,
u32
size
,
struct
nouveau_object
**
pobject
)
{
struct
nv04_dmaeng_priv
*
priv
;
int
ret
;
ret
=
nouveau_dmaeng_create
(
parent
,
engine
,
oclass
,
&
priv
);
*
pobject
=
nv_object
(
priv
);
if
(
ret
)
return
ret
;
nv_engine
(
priv
)
->
sclass
=
nouveau_dmaobj_sclass
;
priv
->
base
.
bind
=
nv04_dmaobj_bind
;
return
0
;
}
struct
nouveau_oclass
nv04_dmaeng_oclass
=
{
.
handle
=
NV_ENGINE
(
DMAOBJ
,
0x04
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nv04_dmaeng_ctor
,
.
dtor
=
_nouveau_dmaeng_dtor
,
.
init
=
_nouveau_dmaeng_init
,
.
fini
=
_nouveau_dmaeng_fini
,
struct
nouveau_oclass
*
nv04_dmaeng_oclass
=
&
(
struct
nvkm_dmaeng_impl
)
{
.
base
.
handle
=
NV_ENGINE
(
DMAOBJ
,
0x04
),
.
base
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
_nvkm_dmaeng_ctor
,
.
dtor
=
_nvkm_dmaeng_dtor
,
.
init
=
_nvkm_dmaeng_init
,
.
fini
=
_nvkm_dmaeng_fini
,
},
};
.
bind
=
nv04_dmaobj_bind
,
}.
base
;
drivers/gpu/drm/nouveau/core/engine/dmaobj/nv50.c
浏览文件 @
bc98540b
...
...
@@ -26,11 +26,8 @@
#include <core/class.h>
#include <subdev/fb.h>
#include <engine/dmaobj.h>
struct
nv50_dmaeng_priv
{
struct
nouveau_dmaeng
base
;
};
#include "priv.h"
static
int
nv50_dmaobj_bind
(
struct
nouveau_dmaeng
*
dmaeng
,
...
...
@@ -131,31 +128,14 @@ nv50_dmaobj_bind(struct nouveau_dmaeng *dmaeng,
return
ret
;
}
static
int
nv50_dmaeng_ctor
(
struct
nouveau_object
*
parent
,
struct
nouveau_object
*
engine
,
struct
nouveau_oclass
*
oclass
,
void
*
data
,
u32
size
,
struct
nouveau_object
**
pobject
)
{
struct
nv50_dmaeng_priv
*
priv
;
int
ret
;
ret
=
nouveau_dmaeng_create
(
parent
,
engine
,
oclass
,
&
priv
);
*
pobject
=
nv_object
(
priv
);
if
(
ret
)
return
ret
;
nv_engine
(
priv
)
->
sclass
=
nouveau_dmaobj_sclass
;
priv
->
base
.
bind
=
nv50_dmaobj_bind
;
return
0
;
}
struct
nouveau_oclass
nv50_dmaeng_oclass
=
{
.
handle
=
NV_ENGINE
(
DMAOBJ
,
0x50
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nv50_dmaeng_ctor
,
.
dtor
=
_nouveau_dmaeng_dtor
,
.
init
=
_nouveau_dmaeng_init
,
.
fini
=
_nouveau_dmaeng_fini
,
struct
nouveau_oclass
*
nv50_dmaeng_oclass
=
&
(
struct
nvkm_dmaeng_impl
)
{
.
base
.
handle
=
NV_ENGINE
(
DMAOBJ
,
0x50
),
.
base
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
_nvkm_dmaeng_ctor
,
.
dtor
=
_nvkm_dmaeng_dtor
,
.
init
=
_nvkm_dmaeng_init
,
.
fini
=
_nvkm_dmaeng_fini
,
},
};
.
bind
=
nv50_dmaobj_bind
,
}.
base
;
drivers/gpu/drm/nouveau/core/engine/dmaobj/nvc0.c
浏览文件 @
bc98540b
...
...
@@ -27,11 +27,8 @@
#include <core/class.h>
#include <subdev/fb.h>
#include <engine/dmaobj.h>
struct
nvc0_dmaeng_priv
{
struct
nouveau_dmaeng
base
;
};
#include "priv.h"
static
int
nvc0_dmaobj_bind
(
struct
nouveau_dmaeng
*
dmaeng
,
...
...
@@ -113,31 +110,14 @@ nvc0_dmaobj_bind(struct nouveau_dmaeng *dmaeng,
return
ret
;
}
static
int
nvc0_dmaeng_ctor
(
struct
nouveau_object
*
parent
,
struct
nouveau_object
*
engine
,
struct
nouveau_oclass
*
oclass
,
void
*
data
,
u32
size
,
struct
nouveau_object
**
pobject
)
{
struct
nvc0_dmaeng_priv
*
priv
;
int
ret
;
ret
=
nouveau_dmaeng_create
(
parent
,
engine
,
oclass
,
&
priv
);
*
pobject
=
nv_object
(
priv
);
if
(
ret
)
return
ret
;
nv_engine
(
priv
)
->
sclass
=
nouveau_dmaobj_sclass
;
priv
->
base
.
bind
=
nvc0_dmaobj_bind
;
return
0
;
}
struct
nouveau_oclass
nvc0_dmaeng_oclass
=
{
.
handle
=
NV_ENGINE
(
DMAOBJ
,
0xc0
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nvc0_dmaeng_ctor
,
.
dtor
=
_nouveau_dmaeng_dtor
,
.
init
=
_nouveau_dmaeng_init
,
.
fini
=
_nouveau_dmaeng_fini
,
struct
nouveau_oclass
*
nvc0_dmaeng_oclass
=
&
(
struct
nvkm_dmaeng_impl
)
{
.
base
.
handle
=
NV_ENGINE
(
DMAOBJ
,
0xc0
),
.
base
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
_nvkm_dmaeng_ctor
,
.
dtor
=
_nvkm_dmaeng_dtor
,
.
init
=
_nvkm_dmaeng_init
,
.
fini
=
_nvkm_dmaeng_fini
,
},
};
.
bind
=
nvc0_dmaobj_bind
,
}.
base
;
drivers/gpu/drm/nouveau/core/engine/dmaobj/nvd0.c
浏览文件 @
bc98540b
...
...
@@ -27,7 +27,8 @@
#include <core/class.h>
#include <subdev/fb.h>
#include <engine/dmaobj.h>
#include "priv.h"
struct
nvd0_dmaeng_priv
{
struct
nouveau_dmaeng
base
;
...
...
@@ -98,31 +99,14 @@ nvd0_dmaobj_bind(struct nouveau_dmaeng *dmaeng,
return
ret
;
}
static
int
nvd0_dmaeng_ctor
(
struct
nouveau_object
*
parent
,
struct
nouveau_object
*
engine
,
struct
nouveau_oclass
*
oclass
,
void
*
data
,
u32
size
,
struct
nouveau_object
**
pobject
)
{
struct
nvd0_dmaeng_priv
*
priv
;
int
ret
;
ret
=
nouveau_dmaeng_create
(
parent
,
engine
,
oclass
,
&
priv
);
*
pobject
=
nv_object
(
priv
);
if
(
ret
)
return
ret
;
nv_engine
(
priv
)
->
sclass
=
nouveau_dmaobj_sclass
;
priv
->
base
.
bind
=
nvd0_dmaobj_bind
;
return
0
;
}
struct
nouveau_oclass
nvd0_dmaeng_oclass
=
{
.
handle
=
NV_ENGINE
(
DMAOBJ
,
0xd0
),
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
nvd0_dmaeng_ctor
,
.
dtor
=
_nouveau_dmaeng_dtor
,
.
init
=
_nouveau_dmaeng_init
,
.
fini
=
_nouveau_dmaeng_fini
,
struct
nouveau_oclass
*
nvd0_dmaeng_oclass
=
&
(
struct
nvkm_dmaeng_impl
)
{
.
base
.
handle
=
NV_ENGINE
(
DMAOBJ
,
0xd0
),
.
base
.
ofuncs
=
&
(
struct
nouveau_ofuncs
)
{
.
ctor
=
_nvkm_dmaeng_ctor
,
.
dtor
=
_nvkm_dmaeng_dtor
,
.
init
=
_nvkm_dmaeng_init
,
.
fini
=
_nvkm_dmaeng_fini
,
},
};
.
bind
=
nvd0_dmaobj_bind
,
}.
base
;
drivers/gpu/drm/nouveau/core/engine/dmaobj/priv.h
0 → 100644
浏览文件 @
bc98540b
#ifndef __NVKM_DMAOBJ_PRIV_H__
#define __NVKM_DMAOBJ_PRIV_H__
#include <engine/dmaobj.h>
int
_nvkm_dmaeng_ctor
(
struct
nouveau_object
*
,
struct
nouveau_object
*
,
struct
nouveau_oclass
*
,
void
*
,
u32
,
struct
nouveau_object
**
);
#define _nvkm_dmaeng_dtor _nouveau_engine_dtor
#define _nvkm_dmaeng_init _nouveau_engine_init
#define _nvkm_dmaeng_fini _nouveau_engine_fini
struct
nvkm_dmaeng_impl
{
struct
nouveau_oclass
base
;
int
(
*
bind
)(
struct
nouveau_dmaeng
*
,
struct
nouveau_object
*
,
struct
nouveau_dmaobj
*
,
struct
nouveau_gpuobj
**
);
};
#endif
drivers/gpu/drm/nouveau/core/include/engine/dmaobj.h
浏览文件 @
bc98540b
...
...
@@ -25,24 +25,9 @@ struct nouveau_dmaeng {
struct
nouveau_gpuobj
**
);
};
#define nouveau_dmaeng_create(p,e,c,d) \
nouveau_engine_create((p), (e), (c), true, "DMAOBJ", "dmaobj", (d))
#define nouveau_dmaeng_destroy(p) \
nouveau_engine_destroy(&(p)->base)
#define nouveau_dmaeng_init(p) \
nouveau_engine_init(&(p)->base)
#define nouveau_dmaeng_fini(p,s) \
nouveau_engine_fini(&(p)->base, (s))
#define _nouveau_dmaeng_dtor _nouveau_engine_dtor
#define _nouveau_dmaeng_init _nouveau_engine_init
#define _nouveau_dmaeng_fini _nouveau_engine_fini
extern
struct
nouveau_oclass
nv04_dmaeng_oclass
;
extern
struct
nouveau_oclass
nv50_dmaeng_oclass
;
extern
struct
nouveau_oclass
nvc0_dmaeng_oclass
;
extern
struct
nouveau_oclass
nvd0_dmaeng_oclass
;
extern
struct
nouveau_oclass
nouveau_dmaobj_sclass
[];
extern
struct
nouveau_oclass
*
nv04_dmaeng_oclass
;
extern
struct
nouveau_oclass
*
nv50_dmaeng_oclass
;
extern
struct
nouveau_oclass
*
nvc0_dmaeng_oclass
;
extern
struct
nouveau_oclass
*
nvd0_dmaeng_oclass
;
#endif
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