提交 971a967b 编写于 作者: L Linus Torvalds

Merge branch 'rmobile-fixes-for-linus' of...

Merge branch 'rmobile-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6

* 'rmobile-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6:
  ARM: mach-shmobile: mackerel: modify LCDC clock divider value
  ARM: mach-shmobile: ap4evb: modify LCDC clock divider value
  ARM: mach-shmobile: mackerel: fixup memory initialize for zboot
  ARM: mach-shmobile: ap4evb: fixup memory initialize for zboot
  ARM: mach-shmobile: Add sh73a0 MIPI-CSI and CEU clocks
  ARM: mach-shmobile: AG5EVM MIPI-DSI LCD reset delay fix
...@@ -454,6 +454,7 @@ static void __init ag5evm_init(void) ...@@ -454,6 +454,7 @@ static void __init ag5evm_init(void)
gpio_direction_output(GPIO_PORT217, 0); gpio_direction_output(GPIO_PORT217, 0);
mdelay(1); mdelay(1);
gpio_set_value(GPIO_PORT217, 1); gpio_set_value(GPIO_PORT217, 1);
mdelay(100);
/* LCD backlight controller */ /* LCD backlight controller */
gpio_request(GPIO_PORT235, NULL); /* RESET */ gpio_request(GPIO_PORT235, NULL); /* RESET */
......
...@@ -1303,7 +1303,7 @@ static void __init ap4evb_init(void) ...@@ -1303,7 +1303,7 @@ static void __init ap4evb_init(void)
lcdc_info.clock_source = LCDC_CLK_BUS; lcdc_info.clock_source = LCDC_CLK_BUS;
lcdc_info.ch[0].interface_type = RGB18; lcdc_info.ch[0].interface_type = RGB18;
lcdc_info.ch[0].clock_divider = 2; lcdc_info.ch[0].clock_divider = 3;
lcdc_info.ch[0].flags = 0; lcdc_info.ch[0].flags = 0;
lcdc_info.ch[0].lcd_size_cfg.width = 152; lcdc_info.ch[0].lcd_size_cfg.width = 152;
lcdc_info.ch[0].lcd_size_cfg.height = 91; lcdc_info.ch[0].lcd_size_cfg.height = 91;
......
...@@ -303,7 +303,7 @@ static struct sh_mobile_lcdc_info lcdc_info = { ...@@ -303,7 +303,7 @@ static struct sh_mobile_lcdc_info lcdc_info = {
.lcd_cfg = mackerel_lcdc_modes, .lcd_cfg = mackerel_lcdc_modes,
.num_cfg = ARRAY_SIZE(mackerel_lcdc_modes), .num_cfg = ARRAY_SIZE(mackerel_lcdc_modes),
.interface_type = RGB24, .interface_type = RGB24,
.clock_divider = 2, .clock_divider = 3,
.flags = 0, .flags = 0,
.lcd_size_cfg.width = 152, .lcd_size_cfg.width = 152,
.lcd_size_cfg.height = 91, .lcd_size_cfg.height = 91,
......
...@@ -263,7 +263,7 @@ static struct clk div6_clks[DIV6_NR] = { ...@@ -263,7 +263,7 @@ static struct clk div6_clks[DIV6_NR] = {
}; };
enum { MSTP001, enum { MSTP001,
MSTP125, MSTP118, MSTP116, MSTP100, MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100,
MSTP219, MSTP219,
MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200, MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
MSTP331, MSTP329, MSTP325, MSTP323, MSTP312, MSTP331, MSTP329, MSTP325, MSTP323, MSTP312,
...@@ -275,6 +275,10 @@ enum { MSTP001, ...@@ -275,6 +275,10 @@ enum { MSTP001,
static struct clk mstp_clks[MSTP_NR] = { static struct clk mstp_clks[MSTP_NR] = {
[MSTP001] = MSTP(&div4_clks[DIV4_HP], SMSTPCR0, 1, 0), /* IIC2 */ [MSTP001] = MSTP(&div4_clks[DIV4_HP], SMSTPCR0, 1, 0), /* IIC2 */
[MSTP129] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 29, 0), /* CEU1 */
[MSTP128] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 28, 0), /* CSI2-RX1 */
[MSTP127] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 27, 0), /* CEU0 */
[MSTP126] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 26, 0), /* CSI2-RX0 */
[MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */ [MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
[MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX0 */ [MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX0 */
[MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */ [MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */
...@@ -306,6 +310,9 @@ static struct clk_lookup lookups[] = { ...@@ -306,6 +310,9 @@ static struct clk_lookup lookups[] = {
CLKDEV_CON_ID("r_clk", &r_clk), CLKDEV_CON_ID("r_clk", &r_clk),
/* DIV6 clocks */ /* DIV6 clocks */
CLKDEV_CON_ID("vck1_clk", &div6_clks[DIV6_VCK1]),
CLKDEV_CON_ID("vck2_clk", &div6_clks[DIV6_VCK2]),
CLKDEV_CON_ID("vck3_clk", &div6_clks[DIV6_VCK3]),
CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]), CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]), CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
CLKDEV_ICK_ID("dsi0p_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]), CLKDEV_ICK_ID("dsi0p_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
...@@ -313,11 +320,15 @@ static struct clk_lookup lookups[] = { ...@@ -313,11 +320,15 @@ static struct clk_lookup lookups[] = {
/* MSTP32 clocks */ /* MSTP32 clocks */
CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */ CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */ CLKDEV_DEV_ID("sh_mobile_ceu.1", &mstp_clks[MSTP129]), /* CEU1 */
CLKDEV_DEV_ID("sh-mobile-csi2.1", &mstp_clks[MSTP128]), /* CSI2-RX1 */
CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU0 */
CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2-RX0 */
CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */ CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */ CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */ CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */ CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */ CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */ CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
......
...@@ -6,13 +6,10 @@ LIST "RWT Setting" ...@@ -6,13 +6,10 @@ LIST "RWT Setting"
EW 0xE6020004, 0xA500 EW 0xE6020004, 0xA500
EW 0xE6030004, 0xA500 EW 0xE6030004, 0xA500
DD 0x01001000, 0x01001000
LIST "GPIO Setting" LIST "GPIO Setting"
EB 0xE6051013, 0xA2 EB 0xE6051013, 0xA2
LIST "CPG" LIST "CPG"
ED 0xE6150080, 0x00000180
ED 0xE61500C0, 0x00000002 ED 0xE61500C0, 0x00000002
WAIT 1, 0xFE40009C WAIT 1, 0xFE40009C
...@@ -37,6 +34,9 @@ ED 0xE615002C, 0x93000040 ...@@ -37,6 +34,9 @@ ED 0xE615002C, 0x93000040
WAIT 1, 0xFE40009C WAIT 1, 0xFE40009C
LIST "SUB/USBClk"
ED 0xE6150080, 0x00000180
LIST "BSC" LIST "BSC"
ED 0xFEC10000, 0x00E0001B ED 0xFEC10000, 0x00E0001B
...@@ -53,7 +53,7 @@ ED 0xFE400048, 0x20C18505 ...@@ -53,7 +53,7 @@ ED 0xFE400048, 0x20C18505
ED 0xFE40004C, 0x00110209 ED 0xFE40004C, 0x00110209
ED 0xFE400010, 0x00000087 ED 0xFE400010, 0x00000087
WAIT 10, 0xFE40009C WAIT 30, 0xFE40009C
ED 0xFE400084, 0x0000003F ED 0xFE400084, 0x0000003F
EB 0xFE500000, 0x00 EB 0xFE500000, 0x00
...@@ -84,7 +84,7 @@ ED 0xE6150004, 0x80331050 ...@@ -84,7 +84,7 @@ ED 0xE6150004, 0x80331050
WAIT 1, 0xFE40009C WAIT 1, 0xFE40009C
ED 0xE6150354, 0x00000002 ED 0xFE400354, 0x01AD8002
LIST "SCIF0 - Serial port for earlyprintk" LIST "SCIF0 - Serial port for earlyprintk"
EB 0xE6053098, 0x11 EB 0xE6053098, 0x11
......
...@@ -6,13 +6,10 @@ LIST "RWT Setting" ...@@ -6,13 +6,10 @@ LIST "RWT Setting"
EW 0xE6020004, 0xA500 EW 0xE6020004, 0xA500
EW 0xE6030004, 0xA500 EW 0xE6030004, 0xA500
DD 0x01001000, 0x01001000
LIST "GPIO Setting" LIST "GPIO Setting"
EB 0xE6051013, 0xA2 EB 0xE6051013, 0xA2
LIST "CPG" LIST "CPG"
ED 0xE6150080, 0x00000180
ED 0xE61500C0, 0x00000002 ED 0xE61500C0, 0x00000002
WAIT 1, 0xFE40009C WAIT 1, 0xFE40009C
...@@ -37,6 +34,9 @@ ED 0xE615002C, 0x93000040 ...@@ -37,6 +34,9 @@ ED 0xE615002C, 0x93000040
WAIT 1, 0xFE40009C WAIT 1, 0xFE40009C
LIST "SUB/USBClk"
ED 0xE6150080, 0x00000180
LIST "BSC" LIST "BSC"
ED 0xFEC10000, 0x00E0001B ED 0xFEC10000, 0x00E0001B
...@@ -53,7 +53,7 @@ ED 0xFE400048, 0x20C18505 ...@@ -53,7 +53,7 @@ ED 0xFE400048, 0x20C18505
ED 0xFE40004C, 0x00110209 ED 0xFE40004C, 0x00110209
ED 0xFE400010, 0x00000087 ED 0xFE400010, 0x00000087
WAIT 10, 0xFE40009C WAIT 30, 0xFE40009C
ED 0xFE400084, 0x0000003F ED 0xFE400084, 0x0000003F
EB 0xFE500000, 0x00 EB 0xFE500000, 0x00
...@@ -84,7 +84,7 @@ ED 0xE6150004, 0x80331050 ...@@ -84,7 +84,7 @@ ED 0xE6150004, 0x80331050
WAIT 1, 0xFE40009C WAIT 1, 0xFE40009C
ED 0xE6150354, 0x00000002 ED 0xFE400354, 0x01AD8002
LIST "SCIF0 - Serial port for earlyprintk" LIST "SCIF0 - Serial port for earlyprintk"
EB 0xE6053098, 0x11 EB 0xE6053098, 0x11
......
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