提交 96ed6046 编写于 作者: J Jisheng Zhang 提交者: Sebastian Hesselbarth

ARM: dts: berlin: fix io clk and add missing core clk for BG2Q sdhci2 host

On BG2Q, the sdhci2 host uses nfcecc for "io" clk and nfc for "core" clk.
The shdci2 can't work without this patch due to the "core" clk is gated.

Cc: stable@vger.kernel.org # 3.16+
Fixes: 0d859a6a ("ARM: dts: berlin: add the SDHCI nodes for the BG2Q")
Signed-off-by: NJisheng Zhang <jszhang@marvell.com>
Signed-off-by: NSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
上级 97bf6af1
......@@ -83,7 +83,8 @@
compatible = "mrvl,pxav3-mmc";
reg = <0xab1000 0x200>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&chip CLKID_SDIO1XIN>;
clocks = <&chip CLKID_NFC_ECC>, <&chip CLKID_NFC>;
clock-names = "io", "core";
status = "disabled";
};
......
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