提交 839d271c 编写于 作者: L Lars-Peter Clausen 提交者: Mark Brown

ASoC: codecs: Remove unused reg_cache fields from device structs

The multi-component patch(commit f0fba2ad) moved the allocation of the
register cache from the driver to the ASoC core. Most drivers where adjusted to
this, but there are quite a few drivers left which now have an unused reg_cache field in
their private device struct.
This patch removes these unused fields.
Signed-off-by: NLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: NMark Brown <broonie@opensource.wolfsonmicro.com>
上级 6dc47e97
......@@ -146,7 +146,6 @@ struct pm860x_priv {
int irq[4];
unsigned char name[4][MAX_NAME_LEN];
unsigned char reg_cache[REG_CACHE_SIZE];
};
/* -9450dB to 0dB in 150dB steps ( mute instead of -9450dB) */
......
......@@ -23,7 +23,6 @@
/* codec private data */
struct ad193x_priv {
u8 reg_cache[AD193X_NUM_REGS];
enum snd_soc_control_type bus_type;
void *control_data;
int sysclk;
......
......@@ -27,7 +27,6 @@
struct ak4671_priv {
enum snd_soc_control_type control_type;
void *control_data;
u8 reg_cache[AK4671_CACHEREGNUM];
};
/* ak4671 register cache & default register settings */
......
......@@ -114,7 +114,6 @@ static const char *supply_names[] = {
struct cs4270_private {
enum snd_soc_control_type control_type;
void *control_data;
u8 reg_cache[CS4270_NUMREGS];
unsigned int mclk; /* Input frequency of the MCLK pin */
unsigned int mode; /* The mode (I2S or left-justified) */
unsigned int slave_mode;
......
......@@ -46,7 +46,6 @@ struct cs42l51_private {
unsigned int mclk;
unsigned int audio_mode; /* The mode (I2S or left-justified) */
enum master_slave_mode func;
u8 reg_cache[CS42L51_NUMREGS];
};
#define CS42L51_FORMATS ( \
......
......@@ -26,7 +26,6 @@
struct cx20442_priv {
enum snd_soc_control_type control_type;
void *control_data;
u8 reg_cache[1];
};
#define CX20442_PM 0x0
......
......@@ -30,7 +30,6 @@ MODULE_LICENSE("GPL");
struct aic26 {
struct spi_device *spi;
struct snd_soc_codec codec;
u16 reg_cache[AIC26_NUM_REGS]; /* shadow registers */
int master;
int datfm;
int mclk;
......@@ -354,7 +353,6 @@ static DEVICE_ATTR(keyclick, 0644, aic26_keyclick_show, aic26_keyclick_set);
*/
static int aic26_probe(struct snd_soc_codec *codec)
{
struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
int ret, err, i, reg;
dev_info(codec->dev, "Probing AIC26 SoC CODEC driver\n");
......@@ -372,7 +370,7 @@ static int aic26_probe(struct snd_soc_codec *codec)
aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);
/* Fill register cache */
for (i = 0; i < ARRAY_SIZE(aic26->reg_cache); i++)
for (i = 0; i < codec->driver->reg_cache_size; i++)
aic26_reg_read(codec, i);
/* Register the sysfs files for debugging */
......
......@@ -35,7 +35,6 @@
/* codec private data */
struct uda1380_priv {
struct snd_soc_codec *codec;
u16 reg_cache[UDA1380_CACHEREGNUM];
unsigned int dac_clk;
struct work_struct work;
void *control_data;
......
......@@ -190,7 +190,6 @@ static const char *wm8580_supply_names[WM8580_NUM_SUPPLIES] = {
struct wm8580_priv {
enum snd_soc_control_type control_type;
struct regulator_bulk_data supplies[WM8580_NUM_SUPPLIES];
u16 reg_cache[WM8580_MAX_REGISTER + 1];
struct pll_state a;
struct pll_state b;
int sysclk[2];
......
......@@ -33,7 +33,6 @@
/* codec private data */
struct wm8711_priv {
enum snd_soc_control_type bus_type;
u16 reg_cache[WM8711_CACHEREGNUM];
unsigned int sysclk;
};
......
......@@ -43,7 +43,6 @@ static const char *wm8731_supply_names[WM8731_NUM_SUPPLIES] = {
struct wm8731_priv {
enum snd_soc_control_type control_type;
struct regulator_bulk_data supplies[WM8731_NUM_SUPPLIES];
u16 reg_cache[WM8731_CACHEREGNUM];
unsigned int sysclk;
int sysclk_type;
int playback_fs;
......
......@@ -52,7 +52,6 @@ static const u16 wm8750_reg[] = {
struct wm8750_priv {
unsigned int sysclk;
enum snd_soc_control_type control_type;
u16 reg_cache[ARRAY_SIZE(wm8750_reg)];
};
#define wm8750_reset(c) snd_soc_write(c, WM8750_RESET, 0)
......
......@@ -139,7 +139,6 @@
struct wm8900_priv {
enum snd_soc_control_type control_type;
u16 reg_cache[WM8900_MAXREG];
u32 fll_in; /* FLL input frequency */
u32 fll_out; /* FLL output frequency */
......
......@@ -214,8 +214,6 @@ static u16 wm8903_reg_defaults[] = {
struct wm8903_priv {
u16 reg_cache[ARRAY_SIZE(wm8903_reg_defaults)];
int sysclk;
int irq;
......
......@@ -42,7 +42,6 @@
struct wm8940_priv {
unsigned int sysclk;
u16 reg_cache[WM8940_CACHEREGNUM];
enum snd_soc_control_type control_type;
void *control_data;
};
......
......@@ -71,7 +71,6 @@ static const u16 wm8960_reg[WM8960_CACHEREGNUM] = {
};
struct wm8960_priv {
u16 reg_cache[WM8960_CACHEREGNUM];
enum snd_soc_control_type control_type;
void *control_data;
int (*set_bias_level)(struct snd_soc_codec *,
......
......@@ -289,7 +289,6 @@ static u16 wm8961_reg_defaults[] = {
struct wm8961_priv {
enum snd_soc_control_type control_type;
int sysclk;
u16 reg_cache[WM8961_MAX_REGISTER];
};
static int wm8961_volatile_register(unsigned int reg)
......
......@@ -51,7 +51,6 @@ static const u16 wm8974_reg[WM8974_CACHEREGNUM] = {
struct wm8974_priv {
enum snd_soc_control_type control_type;
u16 reg_cache[WM8974_CACHEREGNUM];
};
#define wm8974_reset(c) snd_soc_write(c, WM8974_RESET, 0)
......
......@@ -59,7 +59,6 @@ struct wm8978_priv {
unsigned int f_opclk;
int mclk_idx;
enum wm8978_sysclk_src sysclk;
u16 reg_cache[WM8978_CACHEREGNUM];
};
static const char *wm8978_companding[] = {"Off", "NC", "u-law", "A-law"};
......
......@@ -53,7 +53,6 @@ struct wm8988_priv {
unsigned int sysclk;
enum snd_soc_control_type control_type;
struct snd_pcm_hw_constraint_list *sysclk_constraints;
u16 reg_cache[WM8988_NUM_REG];
};
......
......@@ -225,7 +225,6 @@ static struct {
struct wm8993_priv {
struct wm_hubs_data hubs_data;
u16 reg_cache[WM8993_REGISTER_COUNT];
struct regulator_bulk_data supplies[WM8993_NUM_SUPPLIES];
struct wm8993_platform_data pdata;
enum snd_soc_control_type control_type;
......
......@@ -157,7 +157,6 @@ static struct {
struct wm9081_priv {
enum snd_soc_control_type control_type;
void *control_data;
u16 reg_cache[WM9081_MAX_REGISTER + 1];
int sysclk_source;
int mclk_rate;
int sysclk_rate;
......
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