clk: st: Support for QUADFS inside ClockGenB/C/D/E/F

The patch supports the 216/432/660 type Quad Frequency Synthesizers
used by ClockGenB/C/D/E/F

QUADFS clock : It includes support for all 216/432/660 type Quad
Frequency Synthesizers : implemented as Fixed Parent / Rate / Gate clock,
with clock rate calculated reading H/w settings done at BOOT.

QuadFS have 4 outputs : chan0 chan1 chan2 chan3
Signed-off-by: NPankaj Dev <pankaj.dev@st.com>
Signed-off-by: NGabriel Fernandez <gabriel.fernandez@st.com>
Signed-off-by: NMike Turquette <mturquette@linaro.org>

drivers/clk/st/Makefile

-obj-y += clkgen-mux.o clkgen-pll.o
+obj-y += clkgen-mux.o clkgen-pll.o clkgen-fsyn.o