提交 15831714 编写于 作者: L Linus Torvalds

Merge branch 'for-linus' of git://github.com/cmetcalf-tilera/linux-tile

* 'for-linus' of git://github.com/cmetcalf-tilera/linux-tile:
  arch/tile: factor out <arch/opcode.h> header
  arch/tile: add the <arch> headers to the set of installed kernel headers
  arch/tile: avoid exporting a symbol no longer used by gcc
  arch/tile: avoid ISO namespace pollution with <asm/sigcontext.h>
header-y += abi.h
header-y += chip.h
header-y += chip_tile64.h
header-y += chip_tilegx.h
header-y += chip_tilepro.h
header-y += icache.h
header-y += interrupts.h
header-y += interrupts_32.h
header-y += interrupts_64.h
header-y += opcode.h
header-y += opcode_tilegx.h
header-y += opcode_tilepro.h
header-y += sim.h
header-y += sim_def.h
header-y += spr_def.h
header-y += spr_def_32.h
header-y += spr_def_64.h
......@@ -15,13 +15,78 @@
/**
* @file
*
* ABI-related register definitions helpful when writing assembly code.
* ABI-related register definitions.
*/
#ifndef __ARCH_ABI_H__
#define __ARCH_ABI_H__
#include <arch/chip.h>
#if !defined __need_int_reg_t && !defined __DOXYGEN__
# define __ARCH_ABI_H__
# include <arch/chip.h>
#endif
/* Provide the basic machine types. */
#ifndef __INT_REG_BITS
/** Number of bits in a register. */
#if defined __tilegx__
# define __INT_REG_BITS 64
#elif defined __tilepro__
# define __INT_REG_BITS 32
#elif !defined __need_int_reg_t
# include <arch/chip.h>
# define __INT_REG_BITS CHIP_WORD_SIZE()
#else
# error Unrecognized architecture with __need_int_reg_t
#endif
#if __INT_REG_BITS == 64
#ifndef __ASSEMBLER__
/** Unsigned type that can hold a register. */
typedef unsigned long long __uint_reg_t;
/** Signed type that can hold a register. */
typedef long long __int_reg_t;
#endif
/** String prefix to use for printf(). */
#define __INT_REG_FMT "ll"
#else
#ifndef __ASSEMBLER__
/** Unsigned type that can hold a register. */
typedef unsigned long __uint_reg_t;
/** Signed type that can hold a register. */
typedef long __int_reg_t;
#endif
/** String prefix to use for printf(). */
#define __INT_REG_FMT "l"
#endif
#endif /* __INT_REG_BITS */
#ifndef __need_int_reg_t
#ifndef __ASSEMBLER__
/** Unsigned type that can hold a register. */
typedef __uint_reg_t uint_reg_t;
/** Signed type that can hold a register. */
typedef __int_reg_t int_reg_t;
#endif
/** String prefix to use for printf(). */
#define INT_REG_FMT __INT_REG_FMT
/** Number of bits in a register. */
#define INT_REG_BITS __INT_REG_BITS
/* Registers 0 - 55 are "normal", but some perform special roles. */
......@@ -59,7 +124,7 @@
* The ABI requires callers to allocate a caller state save area of
* this many bytes at the bottom of each stack frame.
*/
#define C_ABI_SAVE_AREA_SIZE (2 * (CHIP_WORD_SIZE() / 8))
#define C_ABI_SAVE_AREA_SIZE (2 * (INT_REG_BITS / 8))
/**
* The operand to an 'info' opcode directing the backtracer to not
......@@ -67,30 +132,10 @@
*/
#define INFO_OP_CANNOT_BACKTRACE 2
#ifndef __ASSEMBLER__
#if CHIP_WORD_SIZE() > 32
/** Unsigned type that can hold a register. */
typedef unsigned long long uint_reg_t;
#endif /* !__need_int_reg_t */
/** Signed type that can hold a register. */
typedef long long int_reg_t;
/** String prefix to use for printf(). */
#define INT_REG_FMT "ll"
#elif !defined(__LP64__) /* avoid confusion with LP64 cross-build tools */
/** Unsigned type that can hold a register. */
typedef unsigned long uint_reg_t;
/** Signed type that can hold a register. */
typedef long int_reg_t;
/** String prefix to use for printf(). */
#define INT_REG_FMT "l"
#endif
#endif /* __ASSEMBLER__ */
/* Make sure we later can get all the definitions and declarations. */
#undef __need_int_reg_t
#endif /* !__ARCH_ABI_H__ */
/*
* Copyright 2010 Tilera Corporation. All Rights Reserved.
* Copyright 2011 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
......@@ -12,15 +12,10 @@
* more details.
*/
#ifndef _ASM_TILE_OPCODE_CONSTANTS_H
#define _ASM_TILE_OPCODE_CONSTANTS_H
#include <arch/chip.h>
#if CHIP_WORD_SIZE() == 64
#include <asm/opcode_constants_64.h>
#if defined(__tilepro__)
#include <arch/opcode_tilepro.h>
#elif defined(__tilegx__)
#include <arch/opcode_tilegx.h>
#else
#include <asm/opcode_constants_32.h>
#error Unexpected Tilera chip type
#endif
#endif /* _ASM_TILE_OPCODE_CONSTANTS_H */
/*
/* TILE-Gx opcode information.
*
* Copyright 2011 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
......@@ -10,13 +11,805 @@
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for
* more details.
*
*
*
*
*
*/
/* This file is machine-generated; DO NOT EDIT! */
#ifndef __ARCH_OPCODE_H__
#define __ARCH_OPCODE_H__
#ifndef __ASSEMBLER__
typedef unsigned long long tilegx_bundle_bits;
/* These are the bits that determine if a bundle is in the X encoding. */
#define TILEGX_BUNDLE_MODE_MASK ((tilegx_bundle_bits)3 << 62)
enum
{
/* Maximum number of instructions in a bundle (2 for X, 3 for Y). */
TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE = 3,
/* How many different pipeline encodings are there? X0, X1, Y0, Y1, Y2. */
TILEGX_NUM_PIPELINE_ENCODINGS = 5,
/* Log base 2 of TILEGX_BUNDLE_SIZE_IN_BYTES. */
TILEGX_LOG2_BUNDLE_SIZE_IN_BYTES = 3,
/* Instructions take this many bytes. */
TILEGX_BUNDLE_SIZE_IN_BYTES = 1 << TILEGX_LOG2_BUNDLE_SIZE_IN_BYTES,
/* Log base 2 of TILEGX_BUNDLE_ALIGNMENT_IN_BYTES. */
TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES = 3,
/* Bundles should be aligned modulo this number of bytes. */
TILEGX_BUNDLE_ALIGNMENT_IN_BYTES =
(1 << TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES),
/* Number of registers (some are magic, such as network I/O). */
TILEGX_NUM_REGISTERS = 64,
};
/* Make a few "tile_" variables to simplify common code between
architectures. */
typedef tilegx_bundle_bits tile_bundle_bits;
#define TILE_BUNDLE_SIZE_IN_BYTES TILEGX_BUNDLE_SIZE_IN_BYTES
#define TILE_BUNDLE_ALIGNMENT_IN_BYTES TILEGX_BUNDLE_ALIGNMENT_IN_BYTES
#define TILE_LOG2_BUNDLE_ALIGNMENT_IN_BYTES \
TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES
/* 64-bit pattern for a { bpt ; nop } bundle. */
#define TILEGX_BPT_BUNDLE 0x286a44ae51485000ULL
static __inline unsigned int
get_BFEnd_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 12)) & 0x3f);
}
static __inline unsigned int
get_BFOpcodeExtension_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 24)) & 0xf);
}
static __inline unsigned int
get_BFStart_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 18)) & 0x3f);
}
static __inline unsigned int
get_BrOff_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 31)) & 0x0000003f) |
(((unsigned int)(n >> 37)) & 0x0001ffc0);
}
static __inline unsigned int
get_BrType_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 54)) & 0x1f);
}
static __inline unsigned int
get_Dest_Imm8_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 31)) & 0x0000003f) |
(((unsigned int)(n >> 43)) & 0x000000c0);
}
static __inline unsigned int
get_Dest_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 0)) & 0x3f);
}
static __inline unsigned int
get_Dest_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 31)) & 0x3f);
}
static __inline unsigned int
get_Dest_Y0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 0)) & 0x3f);
}
static __inline unsigned int
get_Dest_Y1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 31)) & 0x3f);
}
static __inline unsigned int
get_Imm16_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 12)) & 0xffff);
}
static __inline unsigned int
get_Imm16_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 43)) & 0xffff);
}
static __inline unsigned int
get_Imm8OpcodeExtension_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 20)) & 0xff);
}
static __inline unsigned int
get_Imm8OpcodeExtension_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 51)) & 0xff);
}
static __inline unsigned int
get_Imm8_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 12)) & 0xff);
}
static __inline unsigned int
get_Imm8_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 43)) & 0xff);
}
static __inline unsigned int
get_Imm8_Y0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 12)) & 0xff);
}
static __inline unsigned int
get_Imm8_Y1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 43)) & 0xff);
}
static __inline unsigned int
get_JumpOff_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 31)) & 0x7ffffff);
}
static __inline unsigned int
get_JumpOpcodeExtension_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 58)) & 0x1);
}
static __inline unsigned int
get_MF_Imm14_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 37)) & 0x3fff);
}
static __inline unsigned int
get_MT_Imm14_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 31)) & 0x0000003f) |
(((unsigned int)(n >> 37)) & 0x00003fc0);
}
static __inline unsigned int
get_Mode(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 62)) & 0x3);
}
static __inline unsigned int
get_Opcode_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 28)) & 0x7);
}
static __inline unsigned int
get_Opcode_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 59)) & 0x7);
}
static __inline unsigned int
get_Opcode_Y0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 27)) & 0xf);
}
static __inline unsigned int
get_Opcode_Y1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 58)) & 0xf);
}
static __inline unsigned int
get_Opcode_Y2(tilegx_bundle_bits n)
{
return (((n >> 26)) & 0x00000001) |
(((unsigned int)(n >> 56)) & 0x00000002);
}
static __inline unsigned int
get_RRROpcodeExtension_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 18)) & 0x3ff);
}
static __inline unsigned int
get_RRROpcodeExtension_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 49)) & 0x3ff);
}
static __inline unsigned int
get_RRROpcodeExtension_Y0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 18)) & 0x3);
}
static __inline unsigned int
get_RRROpcodeExtension_Y1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 49)) & 0x3);
}
static __inline unsigned int
get_ShAmt_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 12)) & 0x3f);
}
static __inline unsigned int
get_ShAmt_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 43)) & 0x3f);
}
static __inline unsigned int
get_ShAmt_Y0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 12)) & 0x3f);
}
static __inline unsigned int
get_ShAmt_Y1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 43)) & 0x3f);
}
static __inline unsigned int
get_ShiftOpcodeExtension_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 18)) & 0x3ff);
}
static __inline unsigned int
get_ShiftOpcodeExtension_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 49)) & 0x3ff);
}
static __inline unsigned int
get_ShiftOpcodeExtension_Y0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 18)) & 0x3);
}
static __inline unsigned int
get_ShiftOpcodeExtension_Y1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 49)) & 0x3);
}
static __inline unsigned int
get_SrcA_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 6)) & 0x3f);
}
static __inline unsigned int
get_SrcA_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 37)) & 0x3f);
}
static __inline unsigned int
get_SrcA_Y0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 6)) & 0x3f);
}
static __inline unsigned int
get_SrcA_Y1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 37)) & 0x3f);
}
static __inline unsigned int
get_SrcA_Y2(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 20)) & 0x3f);
}
static __inline unsigned int
get_SrcBDest_Y2(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 51)) & 0x3f);
}
static __inline unsigned int
get_SrcB_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 12)) & 0x3f);
}
static __inline unsigned int
get_SrcB_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 43)) & 0x3f);
}
static __inline unsigned int
get_SrcB_Y0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 12)) & 0x3f);
}
static __inline unsigned int
get_SrcB_Y1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 43)) & 0x3f);
}
static __inline unsigned int
get_UnaryOpcodeExtension_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 12)) & 0x3f);
}
static __inline unsigned int
get_UnaryOpcodeExtension_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 43)) & 0x3f);
}
static __inline unsigned int
get_UnaryOpcodeExtension_Y0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 12)) & 0x3f);
}
static __inline unsigned int
get_UnaryOpcodeExtension_Y1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 43)) & 0x3f);
}
static __inline int
sign_extend(int n, int num_bits)
{
int shift = (int)(sizeof(int) * 8 - num_bits);
return (n << shift) >> shift;
}
static __inline tilegx_bundle_bits
create_BFEnd_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 12);
}
static __inline tilegx_bundle_bits
create_BFOpcodeExtension_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0xf) << 24);
}
static __inline tilegx_bundle_bits
create_BFStart_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 18);
}
static __inline tilegx_bundle_bits
create_BrOff_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) |
(((tilegx_bundle_bits)(n & 0x0001ffc0)) << 37);
}
static __inline tilegx_bundle_bits
create_BrType_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x1f)) << 54);
}
static __inline tilegx_bundle_bits
create_Dest_Imm8_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) |
(((tilegx_bundle_bits)(n & 0x000000c0)) << 43);
}
static __inline tilegx_bundle_bits
create_Dest_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 0);
}
static __inline tilegx_bundle_bits
create_Dest_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3f)) << 31);
}
static __inline tilegx_bundle_bits
create_Dest_Y0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 0);
}
static __inline tilegx_bundle_bits
create_Dest_Y1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3f)) << 31);
}
static __inline tilegx_bundle_bits
create_Imm16_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0xffff) << 12);
}
static __inline tilegx_bundle_bits
create_Imm16_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0xffff)) << 43);
}
static __inline tilegx_bundle_bits
create_Imm8OpcodeExtension_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0xff) << 20);
}
static __inline tilegx_bundle_bits
create_Imm8OpcodeExtension_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0xff)) << 51);
}
static __inline tilegx_bundle_bits
create_Imm8_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0xff) << 12);
}
static __inline tilegx_bundle_bits
create_Imm8_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0xff)) << 43);
}
static __inline tilegx_bundle_bits
create_Imm8_Y0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0xff) << 12);
}
static __inline tilegx_bundle_bits
create_Imm8_Y1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0xff)) << 43);
}
static __inline tilegx_bundle_bits
create_JumpOff_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x7ffffff)) << 31);
}
static __inline tilegx_bundle_bits
create_JumpOpcodeExtension_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x1)) << 58);
}
static __inline tilegx_bundle_bits
create_MF_Imm14_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3fff)) << 37);
}
static __inline tilegx_bundle_bits
create_MT_Imm14_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) |
(((tilegx_bundle_bits)(n & 0x00003fc0)) << 37);
}
static __inline tilegx_bundle_bits
create_Mode(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3)) << 62);
}
static __inline tilegx_bundle_bits
create_Opcode_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x7) << 28);
}
static __inline tilegx_bundle_bits
create_Opcode_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x7)) << 59);
}
static __inline tilegx_bundle_bits
create_Opcode_Y0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0xf) << 27);
}
static __inline tilegx_bundle_bits
create_Opcode_Y1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0xf)) << 58);
}
static __inline tilegx_bundle_bits
create_Opcode_Y2(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x00000001) << 26) |
(((tilegx_bundle_bits)(n & 0x00000002)) << 56);
}
static __inline tilegx_bundle_bits
create_RRROpcodeExtension_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3ff) << 18);
}
static __inline tilegx_bundle_bits
create_RRROpcodeExtension_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3ff)) << 49);
}
static __inline tilegx_bundle_bits
create_RRROpcodeExtension_Y0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3) << 18);
}
static __inline tilegx_bundle_bits
create_RRROpcodeExtension_Y1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3)) << 49);
}
static __inline tilegx_bundle_bits
create_ShAmt_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 12);
}
static __inline tilegx_bundle_bits
create_ShAmt_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3f)) << 43);
}
static __inline tilegx_bundle_bits
create_ShAmt_Y0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 12);
}
static __inline tilegx_bundle_bits
create_ShAmt_Y1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3f)) << 43);
}
static __inline tilegx_bundle_bits
create_ShiftOpcodeExtension_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3ff) << 18);
}
static __inline tilegx_bundle_bits
create_ShiftOpcodeExtension_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3ff)) << 49);
}
static __inline tilegx_bundle_bits
create_ShiftOpcodeExtension_Y0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3) << 18);
}
static __inline tilegx_bundle_bits
create_ShiftOpcodeExtension_Y1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3)) << 49);
}
static __inline tilegx_bundle_bits
create_SrcA_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 6);
}
static __inline tilegx_bundle_bits
create_SrcA_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3f)) << 37);
}
static __inline tilegx_bundle_bits
create_SrcA_Y0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 6);
}
static __inline tilegx_bundle_bits
create_SrcA_Y1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3f)) << 37);
}
static __inline tilegx_bundle_bits
create_SrcA_Y2(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 20);
}
static __inline tilegx_bundle_bits
create_SrcBDest_Y2(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3f)) << 51);
}
static __inline tilegx_bundle_bits
create_SrcB_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 12);
}
static __inline tilegx_bundle_bits
create_SrcB_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3f)) << 43);
}
static __inline tilegx_bundle_bits
create_SrcB_Y0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 12);
}
static __inline tilegx_bundle_bits
create_SrcB_Y1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3f)) << 43);
}
static __inline tilegx_bundle_bits
create_UnaryOpcodeExtension_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 12);
}
static __inline tilegx_bundle_bits
create_UnaryOpcodeExtension_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3f)) << 43);
}
static __inline tilegx_bundle_bits
create_UnaryOpcodeExtension_Y0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 12);
}
static __inline tilegx_bundle_bits
create_UnaryOpcodeExtension_Y1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3f)) << 43);
}
#ifndef _TILE_OPCODE_CONSTANTS_H
#define _TILE_OPCODE_CONSTANTS_H
enum
{
ADDI_IMM8_OPCODE_X0 = 1,
......@@ -606,4 +1399,7 @@ enum
XOR_RRR_5_OPCODE_Y1 = 3
};
#endif /* !_TILE_OPCODE_CONSTANTS_H */
#endif /* __ASSEMBLER__ */
#endif /* __ARCH_OPCODE_H__ */
include include/asm-generic/Kbuild.asm
header-y += ../arch/
header-y += ucontext.h
header-y += hardwall.h
......
此差异已折叠。
......@@ -15,6 +15,8 @@
#ifndef _ASM_TILE_SIGCONTEXT_H
#define _ASM_TILE_SIGCONTEXT_H
/* Don't pollute the namespace since <signal.h> includes this file. */
#define __need_int_reg_t
#include <arch/abi.h>
/*
......@@ -22,14 +24,14 @@
* but is simplified since we know the fault is from userspace.
*/
struct sigcontext {
uint_reg_t gregs[53]; /* General-purpose registers. */
uint_reg_t tp; /* Aliases gregs[TREG_TP]. */
uint_reg_t sp; /* Aliases gregs[TREG_SP]. */
uint_reg_t lr; /* Aliases gregs[TREG_LR]. */
uint_reg_t pc; /* Program counter. */
uint_reg_t ics; /* In Interrupt Critical Section? */
uint_reg_t faultnum; /* Fault number. */
uint_reg_t pad[5];
__uint_reg_t gregs[53]; /* General-purpose registers. */
__uint_reg_t tp; /* Aliases gregs[TREG_TP]. */
__uint_reg_t sp; /* Aliases gregs[TREG_SP]. */
__uint_reg_t lr; /* Aliases gregs[TREG_LR]. */
__uint_reg_t pc; /* Program counter. */
__uint_reg_t ics; /* In Interrupt Critical Section? */
__uint_reg_t faultnum; /* Fault number. */
__uint_reg_t pad[5];
};
#endif /* _ASM_TILE_SIGCONTEXT_H */
/*
* Copyright 2010 Tilera Corporation. All Rights Reserved.
* Copyright 2011 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
......@@ -12,19 +12,8 @@
* more details.
*/
#ifndef _ASM_TILE_OPCODE_TILE_H
#define _ASM_TILE_OPCODE_TILE_H
#include <arch/chip.h>
#if CHIP_WORD_SIZE() == 64
#include <asm/opcode-tile_64.h>
#ifndef __tilegx__
#include <asm/tile-desc_32.h>
#else
#include <asm/opcode-tile_32.h>
#include <asm/tile-desc_64.h>
#endif
/* These definitions are not correct for TILE64, so just avoid them. */
#undef TILE_ELF_MACHINE_CODE
#undef TILE_ELF_NAME
#endif /* _ASM_TILE_OPCODE_TILE_H */
/* TILEPro opcode information.
*
* Copyright 2011 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation, version 2.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for
* more details.
*
*
*
*
*
*/
#ifndef opcode_tilepro_h
#define opcode_tilepro_h
#include <arch/opcode.h>
enum
{
TILEPRO_MAX_OPERANDS = 5 /* mm */
};
typedef enum
{
TILEPRO_OPC_BPT,
TILEPRO_OPC_INFO,
TILEPRO_OPC_INFOL,
TILEPRO_OPC_J,
TILEPRO_OPC_JAL,
TILEPRO_OPC_MOVE,
TILEPRO_OPC_MOVE_SN,
TILEPRO_OPC_MOVEI,
TILEPRO_OPC_MOVEI_SN,
TILEPRO_OPC_MOVELI,
TILEPRO_OPC_MOVELI_SN,
TILEPRO_OPC_MOVELIS,
TILEPRO_OPC_PREFETCH,
TILEPRO_OPC_RAISE,
TILEPRO_OPC_ADD,
TILEPRO_OPC_ADD_SN,
TILEPRO_OPC_ADDB,
TILEPRO_OPC_ADDB_SN,
TILEPRO_OPC_ADDBS_U,
TILEPRO_OPC_ADDBS_U_SN,
TILEPRO_OPC_ADDH,
TILEPRO_OPC_ADDH_SN,
TILEPRO_OPC_ADDHS,
TILEPRO_OPC_ADDHS_SN,
TILEPRO_OPC_ADDI,
TILEPRO_OPC_ADDI_SN,
TILEPRO_OPC_ADDIB,
TILEPRO_OPC_ADDIB_SN,
TILEPRO_OPC_ADDIH,
TILEPRO_OPC_ADDIH_SN,
TILEPRO_OPC_ADDLI,
TILEPRO_OPC_ADDLI_SN,
TILEPRO_OPC_ADDLIS,
TILEPRO_OPC_ADDS,
TILEPRO_OPC_ADDS_SN,
TILEPRO_OPC_ADIFFB_U,
TILEPRO_OPC_ADIFFB_U_SN,
TILEPRO_OPC_ADIFFH,
TILEPRO_OPC_ADIFFH_SN,
TILEPRO_OPC_AND,
TILEPRO_OPC_AND_SN,
TILEPRO_OPC_ANDI,
TILEPRO_OPC_ANDI_SN,
TILEPRO_OPC_AULI,
TILEPRO_OPC_AVGB_U,
TILEPRO_OPC_AVGB_U_SN,
TILEPRO_OPC_AVGH,
TILEPRO_OPC_AVGH_SN,
TILEPRO_OPC_BBNS,
TILEPRO_OPC_BBNS_SN,
TILEPRO_OPC_BBNST,
TILEPRO_OPC_BBNST_SN,
TILEPRO_OPC_BBS,
TILEPRO_OPC_BBS_SN,
TILEPRO_OPC_BBST,
TILEPRO_OPC_BBST_SN,
TILEPRO_OPC_BGEZ,
TILEPRO_OPC_BGEZ_SN,
TILEPRO_OPC_BGEZT,
TILEPRO_OPC_BGEZT_SN,
TILEPRO_OPC_BGZ,
TILEPRO_OPC_BGZ_SN,
TILEPRO_OPC_BGZT,
TILEPRO_OPC_BGZT_SN,
TILEPRO_OPC_BITX,
TILEPRO_OPC_BITX_SN,
TILEPRO_OPC_BLEZ,
TILEPRO_OPC_BLEZ_SN,
TILEPRO_OPC_BLEZT,
TILEPRO_OPC_BLEZT_SN,
TILEPRO_OPC_BLZ,
TILEPRO_OPC_BLZ_SN,
TILEPRO_OPC_BLZT,
TILEPRO_OPC_BLZT_SN,
TILEPRO_OPC_BNZ,
TILEPRO_OPC_BNZ_SN,
TILEPRO_OPC_BNZT,
TILEPRO_OPC_BNZT_SN,
TILEPRO_OPC_BYTEX,
TILEPRO_OPC_BYTEX_SN,
TILEPRO_OPC_BZ,
TILEPRO_OPC_BZ_SN,
TILEPRO_OPC_BZT,
TILEPRO_OPC_BZT_SN,
TILEPRO_OPC_CLZ,
TILEPRO_OPC_CLZ_SN,
TILEPRO_OPC_CRC32_32,
TILEPRO_OPC_CRC32_32_SN,
TILEPRO_OPC_CRC32_8,
TILEPRO_OPC_CRC32_8_SN,
TILEPRO_OPC_CTZ,
TILEPRO_OPC_CTZ_SN,
TILEPRO_OPC_DRAIN,
TILEPRO_OPC_DTLBPR,
TILEPRO_OPC_DWORD_ALIGN,
TILEPRO_OPC_DWORD_ALIGN_SN,
TILEPRO_OPC_FINV,
TILEPRO_OPC_FLUSH,
TILEPRO_OPC_FNOP,
TILEPRO_OPC_ICOH,
TILEPRO_OPC_ILL,
TILEPRO_OPC_INTHB,
TILEPRO_OPC_INTHB_SN,
TILEPRO_OPC_INTHH,
TILEPRO_OPC_INTHH_SN,
TILEPRO_OPC_INTLB,
TILEPRO_OPC_INTLB_SN,
TILEPRO_OPC_INTLH,
TILEPRO_OPC_INTLH_SN,
TILEPRO_OPC_INV,
TILEPRO_OPC_IRET,
TILEPRO_OPC_JALB,
TILEPRO_OPC_JALF,
TILEPRO_OPC_JALR,
TILEPRO_OPC_JALRP,
TILEPRO_OPC_JB,
TILEPRO_OPC_JF,
TILEPRO_OPC_JR,
TILEPRO_OPC_JRP,
TILEPRO_OPC_LB,
TILEPRO_OPC_LB_SN,
TILEPRO_OPC_LB_U,
TILEPRO_OPC_LB_U_SN,
TILEPRO_OPC_LBADD,
TILEPRO_OPC_LBADD_SN,
TILEPRO_OPC_LBADD_U,
TILEPRO_OPC_LBADD_U_SN,
TILEPRO_OPC_LH,
TILEPRO_OPC_LH_SN,
TILEPRO_OPC_LH_U,
TILEPRO_OPC_LH_U_SN,
TILEPRO_OPC_LHADD,
TILEPRO_OPC_LHADD_SN,
TILEPRO_OPC_LHADD_U,
TILEPRO_OPC_LHADD_U_SN,
TILEPRO_OPC_LNK,
TILEPRO_OPC_LNK_SN,
TILEPRO_OPC_LW,
TILEPRO_OPC_LW_SN,
TILEPRO_OPC_LW_NA,
TILEPRO_OPC_LW_NA_SN,
TILEPRO_OPC_LWADD,
TILEPRO_OPC_LWADD_SN,
TILEPRO_OPC_LWADD_NA,
TILEPRO_OPC_LWADD_NA_SN,
TILEPRO_OPC_MAXB_U,
TILEPRO_OPC_MAXB_U_SN,
TILEPRO_OPC_MAXH,
TILEPRO_OPC_MAXH_SN,
TILEPRO_OPC_MAXIB_U,
TILEPRO_OPC_MAXIB_U_SN,
TILEPRO_OPC_MAXIH,
TILEPRO_OPC_MAXIH_SN,
TILEPRO_OPC_MF,
TILEPRO_OPC_MFSPR,
TILEPRO_OPC_MINB_U,
TILEPRO_OPC_MINB_U_SN,
TILEPRO_OPC_MINH,
TILEPRO_OPC_MINH_SN,
TILEPRO_OPC_MINIB_U,
TILEPRO_OPC_MINIB_U_SN,
TILEPRO_OPC_MINIH,
TILEPRO_OPC_MINIH_SN,
TILEPRO_OPC_MM,
TILEPRO_OPC_MNZ,
TILEPRO_OPC_MNZ_SN,
TILEPRO_OPC_MNZB,
TILEPRO_OPC_MNZB_SN,
TILEPRO_OPC_MNZH,
TILEPRO_OPC_MNZH_SN,
TILEPRO_OPC_MTSPR,
TILEPRO_OPC_MULHH_SS,
TILEPRO_OPC_MULHH_SS_SN,
TILEPRO_OPC_MULHH_SU,
TILEPRO_OPC_MULHH_SU_SN,
TILEPRO_OPC_MULHH_UU,
TILEPRO_OPC_MULHH_UU_SN,
TILEPRO_OPC_MULHHA_SS,
TILEPRO_OPC_MULHHA_SS_SN,
TILEPRO_OPC_MULHHA_SU,
TILEPRO_OPC_MULHHA_SU_SN,
TILEPRO_OPC_MULHHA_UU,
TILEPRO_OPC_MULHHA_UU_SN,
TILEPRO_OPC_MULHHSA_UU,
TILEPRO_OPC_MULHHSA_UU_SN,
TILEPRO_OPC_MULHL_SS,
TILEPRO_OPC_MULHL_SS_SN,
TILEPRO_OPC_MULHL_SU,
TILEPRO_OPC_MULHL_SU_SN,
TILEPRO_OPC_MULHL_US,
TILEPRO_OPC_MULHL_US_SN,
TILEPRO_OPC_MULHL_UU,
TILEPRO_OPC_MULHL_UU_SN,
TILEPRO_OPC_MULHLA_SS,
TILEPRO_OPC_MULHLA_SS_SN,
TILEPRO_OPC_MULHLA_SU,
TILEPRO_OPC_MULHLA_SU_SN,
TILEPRO_OPC_MULHLA_US,
TILEPRO_OPC_MULHLA_US_SN,
TILEPRO_OPC_MULHLA_UU,
TILEPRO_OPC_MULHLA_UU_SN,
TILEPRO_OPC_MULHLSA_UU,
TILEPRO_OPC_MULHLSA_UU_SN,
TILEPRO_OPC_MULLL_SS,
TILEPRO_OPC_MULLL_SS_SN,
TILEPRO_OPC_MULLL_SU,
TILEPRO_OPC_MULLL_SU_SN,
TILEPRO_OPC_MULLL_UU,
TILEPRO_OPC_MULLL_UU_SN,
TILEPRO_OPC_MULLLA_SS,
TILEPRO_OPC_MULLLA_SS_SN,
TILEPRO_OPC_MULLLA_SU,
TILEPRO_OPC_MULLLA_SU_SN,
TILEPRO_OPC_MULLLA_UU,
TILEPRO_OPC_MULLLA_UU_SN,
TILEPRO_OPC_MULLLSA_UU,
TILEPRO_OPC_MULLLSA_UU_SN,
TILEPRO_OPC_MVNZ,
TILEPRO_OPC_MVNZ_SN,
TILEPRO_OPC_MVZ,
TILEPRO_OPC_MVZ_SN,
TILEPRO_OPC_MZ,
TILEPRO_OPC_MZ_SN,
TILEPRO_OPC_MZB,
TILEPRO_OPC_MZB_SN,
TILEPRO_OPC_MZH,
TILEPRO_OPC_MZH_SN,
TILEPRO_OPC_NAP,
TILEPRO_OPC_NOP,
TILEPRO_OPC_NOR,
TILEPRO_OPC_NOR_SN,
TILEPRO_OPC_OR,
TILEPRO_OPC_OR_SN,
TILEPRO_OPC_ORI,
TILEPRO_OPC_ORI_SN,
TILEPRO_OPC_PACKBS_U,
TILEPRO_OPC_PACKBS_U_SN,
TILEPRO_OPC_PACKHB,
TILEPRO_OPC_PACKHB_SN,
TILEPRO_OPC_PACKHS,
TILEPRO_OPC_PACKHS_SN,
TILEPRO_OPC_PACKLB,
TILEPRO_OPC_PACKLB_SN,
TILEPRO_OPC_PCNT,
TILEPRO_OPC_PCNT_SN,
TILEPRO_OPC_RL,
TILEPRO_OPC_RL_SN,
TILEPRO_OPC_RLI,
TILEPRO_OPC_RLI_SN,
TILEPRO_OPC_S1A,
TILEPRO_OPC_S1A_SN,
TILEPRO_OPC_S2A,
TILEPRO_OPC_S2A_SN,
TILEPRO_OPC_S3A,
TILEPRO_OPC_S3A_SN,
TILEPRO_OPC_SADAB_U,
TILEPRO_OPC_SADAB_U_SN,
TILEPRO_OPC_SADAH,
TILEPRO_OPC_SADAH_SN,
TILEPRO_OPC_SADAH_U,
TILEPRO_OPC_SADAH_U_SN,
TILEPRO_OPC_SADB_U,
TILEPRO_OPC_SADB_U_SN,
TILEPRO_OPC_SADH,
TILEPRO_OPC_SADH_SN,
TILEPRO_OPC_SADH_U,
TILEPRO_OPC_SADH_U_SN,
TILEPRO_OPC_SB,
TILEPRO_OPC_SBADD,
TILEPRO_OPC_SEQ,
TILEPRO_OPC_SEQ_SN,
TILEPRO_OPC_SEQB,
TILEPRO_OPC_SEQB_SN,
TILEPRO_OPC_SEQH,
TILEPRO_OPC_SEQH_SN,
TILEPRO_OPC_SEQI,
TILEPRO_OPC_SEQI_SN,
TILEPRO_OPC_SEQIB,
TILEPRO_OPC_SEQIB_SN,
TILEPRO_OPC_SEQIH,
TILEPRO_OPC_SEQIH_SN,
TILEPRO_OPC_SH,
TILEPRO_OPC_SHADD,
TILEPRO_OPC_SHL,
TILEPRO_OPC_SHL_SN,
TILEPRO_OPC_SHLB,
TILEPRO_OPC_SHLB_SN,
TILEPRO_OPC_SHLH,
TILEPRO_OPC_SHLH_SN,
TILEPRO_OPC_SHLI,
TILEPRO_OPC_SHLI_SN,
TILEPRO_OPC_SHLIB,
TILEPRO_OPC_SHLIB_SN,
TILEPRO_OPC_SHLIH,
TILEPRO_OPC_SHLIH_SN,
TILEPRO_OPC_SHR,
TILEPRO_OPC_SHR_SN,
TILEPRO_OPC_SHRB,
TILEPRO_OPC_SHRB_SN,
TILEPRO_OPC_SHRH,
TILEPRO_OPC_SHRH_SN,
TILEPRO_OPC_SHRI,
TILEPRO_OPC_SHRI_SN,
TILEPRO_OPC_SHRIB,
TILEPRO_OPC_SHRIB_SN,
TILEPRO_OPC_SHRIH,
TILEPRO_OPC_SHRIH_SN,
TILEPRO_OPC_SLT,
TILEPRO_OPC_SLT_SN,
TILEPRO_OPC_SLT_U,
TILEPRO_OPC_SLT_U_SN,
TILEPRO_OPC_SLTB,
TILEPRO_OPC_SLTB_SN,
TILEPRO_OPC_SLTB_U,
TILEPRO_OPC_SLTB_U_SN,
TILEPRO_OPC_SLTE,
TILEPRO_OPC_SLTE_SN,
TILEPRO_OPC_SLTE_U,
TILEPRO_OPC_SLTE_U_SN,
TILEPRO_OPC_SLTEB,
TILEPRO_OPC_SLTEB_SN,
TILEPRO_OPC_SLTEB_U,
TILEPRO_OPC_SLTEB_U_SN,
TILEPRO_OPC_SLTEH,
TILEPRO_OPC_SLTEH_SN,
TILEPRO_OPC_SLTEH_U,
TILEPRO_OPC_SLTEH_U_SN,
TILEPRO_OPC_SLTH,
TILEPRO_OPC_SLTH_SN,
TILEPRO_OPC_SLTH_U,
TILEPRO_OPC_SLTH_U_SN,
TILEPRO_OPC_SLTI,
TILEPRO_OPC_SLTI_SN,
TILEPRO_OPC_SLTI_U,
TILEPRO_OPC_SLTI_U_SN,
TILEPRO_OPC_SLTIB,
TILEPRO_OPC_SLTIB_SN,
TILEPRO_OPC_SLTIB_U,
TILEPRO_OPC_SLTIB_U_SN,
TILEPRO_OPC_SLTIH,
TILEPRO_OPC_SLTIH_SN,
TILEPRO_OPC_SLTIH_U,
TILEPRO_OPC_SLTIH_U_SN,
TILEPRO_OPC_SNE,
TILEPRO_OPC_SNE_SN,
TILEPRO_OPC_SNEB,
TILEPRO_OPC_SNEB_SN,
TILEPRO_OPC_SNEH,
TILEPRO_OPC_SNEH_SN,
TILEPRO_OPC_SRA,
TILEPRO_OPC_SRA_SN,
TILEPRO_OPC_SRAB,
TILEPRO_OPC_SRAB_SN,
TILEPRO_OPC_SRAH,
TILEPRO_OPC_SRAH_SN,
TILEPRO_OPC_SRAI,
TILEPRO_OPC_SRAI_SN,
TILEPRO_OPC_SRAIB,
TILEPRO_OPC_SRAIB_SN,
TILEPRO_OPC_SRAIH,
TILEPRO_OPC_SRAIH_SN,
TILEPRO_OPC_SUB,
TILEPRO_OPC_SUB_SN,
TILEPRO_OPC_SUBB,
TILEPRO_OPC_SUBB_SN,
TILEPRO_OPC_SUBBS_U,
TILEPRO_OPC_SUBBS_U_SN,
TILEPRO_OPC_SUBH,
TILEPRO_OPC_SUBH_SN,
TILEPRO_OPC_SUBHS,
TILEPRO_OPC_SUBHS_SN,
TILEPRO_OPC_SUBS,
TILEPRO_OPC_SUBS_SN,
TILEPRO_OPC_SW,
TILEPRO_OPC_SWADD,
TILEPRO_OPC_SWINT0,
TILEPRO_OPC_SWINT1,
TILEPRO_OPC_SWINT2,
TILEPRO_OPC_SWINT3,
TILEPRO_OPC_TBLIDXB0,
TILEPRO_OPC_TBLIDXB0_SN,
TILEPRO_OPC_TBLIDXB1,
TILEPRO_OPC_TBLIDXB1_SN,
TILEPRO_OPC_TBLIDXB2,
TILEPRO_OPC_TBLIDXB2_SN,
TILEPRO_OPC_TBLIDXB3,
TILEPRO_OPC_TBLIDXB3_SN,
TILEPRO_OPC_TNS,
TILEPRO_OPC_TNS_SN,
TILEPRO_OPC_WH64,
TILEPRO_OPC_XOR,
TILEPRO_OPC_XOR_SN,
TILEPRO_OPC_XORI,
TILEPRO_OPC_XORI_SN,
TILEPRO_OPC_NONE
} tilepro_mnemonic;
typedef enum
{
TILEPRO_PIPELINE_X0,
TILEPRO_PIPELINE_X1,
TILEPRO_PIPELINE_Y0,
TILEPRO_PIPELINE_Y1,
TILEPRO_PIPELINE_Y2,
} tilepro_pipeline;
#define tilepro_is_x_pipeline(p) ((int)(p) <= (int)TILEPRO_PIPELINE_X1)
typedef enum
{
TILEPRO_OP_TYPE_REGISTER,
TILEPRO_OP_TYPE_IMMEDIATE,
TILEPRO_OP_TYPE_ADDRESS,
TILEPRO_OP_TYPE_SPR
} tilepro_operand_type;
struct tilepro_operand
{
/* Is this operand a register, immediate or address? */
tilepro_operand_type type;
/* The default relocation type for this operand. */
signed int default_reloc : 16;
/* How many bits is this value? (used for range checking) */
unsigned int num_bits : 5;
/* Is the value signed? (used for range checking) */
unsigned int is_signed : 1;
/* Is this operand a source register? */
unsigned int is_src_reg : 1;
/* Is this operand written? (i.e. is it a destination register) */
unsigned int is_dest_reg : 1;
/* Is this operand PC-relative? */
unsigned int is_pc_relative : 1;
/* By how many bits do we right shift the value before inserting? */
unsigned int rightshift : 2;
/* Return the bits for this operand to be ORed into an existing bundle. */
tilepro_bundle_bits (*insert) (int op);
/* Extract this operand and return it. */
unsigned int (*extract) (tilepro_bundle_bits bundle);
};
extern const struct tilepro_operand tilepro_operands[];
/* One finite-state machine per pipe for rapid instruction decoding. */
extern const unsigned short * const
tilepro_bundle_decoder_fsms[TILEPRO_NUM_PIPELINE_ENCODINGS];
struct tilepro_opcode
{
/* The opcode mnemonic, e.g. "add" */
const char *name;
/* The enum value for this mnemonic. */
tilepro_mnemonic mnemonic;
/* A bit mask of which of the five pipes this instruction
is compatible with:
X0 0x01
X1 0x02
Y0 0x04
Y1 0x08
Y2 0x10 */
unsigned char pipes;
/* How many operands are there? */
unsigned char num_operands;
/* Which register does this write implicitly, or TREG_ZERO if none? */
unsigned char implicitly_written_register;
/* Can this be bundled with other instructions (almost always true). */
unsigned char can_bundle;
/* The description of the operands. Each of these is an
* index into the tilepro_operands[] table. */
unsigned char operands[TILEPRO_NUM_PIPELINE_ENCODINGS][TILEPRO_MAX_OPERANDS];
};
extern const struct tilepro_opcode tilepro_opcodes[];
/* Used for non-textual disassembly into structs. */
struct tilepro_decoded_instruction
{
const struct tilepro_opcode *opcode;
const struct tilepro_operand *operands[TILEPRO_MAX_OPERANDS];
int operand_values[TILEPRO_MAX_OPERANDS];
};
/* Disassemble a bundle into a struct for machine processing. */
extern int parse_insn_tilepro(tilepro_bundle_bits bits,
unsigned int pc,
struct tilepro_decoded_instruction
decoded[TILEPRO_MAX_INSTRUCTIONS_PER_BUNDLE]);
/* Given a set of bundle bits and a specific pipe, returns which
* instruction the bundle contains in that pipe.
*/
extern const struct tilepro_opcode *
find_opcode(tilepro_bundle_bits bits, tilepro_pipeline pipe);
#endif /* opcode_tilepro_h */
/* tile.h -- Header file for TILE opcode table
Copyright (C) 2005 Free Software Foundation, Inc.
Contributed by Tilera Corp. */
/* TILE-Gx opcode information.
*
* Copyright 2011 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation, version 2.
*
* This program is distributed in the hope that it will be useful, but
* WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
* NON INFRINGEMENT. See the GNU General Public License for
* more details.
*
*
*
*
*
*/
#ifndef opcode_tile_h
#define opcode_tile_h
typedef unsigned long long tilegx_bundle_bits;
#include <arch/opcode.h>
enum
......@@ -351,758 +367,6 @@ typedef enum
TILEGX_OPC_NONE
} tilegx_mnemonic;
/* 64-bit pattern for a { bpt ; nop } bundle. */
#define TILEGX_BPT_BUNDLE 0x286a44ae51485000ULL
#define TILE_ELF_MACHINE_CODE EM_TILE64
#define TILE_ELF_NAME "elf32-tile64"
static __inline unsigned int
get_BFEnd_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 12)) & 0x3f);
}
static __inline unsigned int
get_BFOpcodeExtension_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 24)) & 0xf);
}
static __inline unsigned int
get_BFStart_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 18)) & 0x3f);
}
static __inline unsigned int
get_BrOff_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 31)) & 0x0000003f) |
(((unsigned int)(n >> 37)) & 0x0001ffc0);
}
static __inline unsigned int
get_BrType_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 54)) & 0x1f);
}
static __inline unsigned int
get_Dest_Imm8_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 31)) & 0x0000003f) |
(((unsigned int)(n >> 43)) & 0x000000c0);
}
static __inline unsigned int
get_Dest_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 0)) & 0x3f);
}
static __inline unsigned int
get_Dest_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 31)) & 0x3f);
}
static __inline unsigned int
get_Dest_Y0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 0)) & 0x3f);
}
static __inline unsigned int
get_Dest_Y1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 31)) & 0x3f);
}
static __inline unsigned int
get_Imm16_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 12)) & 0xffff);
}
static __inline unsigned int
get_Imm16_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 43)) & 0xffff);
}
static __inline unsigned int
get_Imm8OpcodeExtension_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 20)) & 0xff);
}
static __inline unsigned int
get_Imm8OpcodeExtension_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 51)) & 0xff);
}
static __inline unsigned int
get_Imm8_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 12)) & 0xff);
}
static __inline unsigned int
get_Imm8_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 43)) & 0xff);
}
static __inline unsigned int
get_Imm8_Y0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 12)) & 0xff);
}
static __inline unsigned int
get_Imm8_Y1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 43)) & 0xff);
}
static __inline unsigned int
get_JumpOff_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 31)) & 0x7ffffff);
}
static __inline unsigned int
get_JumpOpcodeExtension_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 58)) & 0x1);
}
static __inline unsigned int
get_MF_Imm14_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 37)) & 0x3fff);
}
static __inline unsigned int
get_MT_Imm14_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 31)) & 0x0000003f) |
(((unsigned int)(n >> 37)) & 0x00003fc0);
}
static __inline unsigned int
get_Mode(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 62)) & 0x3);
}
static __inline unsigned int
get_Opcode_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 28)) & 0x7);
}
static __inline unsigned int
get_Opcode_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 59)) & 0x7);
}
static __inline unsigned int
get_Opcode_Y0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 27)) & 0xf);
}
static __inline unsigned int
get_Opcode_Y1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 58)) & 0xf);
}
static __inline unsigned int
get_Opcode_Y2(tilegx_bundle_bits n)
{
return (((n >> 26)) & 0x00000001) |
(((unsigned int)(n >> 56)) & 0x00000002);
}
static __inline unsigned int
get_RRROpcodeExtension_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 18)) & 0x3ff);
}
static __inline unsigned int
get_RRROpcodeExtension_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 49)) & 0x3ff);
}
static __inline unsigned int
get_RRROpcodeExtension_Y0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 18)) & 0x3);
}
static __inline unsigned int
get_RRROpcodeExtension_Y1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 49)) & 0x3);
}
static __inline unsigned int
get_ShAmt_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 12)) & 0x3f);
}
static __inline unsigned int
get_ShAmt_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 43)) & 0x3f);
}
static __inline unsigned int
get_ShAmt_Y0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 12)) & 0x3f);
}
static __inline unsigned int
get_ShAmt_Y1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 43)) & 0x3f);
}
static __inline unsigned int
get_ShiftOpcodeExtension_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 18)) & 0x3ff);
}
static __inline unsigned int
get_ShiftOpcodeExtension_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 49)) & 0x3ff);
}
static __inline unsigned int
get_ShiftOpcodeExtension_Y0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 18)) & 0x3);
}
static __inline unsigned int
get_ShiftOpcodeExtension_Y1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 49)) & 0x3);
}
static __inline unsigned int
get_SrcA_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 6)) & 0x3f);
}
static __inline unsigned int
get_SrcA_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 37)) & 0x3f);
}
static __inline unsigned int
get_SrcA_Y0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 6)) & 0x3f);
}
static __inline unsigned int
get_SrcA_Y1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 37)) & 0x3f);
}
static __inline unsigned int
get_SrcA_Y2(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 20)) & 0x3f);
}
static __inline unsigned int
get_SrcBDest_Y2(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 51)) & 0x3f);
}
static __inline unsigned int
get_SrcB_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 12)) & 0x3f);
}
static __inline unsigned int
get_SrcB_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 43)) & 0x3f);
}
static __inline unsigned int
get_SrcB_Y0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 12)) & 0x3f);
}
static __inline unsigned int
get_SrcB_Y1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 43)) & 0x3f);
}
static __inline unsigned int
get_UnaryOpcodeExtension_X0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 12)) & 0x3f);
}
static __inline unsigned int
get_UnaryOpcodeExtension_X1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 43)) & 0x3f);
}
static __inline unsigned int
get_UnaryOpcodeExtension_Y0(tilegx_bundle_bits num)
{
const unsigned int n = (unsigned int)num;
return (((n >> 12)) & 0x3f);
}
static __inline unsigned int
get_UnaryOpcodeExtension_Y1(tilegx_bundle_bits n)
{
return (((unsigned int)(n >> 43)) & 0x3f);
}
static __inline int
sign_extend(int n, int num_bits)
{
int shift = (int)(sizeof(int) * 8 - num_bits);
return (n << shift) >> shift;
}
static __inline tilegx_bundle_bits
create_BFEnd_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 12);
}
static __inline tilegx_bundle_bits
create_BFOpcodeExtension_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0xf) << 24);
}
static __inline tilegx_bundle_bits
create_BFStart_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 18);
}
static __inline tilegx_bundle_bits
create_BrOff_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) |
(((tilegx_bundle_bits)(n & 0x0001ffc0)) << 37);
}
static __inline tilegx_bundle_bits
create_BrType_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x1f)) << 54);
}
static __inline tilegx_bundle_bits
create_Dest_Imm8_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) |
(((tilegx_bundle_bits)(n & 0x000000c0)) << 43);
}
static __inline tilegx_bundle_bits
create_Dest_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 0);
}
static __inline tilegx_bundle_bits
create_Dest_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3f)) << 31);
}
static __inline tilegx_bundle_bits
create_Dest_Y0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 0);
}
static __inline tilegx_bundle_bits
create_Dest_Y1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3f)) << 31);
}
static __inline tilegx_bundle_bits
create_Imm16_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0xffff) << 12);
}
static __inline tilegx_bundle_bits
create_Imm16_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0xffff)) << 43);
}
static __inline tilegx_bundle_bits
create_Imm8OpcodeExtension_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0xff) << 20);
}
static __inline tilegx_bundle_bits
create_Imm8OpcodeExtension_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0xff)) << 51);
}
static __inline tilegx_bundle_bits
create_Imm8_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0xff) << 12);
}
static __inline tilegx_bundle_bits
create_Imm8_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0xff)) << 43);
}
static __inline tilegx_bundle_bits
create_Imm8_Y0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0xff) << 12);
}
static __inline tilegx_bundle_bits
create_Imm8_Y1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0xff)) << 43);
}
static __inline tilegx_bundle_bits
create_JumpOff_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x7ffffff)) << 31);
}
static __inline tilegx_bundle_bits
create_JumpOpcodeExtension_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x1)) << 58);
}
static __inline tilegx_bundle_bits
create_MF_Imm14_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3fff)) << 37);
}
static __inline tilegx_bundle_bits
create_MT_Imm14_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) |
(((tilegx_bundle_bits)(n & 0x00003fc0)) << 37);
}
static __inline tilegx_bundle_bits
create_Mode(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3)) << 62);
}
static __inline tilegx_bundle_bits
create_Opcode_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x7) << 28);
}
static __inline tilegx_bundle_bits
create_Opcode_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x7)) << 59);
}
static __inline tilegx_bundle_bits
create_Opcode_Y0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0xf) << 27);
}
static __inline tilegx_bundle_bits
create_Opcode_Y1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0xf)) << 58);
}
static __inline tilegx_bundle_bits
create_Opcode_Y2(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x00000001) << 26) |
(((tilegx_bundle_bits)(n & 0x00000002)) << 56);
}
static __inline tilegx_bundle_bits
create_RRROpcodeExtension_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3ff) << 18);
}
static __inline tilegx_bundle_bits
create_RRROpcodeExtension_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3ff)) << 49);
}
static __inline tilegx_bundle_bits
create_RRROpcodeExtension_Y0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3) << 18);
}
static __inline tilegx_bundle_bits
create_RRROpcodeExtension_Y1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3)) << 49);
}
static __inline tilegx_bundle_bits
create_ShAmt_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 12);
}
static __inline tilegx_bundle_bits
create_ShAmt_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3f)) << 43);
}
static __inline tilegx_bundle_bits
create_ShAmt_Y0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 12);
}
static __inline tilegx_bundle_bits
create_ShAmt_Y1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3f)) << 43);
}
static __inline tilegx_bundle_bits
create_ShiftOpcodeExtension_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3ff) << 18);
}
static __inline tilegx_bundle_bits
create_ShiftOpcodeExtension_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3ff)) << 49);
}
static __inline tilegx_bundle_bits
create_ShiftOpcodeExtension_Y0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3) << 18);
}
static __inline tilegx_bundle_bits
create_ShiftOpcodeExtension_Y1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3)) << 49);
}
static __inline tilegx_bundle_bits
create_SrcA_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 6);
}
static __inline tilegx_bundle_bits
create_SrcA_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3f)) << 37);
}
static __inline tilegx_bundle_bits
create_SrcA_Y0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 6);
}
static __inline tilegx_bundle_bits
create_SrcA_Y1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3f)) << 37);
}
static __inline tilegx_bundle_bits
create_SrcA_Y2(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 20);
}
static __inline tilegx_bundle_bits
create_SrcBDest_Y2(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3f)) << 51);
}
static __inline tilegx_bundle_bits
create_SrcB_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 12);
}
static __inline tilegx_bundle_bits
create_SrcB_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3f)) << 43);
}
static __inline tilegx_bundle_bits
create_SrcB_Y0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 12);
}
static __inline tilegx_bundle_bits
create_SrcB_Y1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3f)) << 43);
}
static __inline tilegx_bundle_bits
create_UnaryOpcodeExtension_X0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 12);
}
static __inline tilegx_bundle_bits
create_UnaryOpcodeExtension_X1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3f)) << 43);
}
static __inline tilegx_bundle_bits
create_UnaryOpcodeExtension_Y0(int num)
{
const unsigned int n = (unsigned int)num;
return ((n & 0x3f) << 12);
}
static __inline tilegx_bundle_bits
create_UnaryOpcodeExtension_Y1(int num)
{
const unsigned int n = (unsigned int)num;
return (((tilegx_bundle_bits)(n & 0x3f)) << 43);
}
typedef enum
......@@ -1124,35 +388,6 @@ typedef enum
TILEGX_OP_TYPE_SPR
} tilegx_operand_type;
/* These are the bits that determine if a bundle is in the X encoding. */
#define TILEGX_BUNDLE_MODE_MASK ((tilegx_bundle_bits)3 << 62)
enum
{
/* Maximum number of instructions in a bundle (2 for X, 3 for Y). */
TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE = 3,
/* How many different pipeline encodings are there? X0, X1, Y0, Y1, Y2. */
TILEGX_NUM_PIPELINE_ENCODINGS = 5,
/* Log base 2 of TILEGX_BUNDLE_SIZE_IN_BYTES. */
TILEGX_LOG2_BUNDLE_SIZE_IN_BYTES = 3,
/* Instructions take this many bytes. */
TILEGX_BUNDLE_SIZE_IN_BYTES = 1 << TILEGX_LOG2_BUNDLE_SIZE_IN_BYTES,
/* Log base 2 of TILEGX_BUNDLE_ALIGNMENT_IN_BYTES. */
TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES = 3,
/* Bundles should be aligned modulo this number of bytes. */
TILEGX_BUNDLE_ALIGNMENT_IN_BYTES =
(1 << TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES),
/* Number of registers (some are magic, such as network I/O). */
TILEGX_NUM_REGISTERS = 64,
};
struct tilegx_operand
{
/* Is this operand a register, immediate or address? */
......
/*
* Copyright 2010 Tilera Corporation. All Rights Reserved.
* Copyright 2011 Tilera Corporation. All Rights Reserved.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
......@@ -15,13 +15,11 @@
#include <linux/kernel.h>
#include <linux/string.h>
#include <asm/backtrace.h>
#include <asm/opcode-tile.h>
#include <asm/tile-desc.h>
#include <arch/abi.h>
#ifdef __tilegx__
#define tile_bundle_bits tilegx_bundle_bits
#define TILE_MAX_INSTRUCTIONS_PER_BUNDLE TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE
#define TILE_BUNDLE_ALIGNMENT_IN_BYTES TILEGX_BUNDLE_ALIGNMENT_IN_BYTES
#define tile_decoded_instruction tilegx_decoded_instruction
#define tile_mnemonic tilegx_mnemonic
#define parse_insn_tile parse_insn_tilegx
......@@ -35,7 +33,18 @@
#define OPCODE_STORE TILEGX_OPC_ST
typedef long long bt_int_reg_t;
#else
#define OPCODE_STORE TILE_OPC_SW
#define TILE_MAX_INSTRUCTIONS_PER_BUNDLE TILEPRO_MAX_INSTRUCTIONS_PER_BUNDLE
#define tile_decoded_instruction tilepro_decoded_instruction
#define tile_mnemonic tilepro_mnemonic
#define parse_insn_tile parse_insn_tilepro
#define TILE_OPC_IRET TILEPRO_OPC_IRET
#define TILE_OPC_ADDI TILEPRO_OPC_ADDI
#define TILE_OPC_ADDLI TILEPRO_OPC_ADDLI
#define TILE_OPC_INFO TILEPRO_OPC_INFO
#define TILE_OPC_INFOL TILEPRO_OPC_INFOL
#define TILE_OPC_JRP TILEPRO_OPC_JRP
#define TILE_OPC_MOVE TILEPRO_OPC_MOVE
#define OPCODE_STORE TILEPRO_OPC_SW
typedef int bt_int_reg_t;
#endif
......
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