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体验新版 GitCode,发现更多精彩内容 >>
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09074950
编写于
8月 19, 2015
作者:
V
Vineet Gupta
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电子邮件补丁
差异文件
ARC: add/fix some comments in code - no functional change
Signed-off-by:
N
Vineet Gupta
<
vgupta@synopsys.com
>
上级
6de6066c
变更
6
隐藏空白更改
内联
并排
Showing
6 changed file
with
23 addition
and
22 deletion
+23
-22
arch/arc/boot/dts/axc003.dtsi
arch/arc/boot/dts/axc003.dtsi
+7
-6
arch/arc/include/asm/cmpxchg.h
arch/arc/include/asm/cmpxchg.h
+11
-11
arch/arc/include/asm/perf_event.h
arch/arc/include/asm/perf_event.h
+1
-1
arch/arc/kernel/perf_event.c
arch/arc/kernel/perf_event.c
+2
-2
arch/arc/kernel/process.c
arch/arc/kernel/process.c
+1
-1
arch/arc/plat-axs10x/axs10x.c
arch/arc/plat-axs10x/axs10x.c
+1
-1
未找到文件。
arch/arc/boot/dts/axc003.dtsi
浏览文件 @
09074950
...
...
@@ -72,12 +72,13 @@
};
/*
* This INTC is actually connected to DW APB GPIO
* which acts as a wire between MB INTC and CPU INTC.
* GPIO INTC is configured in platform init code
* and here we mimic direct connection from MB INTC to
* CPU INTC, thus we set "interrupts = <7>" instead of
* "interrupts = <12>"
* The DW APB ICTL intc on MB is connected to CPU intc via a
* DT "invisible" DW APB GPIO block, configured to simply pass thru
* interrupts - setup accordinly in platform init (plat-axs10x/ax10x.c)
*
* So here we mimic a direct connection betwen them, ignoring the
* ABPG GPIO. Thus set "interrupts = <24>" (DW APB GPIO to core)
* instead of "interrupts = <12>" (DW APB ICTL to DW APB GPIO)
*
* This intc actually resides on MB, but we move it here to
* avoid duplicating the MB dtsi file given that IRQ from
...
...
arch/arc/include/asm/cmpxchg.h
浏览文件 @
09074950
...
...
@@ -110,18 +110,18 @@ static inline unsigned long __xchg(unsigned long val, volatile void *ptr,
sizeof(*(ptr))))
/*
*
On ARC700, EX insn is inherently atomic, so by default "vanilla" xchg() need
*
not require any locking. However there's a quirk.
*
ARC lacks native CMPXCHG, thus emulated (see above), using external locking -
*
incidently it "reuses" the same atomic_ops_lock used by atomic APIs.
*
Now, llist code uses cmpxchg() and xchg() on same data, so xchg() needs to
*
abide by same serializing rules, thus ends up using atomic_ops_lock as well
.
*
xchg() maps directly to ARC EX instruction which guarantees atomicity.
*
However in !LLSC config, it also needs to be use @atomic_ops_lock spinlock
*
due to a subtle reason:
*
- For !LLSC, cmpxchg() needs to use that lock (see above) and there is lot
*
of kernel code which calls xchg()/cmpxchg() on same data (see llist.h)
*
Hence xchg() needs to follow same locking rules
.
*
* T
his however is only relevant if SMP and/or ARC lacks LLSC
*
if (UP or LLSC)
*
xchg doesn't need serialization
*
else <==> !(UP or LLSC) <==> (!UP and !LLSC) <==> (SMP and !LLSC)
*
xchg needs serialization
* T
echnically the lock is also needed for UP (boils down to irq save/restore)
*
but we can cheat a bit since cmpxchg() atomic_ops_lock() would cause irqs to
*
be disabled thus can't possibly be interrpted/preempted/clobbered by xchg()
*
Other way around, xchg is one instruction anyways, so can't be interrupted
*
as such
*/
#if !defined(CONFIG_ARC_HAS_LLSC) && defined(CONFIG_SMP)
...
...
arch/arc/include/asm/perf_event.h
浏览文件 @
09074950
...
...
@@ -95,7 +95,7 @@ static const char * const arc_pmu_ev_hw_map[] = {
/* counts condition */
[
PERF_COUNT_HW_INSTRUCTIONS
]
=
"iall"
,
[
PERF_COUNT_HW_BRANCH_INSTRUCTIONS
]
=
"ijmp"
,
[
PERF_COUNT_HW_BRANCH_INSTRUCTIONS
]
=
"ijmp"
,
/* Excludes ZOL jumps */
[
PERF_COUNT_ARC_BPOK
]
=
"bpok"
,
/* NP-NT, PT-T, PNT-NT */
[
PERF_COUNT_HW_BRANCH_MISSES
]
=
"bpfail"
,
/* NP-T, PT-NT, PNT-T */
...
...
arch/arc/kernel/perf_event.c
浏览文件 @
09074950
...
...
@@ -199,8 +199,8 @@ static void arc_pmu_start(struct perf_event *event, int flags)
event
->
hw
.
state
=
0
;
/* enable ARC pmu here */
write_aux_reg
(
ARC_REG_PCT_INDEX
,
idx
);
write_aux_reg
(
ARC_REG_PCT_CONFIG
,
hwc
->
config
);
write_aux_reg
(
ARC_REG_PCT_INDEX
,
idx
);
/* counter # */
write_aux_reg
(
ARC_REG_PCT_CONFIG
,
hwc
->
config
);
/* condition */
}
static
void
arc_pmu_stop
(
struct
perf_event
*
event
,
int
flags
)
...
...
arch/arc/kernel/process.c
浏览文件 @
09074950
...
...
@@ -65,7 +65,7 @@ asmlinkage void ret_from_fork(void);
* ------------------
* | r25 | <==== top of Stack (thread.ksp)
* ~ ~
* | --to-- | (CALLEE Regs of
user
mode)
* | --to-- | (CALLEE Regs of
kernel
mode)
* | r13 |
* ------------------
* | fp |
...
...
arch/arc/plat-axs10x/axs10x.c
浏览文件 @
09074950
...
...
@@ -46,7 +46,7 @@ static void __init axs10x_enable_gpio_intc_wire(void)
* ------------------- -------------------
* | snps,dw-apb-gpio | | snps,dw-apb-gpio |
* ------------------- -------------------
* |
|
* |
#12
|
* | [ Debug UART on cpu card ]
* |
* ------------------------
...
...
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