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    USB: ehci: add workaround for Synopsys HC bug · 2f7ac6c1
    Gabor Juhos 提交于
    A Synopsys USB core used in various SoCs has a bug which might cause
    that the host controller not issuing ping.
    
    When software uses the Doorbell mechanism to remove queue heads, the
    host controller still has references to the removed queue head even
    after indicating an Interrupt on Async Advance. This happens if the last
    executed queue head's Next Link queue head is removed.
    
    Consequences of the defect:
    The Host controller fetches the removed queue head, using memory that
    would otherwise be deallocated.This results in incorrect transactions on
    both the USB and system memory. This may result in undefined behavior.
    
    Workarounds:
    
    1) If no queue head is active (no Status field's Active bit is set)
    after removing the queue heads, the software can write one of the valid
    queue head addresses to the ASYNCLISTADDR register and deallocate the
    removed queue head's memory after 2 microframes.
    
    If one or more of the queue heads is active (the Active bit is set in
    the Status field) after removing the queue heads, the software can delay
    memory deallocation after time X, where X is the time required for the
    Host Controller to go through all the queue heads once. X varies with
    the number of queue heads and the time required to process periodic
    transactions: if more periodic transactions must be performed, the Host
    Controller has less time to process asynchronous transaction processing.
    
    2) Do not use the Doorbell mechanism to remove the queue heads. Disable
    the Asynchronous Schedule Enable bit instead.
    
    The bug has been discussed on the linux-usb-devel mailing-list
    four years ago, the original thread can be found here:
    http://www.mail-archive.com/linux-usb-devel@lists.sourceforge.net/msg45345.html
    
    This patch implements the first workaround as suggested by David Brownell.
    
    The built-in USB host controller of the Atheros AR7130/AR7141/AR7161 SoCs
    requires this to work properly.
    Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
    Acked-by: NAlan Stern <stern@rowland.harvard.edu>
    Signed-off-by: NGreg Kroah-Hartman <gregkh@suse.de>
    2f7ac6c1
ehci.h 22.4 KB