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35cd668c
编写于
7月 19, 2019
作者:
Nameless-Y
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操作
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电子邮件补丁
差异文件
[bsp][stm32/libraries/HAL_Drivers] F0 系列支持SPI,并修复DMA中断函数重复定义
上级
6483abbc
变更
3
隐藏空白更改
内联
并排
Showing
3 changed file
with
102 addition
and
18 deletion
+102
-18
bsp/stm32/libraries/HAL_Drivers/config/f0/dma_config.h
bsp/stm32/libraries/HAL_Drivers/config/f0/dma_config.h
+12
-0
bsp/stm32/libraries/HAL_Drivers/config/f0/spi_config.h
bsp/stm32/libraries/HAL_Drivers/config/f0/spi_config.h
+61
-13
bsp/stm32/libraries/HAL_Drivers/drv_spi.c
bsp/stm32/libraries/HAL_Drivers/drv_spi.c
+29
-5
未找到文件。
bsp/stm32/libraries/HAL_Drivers/config/f0/dma_config.h
浏览文件 @
35cd668c
...
...
@@ -26,6 +26,18 @@ extern "C" {
#define UART1_RX_DMA_RCC RCC_AHBENR_DMA1EN
#define UART1_RX_DMA_INSTANCE DMA1_Channel3
#define UART1_RX_DMA_IRQ DMA1_Ch2_3_DMA2_Ch1_2_IRQn
#elif defined(BSP_SPI1_RX_USING_DMA) && !defined(SPI1_RX_DMA_INSTANCE)
#define SPI1_DMA_RX_TX_IRQHandler DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
#define SPI1_RX_DMA_RCC RCC_AHBENR_DMA1EN
#define SPI1_RX_DMA_INSTANCE DMA1_Channel2
#define SPI1_RX_DMA_IRQ DMA1_Ch2_3_DMA2_Ch1_2_IRQn
#endif
#if defined(BSP_SPI1_TX_USING_DMA) && !defined(SPI1_TX_DMA_INSTANCE)
#define SPI1_DMA_RX_TX_IRQHandler DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
#define SPI1_TX_DMA_RCC RCC_AHBENR_DMA1EN
#define SPI1_TX_DMA_INSTANCE DMA1_Channel3
#define SPI1_TX_DMA_IRQ DMA1_Ch2_3_DMA2_Ch1_2_IRQn
#endif
/* DMA1 channel2-3 DMA2 channel1-2 */
...
...
bsp/stm32/libraries/HAL_Drivers/config/f0/spi_config.h
浏览文件 @
35cd668c
...
...
@@ -6,6 +6,7 @@
* Change Logs:
* Date Author Notes
* 2018-11-06 SummerGift first version
* 2019-01-05 SummerGift modify DMA support
*/
#ifndef __SPI_CONFIG_H__
...
...
@@ -18,21 +19,68 @@ extern "C" {
#endif
#ifdef BSP_USING_SPI1
#define SPI1_BUS_CONFIG \
{ \
.Instance = SPI1, \
.bus_name = "spi1", \
.dma_rx.dma_rcc = RCC_AHBENR_DMA1EN, \
.dma_tx.dma_rcc = RCC_AHBENR_DMA1EN, \
.dma_rx.Instance = DMA1_Channel2, \
.dma_rx.dma_irq = DMA1_Ch2_3_DMA2_Ch1_2_IRQn, \
.dma_tx.Instance = DMA1_Channel3, \
.dma_tx.dma_irq = DMA1_Ch2_3_DMA2_Ch1_2_IRQn, \
#ifndef SPI1_BUS_CONFIG
#define SPI1_BUS_CONFIG \
{ \
.Instance = SPI1, \
.bus_name = "spi1", \
}
#endif
/* SPI1_BUS_CONFIG */
#endif
/* BSP_USING_SPI1 */
#ifdef BSP_SPI1_TX_USING_DMA
#ifndef SPI1_TX_DMA_CONFIG
#define SPI1_TX_DMA_CONFIG \
{ \
.dma_rcc = SPI1_TX_DMA_RCC, \
.Instance = SPI1_TX_DMA_INSTANCE, \
.dma_irq = SPI1_TX_DMA_IRQ, \
}
#endif
/* SPI1_TX_DMA_CONFIG */
#endif
/* BSP_SPI1_TX_USING_DMA */
#define SPI1_DMA_RX_IRQHandler DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
#define SPI1_DMA_TX_IRQHandler DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
#endif
#ifdef BSP_SPI1_RX_USING_DMA
#ifndef SPI1_RX_DMA_CONFIG
#define SPI1_RX_DMA_CONFIG \
{ \
.dma_rcc = SPI1_RX_DMA_RCC, \
.Instance = SPI1_RX_DMA_INSTANCE, \
.dma_irq = SPI1_RX_DMA_IRQ, \
}
#endif
/* SPI1_RX_DMA_CONFIG */
#endif
/* BSP_SPI1_RX_USING_DMA */
#ifdef BSP_USING_SPI2
#ifndef SPI2_BUS_CONFIG
#define SPI2_BUS_CONFIG \
{ \
.Instance = SPI2, \
.bus_name = "spi2", \
}
#endif
/* SPI2_BUS_CONFIG */
#endif
/* BSP_USING_SPI2 */
#ifdef BSP_SPI2_TX_USING_DMA
#ifndef SPI2_TX_DMA_CONFIG
#define SPI2_TX_DMA_CONFIG \
{ \
.dma_rcc = SPI2_TX_DMA_RCC, \
.Instance = SPI2_TX_DMA_INSTANCE, \
.dma_irq = SPI2_TX_DMA_IRQ, \
}
#endif
/* SPI2_TX_DMA_CONFIG */
#endif
/* BSP_SPI2_TX_USING_DMA */
#ifdef BSP_SPI2_RX_USING_DMA
#ifndef SPI2_RX_DMA_CONFIG
#define SPI2_RX_DMA_CONFIG \
{ \
.dma_rcc = SPI2_RX_DMA_RCC, \
.Instance = SPI2_RX_DMA_INSTANCE, \
.dma_irq = SPI2_RX_DMA_IRQ, \
}
#endif
/* SPI2_RX_DMA_CONFIG */
#endif
/* BSP_SPI2_RX_USING_DMA */
#ifdef __cplusplus
}
...
...
bsp/stm32/libraries/HAL_Drivers/drv_spi.c
浏览文件 @
35cd668c
...
...
@@ -203,7 +203,7 @@ static rt_err_t stm32_spi_init(struct stm32_spi *spi_drv, struct rt_spi_configur
spi_handle
->
Init
.
TIMode
=
SPI_TIMODE_DISABLE
;
spi_handle
->
Init
.
CRCCalculation
=
SPI_CRCCALCULATION_DISABLE
;
spi_handle
->
State
=
HAL_SPI_STATE_RESET
;
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
#if defined(SOC_SERIES_STM32L4) || defined(SOC_SERIES_STM32G0)
|| defined(SOC_SERIES_STM32F0)
spi_handle
->
Init
.
NSSPMode
=
SPI_NSS_PULSE_DISABLE
;
#endif
...
...
@@ -409,7 +409,7 @@ static int rt_hw_spi_bus_init(void)
{
rt_uint32_t
tmpreg
=
0x00U
;
#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32G0)
#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32G0)
|| defined(SOC_SERIES_STM32F0)
/* enable DMA clock && Delay after an RCC peripheral clock enabling*/
SET_BIT
(
RCC
->
AHBENR
,
spi_config
[
i
].
dma_rx
->
dma_rcc
);
tmpreg
=
READ_BIT
(
RCC
->
AHBENR
,
spi_config
[
i
].
dma_rx
->
dma_rcc
);
...
...
@@ -447,10 +447,10 @@ static int rt_hw_spi_bus_init(void)
{
rt_uint32_t
tmpreg
=
0x00U
;
#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32G0)
#if defined(SOC_SERIES_STM32F1) || defined(SOC_SERIES_STM32G0)
|| defined(SOC_SERIES_STM32F0)
/* enable DMA clock && Delay after an RCC peripheral clock enabling*/
SET_BIT
(
RCC
->
AHBENR
,
spi_config
[
i
].
dma_
r
x
->
dma_rcc
);
tmpreg
=
READ_BIT
(
RCC
->
AHBENR
,
spi_config
[
i
].
dma_
r
x
->
dma_rcc
);
SET_BIT
(
RCC
->
AHBENR
,
spi_config
[
i
].
dma_
t
x
->
dma_rcc
);
tmpreg
=
READ_BIT
(
RCC
->
AHBENR
,
spi_config
[
i
].
dma_
t
x
->
dma_rcc
);
#elif defined(SOC_SERIES_STM32F2) || defined(SOC_SERIES_STM32F4) || defined(SOC_SERIES_STM32F7) || defined(SOC_SERIES_STM32L4)
SET_BIT
(
RCC
->
AHB1ENR
,
spi_config
[
i
].
dma_tx
->
dma_rcc
);
/* Delay after an RCC peripheral clock enabling */
...
...
@@ -861,6 +861,30 @@ static void stm32_get_dma_info(void)
#endif
}
#if defined(SOC_SERIES_STM32F0)
void
SPI1_DMA_RX_TX_IRQHandler
(
void
)
{
#if defined(BSP_USING_SPI1) && defined(BSP_SPI1_TX_USING_DMA)
SPI1_DMA_TX_IRQHandler
();
#endif
#if defined(BSP_USING_SPI1) && defined(BSP_SPI1_RX_USING_DMA)
SPI1_DMA_RX_IRQHandler
();
#endif
}
void
SPI2_DMA_RX_TX_IRQHandler
(
void
)
{
#if defined(BSP_USING_SPI2) && defined(BSP_SPI2_TX_USING_DMA)
SPI2_DMA_TX_IRQHandler
();
#endif
#if defined(BSP_USING_SPI2) && defined(BSP_SPI2_RX_USING_DMA)
SPI2_DMA_RX_IRQHandler
();
#endif
}
#endif
/* SOC_SERIES_STM32F0 */
int
rt_hw_spi_init
(
void
)
{
stm32_get_dma_info
();
...
...
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