Skip to content
体验新版
项目
组织
正在加载...
登录
切换导航
打开侧边栏
AdRainty
rt-thread
提交
0458f0b7
R
rt-thread
项目概览
AdRainty
/
rt-thread
与 Fork 源项目一致
Fork自
RT-Thread / rt-thread
通知
1
Star
0
Fork
0
代码
文件
提交
分支
Tags
贡献者
分支图
Diff
Issue
0
列表
看板
标记
里程碑
合并请求
0
DevOps
流水线
流水线任务
计划
Wiki
0
Wiki
分析
仓库
DevOps
项目成员
Pages
R
rt-thread
项目概览
项目概览
详情
发布
仓库
仓库
文件
提交
分支
标签
贡献者
分支图
比较
Issue
0
Issue
0
列表
看板
标记
里程碑
合并请求
0
合并请求
0
Pages
DevOps
DevOps
流水线
流水线任务
计划
分析
分析
仓库分析
DevOps
Wiki
0
Wiki
成员
成员
收起侧边栏
关闭侧边栏
动态
分支图
创建新Issue
流水线任务
提交
Issue看板
体验新版 GitCode,发现更多精彩内容 >>
提交
0458f0b7
编写于
2月 20, 2020
作者:
B
bigmagic
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
remove comments in Chinese and keep the code style
上级
0471b6d3
变更
3
隐藏空白更改
内联
并排
Showing
3 changed file
with
36 addition
and
40 deletion
+36
-40
bsp/raspberry-pi/raspi3-64/driver/board.c
bsp/raspberry-pi/raspi3-64/driver/board.c
+1
-1
libcpu/aarch64/cortex-a53/mmu.c
libcpu/aarch64/cortex-a53/mmu.c
+34
-38
libcpu/aarch64/cortex-a53/mmu.h
libcpu/aarch64/cortex-a53/mmu.h
+1
-1
未找到文件。
bsp/raspberry-pi/raspi3-64/driver/board.c
浏览文件 @
0458f0b7
...
...
@@ -64,7 +64,7 @@ void idle_wfi(void)
*/
void
rt_hw_board_init
(
void
)
{
mmu_init
();
//初始化mmu
mmu_init
();
armv8_map
(
0
,
0
,
0x800000
,
MEM_ATTR_MEMORY
);
armv8_map
(
0x3f00B000
,
0x3f00B000
,
0x1000
,
MEM_ATTR_IO
);
//timer
armv8_map
(
0x3f200000
,
0x3f200000
,
0x16000
,
MEM_ATTR_IO
);
//uart
...
...
libcpu/aarch64/cortex-a53/mmu.c
浏览文件 @
0458f0b7
/*
* Copyright (c) 2006-20
19
, RT-Thread Development Team
* Copyright (c) 2006-20
20
, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
...
...
@@ -7,7 +7,6 @@
* Date Author Notes
* 2020-02-20 bigmagic first version
*/
#include <mmu.h>
#include <stddef.h>
...
...
@@ -19,21 +18,20 @@ static unsigned long main_tbl[512 * 20] __attribute__((aligned (4096)));
#define IS_ALIGNED(x, a) (((x) & ((typeof(x))(a) - 1)) == 0)
//映射方式
#define PMD_TYPE_SECT (1 << 0)
#define PMD_TYPE_TABLE (3 << 0)
#define PTE_TYPE_PAGE (3 << 0)
#define BITS_PER_VA
39
#define BITS_PER_VA 39
/* Granule size of 4KB is being used */
#define GRANULE_SIZE_SHIFT 12
#define GRANULE_SIZE (1 << GRANULE_SIZE_SHIFT)
#define XLAT_ADDR_MASK ((1UL << BITS_PER_VA) - GRANULE_SIZE)
#define PMD_TYPE_MASK (3 << 0)
#define PMD_TYPE_MASK
(3 << 0)
int
free_idx
=
1
;
...
...
@@ -46,7 +44,8 @@ void mmu_memset(char *dst, char v, size_t len)
}
static
unsigned
long
__page_off
=
0
;
static
unsigned
long
get_free_page
(
void
)
{
static
unsigned
long
get_free_page
(
void
)
{
__page_off
+=
512
;
return
(
unsigned
long
)(
main_tbl
+
__page_off
);
}
...
...
@@ -54,17 +53,17 @@ static unsigned long get_free_page(void) {
void
mmu_init
(
void
)
{
unsigned
long
val64
;
unsigned
long
val32
;
//val32不是uint32_t,val32只是表示相关的那个寄存器是32位的
unsigned
long
val32
;
val64
=
0x007f6eUL
;
__asm__
volatile
(
"msr MAIR_EL1, %0
\n
dsb sy
\n
"
::
"r"
(
val64
));
__asm__
volatile
(
"mrs %0, MAIR_EL1
\n
dsb sy
\n
"
:
"=r"
(
val64
));
//TCR_EL1
val32
=
(
16UL
<<
0
)
//48
位
|
(
0x0UL
<<
6
)
//没有用到
|
(
0x0UL
<<
7
)
//使能enable lower half
|
(
0x3UL
<<
8
)
//写回模式,没有cahce访问
val32
=
(
16UL
<<
0
)
//48
bit
|
(
0x0UL
<<
6
)
|
(
0x0UL
<<
7
)
|
(
0x3UL
<<
8
)
|
(
0x3UL
<<
10
)
//Inner Shareable
|
(
0x2UL
<<
12
)
|
(
0x0UL
<<
14
)
//4K
...
...
@@ -91,14 +90,11 @@ void mmu_enable(void)
unsigned
long
val64
;
unsigned
long
val32
;
//关闭指令cache
__asm__
volatile
(
"mrs %0, SCTLR_EL1
\n
"
:
"=r"
(
val64
));
val64
&=
~
0x1000
;
//disable I
__asm__
volatile
(
"dmb sy
\n
msr SCTLR_EL1, %0
\n
isb sy
\n
"
::
"r"
(
val64
));
//清除指令cache
__asm__
volatile
(
"IC IALLUIS
\n
dsb sy
\n
isb sy
\n
"
);
//清除tlb
__asm__
volatile
(
"tlbi vmalle1
\n
dsb sy
\n
isb sy
\n
"
);
//SCTLR_EL1, turn on mmu
...
...
@@ -107,32 +103,39 @@ void mmu_enable(void)
__asm__
volatile
(
"dmb sy
\n
msr SCTLR_EL1, %0
\n
isb sy
\n
"
::
"r"
(
val32
));
}
static
int
map_single_page_2M
(
unsigned
long
*
lv0_tbl
,
unsigned
long
va
,
unsigned
long
pa
,
unsigned
long
attr
)
{
static
int
map_single_page_2M
(
unsigned
long
*
lv0_tbl
,
unsigned
long
va
,
unsigned
long
pa
,
unsigned
long
attr
)
{
int
level
;
unsigned
long
*
cur_lv_tbl
=
lv0_tbl
;
unsigned
long
page
;
unsigned
long
off
;
int
level_shift
=
39
;
if
(
va
&
(
0x200000UL
-
1
))
{
if
(
va
&
(
0x200000UL
-
1
))
{
return
MMU_MAP_ERROR_VANOTALIGN
;
}
if
(
pa
&
(
0x200000UL
-
1
))
{
if
(
pa
&
(
0x200000UL
-
1
))
{
return
MMU_MAP_ERROR_PANOTALIGN
;
}
for
(
level
=
0
;
level
<
2
;
level
++
)
{
for
(
level
=
0
;
level
<
2
;
level
++
)
{
off
=
(
va
>>
level_shift
);
off
&=
MMU_LEVEL_MASK
;
if
((
cur_lv_tbl
[
off
]
&
1
)
==
0
)
{
if
((
cur_lv_tbl
[
off
]
&
1
)
==
0
)
{
page
=
get_free_page
();
if
(
!
page
)
{
if
(
!
page
)
{
return
MMU_MAP_ERROR_NOPAGE
;
}
mmu_memset
((
char
*
)
page
,
0
,
4096
);
cur_lv_tbl
[
off
]
=
page
|
0x3UL
;
}
page
=
cur_lv_tbl
[
off
];
if
(
!
(
page
&
0x2
))
{
if
(
!
(
page
&
0x2
))
{
//is block! error!
return
MMU_MAP_ERROR_CONFLICT
;
}
...
...
@@ -173,13 +176,10 @@ int armv8_map_2M(unsigned long va, unsigned long pa, int count, unsigned long at
return
0
;
}
//将表的地址映射到其他的地方去
static
void
set_table
(
uint64_t
*
pt
,
uint64_t
*
table_addr
)
{
uint64_t
val
;
//0x607
val
=
(
0x3UL
|
(
uint64_t
)
table_addr
);
//(0x3UL | (uint64_t)table_addr);
val
=
(
0x3UL
|
(
uint64_t
)
table_addr
);
*
pt
=
val
;
}
...
...
@@ -208,28 +208,21 @@ static int pte_type(uint64_t *pte)
static
int
level2shift
(
int
level
)
{
/* Page is 12 bits wide, every level translates 9 bits */
//
return
(
12
+
9
*
(
3
-
level
));
}
uint64_t
*
test_table
=
0
;
//根据表映射
static
uint64_t
*
get_level_table
(
uint64_t
*
pte
)
{
uint64_t
*
table
=
(
uint64_t
*
)(
*
pte
&
XLAT_ADDR_MASK
);
if
(
pte_type
(
pte
)
!=
PMD_TYPE_TABLE
)
{
if
(
pte_type
(
pte
)
!=
PMD_TYPE_TABLE
)
{
table
=
create_table
();
set_table
(
pte
,
table
);
}
return
table
;
}
static
void
map_region
(
uint64_t
virt
,
uint64_t
phys
,
uint64_t
size
,
uint64_t
attr
)
{
uint64_t
block_size
=
0
;
...
...
@@ -241,16 +234,19 @@ static void map_region(uint64_t virt, uint64_t phys, uint64_t size, uint64_t att
int
level
=
0
;
addr
=
virt
;
while
(
size
)
{
table
=
&
main_tbl
[
0
];
//将一级页表的地址赋值
for
(
level
=
0
;
level
<
4
;
level
++
)
{
while
(
size
)
{
table
=
&
main_tbl
[
0
];
for
(
level
=
0
;
level
<
4
;
level
++
)
{
block_shift
=
level2shift
(
level
);
idx
=
addr
>>
block_shift
;
idx
=
idx
%
512
;
block_size
=
(
uint64_t
)(
1L
<<
block_shift
);
pte
=
table
+
idx
;
if
(
size
>=
block_size
&&
IS_ALIGNED
(
addr
,
block_size
))
{
if
(
size
>=
block_size
&&
IS_ALIGNED
(
addr
,
block_size
))
{
attr
&=
0xfff0000000000ffcUL
;
if
(
level
!=
3
)
{
...
...
libcpu/aarch64/cortex-a53/mmu.h
浏览文件 @
0458f0b7
/*
* Copyright (c) 2006-20
19
, RT-Thread Development Team
* Copyright (c) 2006-20
20
, RT-Thread Development Team
*
* SPDX-License-Identifier: Apache-2.0
*
...
...
编辑
预览
Markdown
is supported
0%
请重试
或
添加新附件
.
添加附件
取消
You are about to add
0
people
to the discussion. Proceed with caution.
先完成此消息的编辑!
取消
想要评论请
注册
或
登录