提交 00d7d6f5 编写于 作者: B Bernard Xiong

[BSP] Add standalone i.MXRT 1050 EVK BSP.

上级 87fcdf96
#
# Automatically generated file; DO NOT EDIT.
# RT-Thread Configuration
#
#
# RT-Thread Kernel
#
CONFIG_RT_NAME_MAX=8
CONFIG_RT_ALIGN_SIZE=4
# CONFIG_RT_THREAD_PRIORITY_8 is not set
CONFIG_RT_THREAD_PRIORITY_32=y
# CONFIG_RT_THREAD_PRIORITY_256 is not set
CONFIG_RT_THREAD_PRIORITY_MAX=32
CONFIG_RT_TICK_PER_SECOND=100
CONFIG_RT_USING_OVERFLOW_CHECK=y
CONFIG_RT_USING_HOOK=y
CONFIG_RT_IDEL_HOOK_LIST_SIZE=4
CONFIG_IDLE_THREAD_STACK_SIZE=256
# CONFIG_RT_USING_TIMER_SOFT is not set
CONFIG_RT_DEBUG=y
# CONFIG_RT_DEBUG_INIT_CONFIG is not set
# CONFIG_RT_DEBUG_THREAD_CONFIG is not set
# CONFIG_RT_DEBUG_SCHEDULER_CONFIG is not set
# CONFIG_RT_DEBUG_IPC_CONFIG is not set
# CONFIG_RT_DEBUG_TIMER_CONFIG is not set
# CONFIG_RT_DEBUG_IRQ_CONFIG is not set
# CONFIG_RT_DEBUG_MEM_CONFIG is not set
# CONFIG_RT_DEBUG_SLAB_CONFIG is not set
# CONFIG_RT_DEBUG_MEMHEAP_CONFIG is not set
# CONFIG_RT_DEBUG_MODULE_CONFIG is not set
#
# Inter-Thread communication
#
CONFIG_RT_USING_SEMAPHORE=y
CONFIG_RT_USING_MUTEX=y
CONFIG_RT_USING_EVENT=y
CONFIG_RT_USING_MAILBOX=y
CONFIG_RT_USING_MESSAGEQUEUE=y
# CONFIG_RT_USING_SIGNALS is not set
#
# Memory Management
#
# CONFIG_RT_USING_MEMPOOL is not set
CONFIG_RT_USING_MEMHEAP=y
# CONFIG_RT_USING_NOHEAP is not set
# CONFIG_RT_USING_SMALL_MEM is not set
# CONFIG_RT_USING_SLAB is not set
CONFIG_RT_USING_MEMHEAP_AS_HEAP=y
CONFIG_RT_USING_HEAP=y
#
# Kernel Device Object
#
CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_DEVICE_OPS is not set
# CONFIG_RT_USING_INTERRUPT_INFO is not set
CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1"
CONFIG_ARCH_ARM=y
CONFIG_ARCH_ARM_CORTEX_M=y
CONFIG_ARCH_ARM_CORTEX_M7=y
#
# RT-Thread Components
#
CONFIG_RT_USING_COMPONENTS_INIT=y
CONFIG_RT_USING_USER_MAIN=y
CONFIG_RT_MAIN_THREAD_STACK_SIZE=2048
CONFIG_RT_MAIN_THREAD_PRIORITY=10
#
# C++ features
#
# CONFIG_RT_USING_CPLUSPLUS is not set
#
# Command shell
#
CONFIG_RT_USING_FINSH=y
CONFIG_FINSH_THREAD_NAME="tshell"
CONFIG_FINSH_USING_HISTORY=y
CONFIG_FINSH_HISTORY_LINES=5
CONFIG_FINSH_USING_SYMTAB=y
CONFIG_FINSH_USING_DESCRIPTION=y
# CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
CONFIG_FINSH_THREAD_PRIORITY=20
CONFIG_FINSH_THREAD_STACK_SIZE=4096
CONFIG_FINSH_CMD_SIZE=80
# CONFIG_FINSH_USING_AUTH is not set
CONFIG_FINSH_USING_MSH=y
CONFIG_FINSH_USING_MSH_DEFAULT=y
CONFIG_FINSH_USING_MSH_ONLY=y
CONFIG_FINSH_ARG_MAX=10
#
# Device virtual file system
#
CONFIG_RT_USING_DFS=y
CONFIG_DFS_USING_WORKDIR=y
CONFIG_DFS_FILESYSTEMS_MAX=2
CONFIG_DFS_FILESYSTEM_TYPES_MAX=2
CONFIG_DFS_FD_MAX=4
# CONFIG_RT_USING_DFS_MNTTABLE is not set
CONFIG_RT_USING_DFS_ELMFAT=y
#
# elm-chan's FatFs, Generic FAT Filesystem Module
#
CONFIG_RT_DFS_ELM_CODE_PAGE=437
CONFIG_RT_DFS_ELM_WORD_ACCESS=y
# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
CONFIG_RT_DFS_ELM_USE_LFN_3=y
CONFIG_RT_DFS_ELM_USE_LFN=3
CONFIG_RT_DFS_ELM_MAX_LFN=255
CONFIG_RT_DFS_ELM_DRIVES=2
CONFIG_RT_DFS_ELM_MAX_SECTOR_SIZE=512
# CONFIG_RT_DFS_ELM_USE_ERASE is not set
CONFIG_RT_DFS_ELM_REENTRANT=y
CONFIG_RT_USING_DFS_DEVFS=y
# CONFIG_RT_USING_DFS_ROMFS is not set
# CONFIG_RT_USING_DFS_RAMFS is not set
# CONFIG_RT_USING_DFS_UFFS is not set
# CONFIG_RT_USING_DFS_JFFS2 is not set
# CONFIG_RT_USING_DFS_NFS is not set
#
# Device Drivers
#
CONFIG_RT_USING_DEVICE_IPC=y
CONFIG_RT_PIPE_BUFSZ=512
CONFIG_RT_USING_SERIAL=y
# CONFIG_RT_USING_CAN is not set
# CONFIG_RT_USING_HWTIMER is not set
# CONFIG_RT_USING_CPUTIME is not set
CONFIG_RT_USING_I2C=y
CONFIG_RT_USING_I2C_BITOPS=y
CONFIG_RT_USING_PIN=y
# CONFIG_RT_USING_PWM is not set
# CONFIG_RT_USING_MTD_NOR is not set
# CONFIG_RT_USING_MTD_NAND is not set
CONFIG_RT_USING_RTC=y
# CONFIG_RT_USING_SOFT_RTC is not set
# CONFIG_RTC_SYNC_USING_NTP is not set
CONFIG_RT_USING_SDIO=y
CONFIG_RT_SDIO_STACK_SIZE=512
CONFIG_RT_SDIO_THREAD_PRIORITY=15
CONFIG_RT_MMCSD_STACK_SIZE=1024
CONFIG_RT_MMCSD_THREAD_PREORITY=22
CONFIG_RT_MMCSD_MAX_PARTITION=16
# CONFIG_RT_SDIO_DEBUG is not set
CONFIG_RT_USING_SPI=y
# CONFIG_RT_USING_SPI_MSD is not set
# CONFIG_RT_USING_SFUD is not set
# CONFIG_RT_USING_W25QXX is not set
# CONFIG_RT_USING_GD is not set
# CONFIG_RT_USING_ENC28J60 is not set
# CONFIG_RT_USING_SPI_WIFI is not set
# CONFIG_RT_USING_WDT is not set
# CONFIG_RT_USING_WIFI is not set
# CONFIG_RT_USING_AUDIO is not set
#
# Using USB
#
# CONFIG_RT_USING_USB_HOST is not set
# CONFIG_RT_USING_USB_DEVICE is not set
#
# POSIX layer and C standard library
#
CONFIG_RT_USING_LIBC=y
# CONFIG_RT_USING_PTHREADS is not set
# CONFIG_RT_USING_POSIX is not set
# CONFIG_RT_USING_MODULE is not set
#
# Network
#
#
# Socket abstraction layer
#
# CONFIG_RT_USING_SAL is not set
#
# light weight TCP/IP stack
#
CONFIG_RT_USING_LWIP=y
# CONFIG_RT_USING_LWIP141 is not set
CONFIG_RT_USING_LWIP202=y
# CONFIG_RT_USING_LWIP_IPV6 is not set
# CONFIG_RT_LWIP_IGMP is not set
CONFIG_RT_LWIP_ICMP=y
# CONFIG_RT_LWIP_SNMP is not set
CONFIG_RT_LWIP_DNS=y
CONFIG_RT_LWIP_DHCP=y
CONFIG_IP_SOF_BROADCAST=1
CONFIG_IP_SOF_BROADCAST_RECV=1
#
# Static IPv4 Address
#
CONFIG_RT_LWIP_IPADDR="192.168.1.30"
CONFIG_RT_LWIP_GWADDR="192.168.1.1"
CONFIG_RT_LWIP_MSKADDR="255.255.255.0"
CONFIG_RT_LWIP_UDP=y
CONFIG_RT_LWIP_TCP=y
# CONFIG_RT_LWIP_RAW is not set
# CONFIG_RT_LWIP_PPP is not set
CONFIG_RT_MEMP_NUM_NETCONN=8
CONFIG_RT_LWIP_PBUF_NUM=16
CONFIG_RT_LWIP_RAW_PCB_NUM=4
CONFIG_RT_LWIP_UDP_PCB_NUM=4
CONFIG_RT_LWIP_TCP_PCB_NUM=4
CONFIG_RT_LWIP_TCP_SEG_NUM=40
CONFIG_RT_LWIP_TCP_SND_BUF=8196
CONFIG_RT_LWIP_TCP_WND=8196
CONFIG_RT_LWIP_TCPTHREAD_PRIORITY=10
CONFIG_RT_LWIP_TCPTHREAD_MBOX_SIZE=8
CONFIG_RT_LWIP_TCPTHREAD_STACKSIZE=1024
# CONFIG_LWIP_NO_RX_THREAD is not set
# CONFIG_LWIP_NO_TX_THREAD is not set
CONFIG_RT_LWIP_ETHTHREAD_PRIORITY=12
CONFIG_RT_LWIP_ETHTHREAD_STACKSIZE=1024
CONFIG_RT_LWIP_ETHTHREAD_MBOX_SIZE=8
# CONFIG_RT_LWIP_REASSEMBLY_FRAG is not set
CONFIG_LWIP_NETIF_STATUS_CALLBACK=1
CONFIG_SO_REUSE=1
CONFIG_LWIP_SO_RCVTIMEO=1
CONFIG_LWIP_SO_SNDTIMEO=1
CONFIG_LWIP_SO_RCVBUF=1
# CONFIG_RT_LWIP_NETIF_LOOPBACK is not set
CONFIG_LWIP_NETIF_LOOPBACK=0
# CONFIG_RT_LWIP_STATS is not set
# CONFIG_RT_LWIP_DEBUG is not set
#
# Modbus master and slave stack
#
# CONFIG_RT_USING_MODBUS is not set
#
# AT commands
#
# CONFIG_RT_USING_AT is not set
# CONFIG_LWIP_USING_DHCPD is not set
#
# VBUS(Virtual Software BUS)
#
# CONFIG_RT_USING_VBUS is not set
#
# Utilities
#
# CONFIG_RT_USING_LOGTRACE is not set
# CONFIG_RT_USING_RYM is not set
#
# ARM CMSIS
#
# CONFIG_RT_USING_CMSIS_OS is not set
# CONFIG_RT_USING_RTT_CMSIS is not set
#
# RT-Thread online packages
#
#
# IoT - internet of things
#
# CONFIG_PKG_USING_PAHOMQTT is not set
# CONFIG_PKG_USING_WEBCLIENT is not set
# CONFIG_PKG_USING_MONGOOSE is not set
# CONFIG_PKG_USING_WEBTERMINAL is not set
# CONFIG_PKG_USING_CJSON is not set
# CONFIG_PKG_USING_JSMN is not set
# CONFIG_PKG_USING_LJSON is not set
# CONFIG_PKG_USING_EZXML is not set
# CONFIG_PKG_USING_NANOPB is not set
#
# Wi-Fi
#
#
# Marvell WiFi
#
# CONFIG_PKG_USING_WLANMARVELL is not set
#
# Wiced WiFi
#
# CONFIG_PKG_USING_WLAN_WICED is not set
# CONFIG_PKG_USING_COAP is not set
# CONFIG_PKG_USING_NOPOLL is not set
# CONFIG_PKG_USING_NETUTILS is not set
# CONFIG_PKG_USING_AT_DEVICE is not set
#
# IoT Cloud
#
# CONFIG_PKG_USING_ONENET is not set
# CONFIG_PKG_USING_GAGENT_CLOUD is not set
# CONFIG_PKG_USING_ALI_IOTKIT is not set
# CONFIG_PKG_USING_AZURE is not set
#
# security packages
#
# CONFIG_PKG_USING_MBEDTLS is not set
# CONFIG_PKG_USING_libsodium is not set
# CONFIG_PKG_USING_TINYCRYPT is not set
#
# language packages
#
# CONFIG_PKG_USING_LUA is not set
# CONFIG_PKG_USING_JERRYSCRIPT is not set
# CONFIG_PKG_USING_MICROPYTHON is not set
#
# multimedia packages
#
# CONFIG_PKG_USING_OPENMV is not set
# CONFIG_PKG_USING_MUPDF is not set
#
# tools packages
#
# CONFIG_PKG_USING_CMBACKTRACE is not set
# CONFIG_PKG_USING_EASYFLASH is not set
# CONFIG_PKG_USING_EASYLOGGER is not set
# CONFIG_PKG_USING_SYSTEMVIEW is not set
#
# system packages
#
# CONFIG_PKG_USING_GUIENGINE is not set
# CONFIG_PKG_USING_PERSIMMON is not set
# CONFIG_PKG_USING_CAIRO is not set
# CONFIG_PKG_USING_PIXMAN is not set
# CONFIG_PKG_USING_LWEXT4 is not set
# CONFIG_PKG_USING_PARTITION is not set
# CONFIG_PKG_USING_FAL is not set
# CONFIG_PKG_USING_SQLITE is not set
# CONFIG_PKG_USING_RTI is not set
# CONFIG_PKG_USING_LITTLEVGL2RTT is not set
#
# peripheral libraries and drivers
#
# CONFIG_PKG_USING_STM32F4_HAL is not set
# CONFIG_PKG_USING_STM32F4_DRIVERS is not set
# CONFIG_PKG_USING_REALTEK_AMEBA is not set
# CONFIG_PKG_USING_SHT2X is not set
# CONFIG_PKG_USING_AHT10 is not set
# CONFIG_PKG_USING_AP3216C is not set
# CONFIG_PKG_USING_STM32_SDIO is not set
#
# miscellaneous packages
#
# CONFIG_PKG_USING_LIBCSV is not set
# CONFIG_PKG_USING_OPTPARSE is not set
# CONFIG_PKG_USING_FASTLZ is not set
# CONFIG_PKG_USING_MINILZO is not set
# CONFIG_PKG_USING_QUICKLZ is not set
# CONFIG_PKG_USING_MULTIBUTTON is not set
# CONFIG_PKG_USING_CANFESTIVAL is not set
# CONFIG_PKG_USING_ZLIB is not set
# CONFIG_PKG_USING_DSTR is not set
#
# sample package
#
#
# samples: kernel and components samples
#
# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
#
# example package: hello
#
# CONFIG_PKG_USING_HELLO is not set
CONFIG_SOC_IMXRT1052=y
CONFIG_BOARD_USING_HYPERFLASH=y
# CONFIG_BOARD_USING_QSPIFLASH is not set
CONFIG_BOARD_RT1050_EVK=y
# CONFIG_BOARD_RT1050_FIRE is not set
# CONFIG_BOARD_RT1050_ShareBoard is not set
# CONFIG_BOARD_RT1050_ATK is not set
# CONFIG_BOARD_RT1050_SeeedStudio is not set
#
# RT1050 Bsp Config
#
#
# Select uart drivers
#
CONFIG_RT_USING_UART1=y
# CONFIG_RT_USING_UART2 is not set
# CONFIG_RT_USING_UART3 is not set
# CONFIG_RT_USING_UART4 is not set
# CONFIG_RT_USING_UART5 is not set
# CONFIG_RT_USING_UART6 is not set
# CONFIG_RT_USING_UART7 is not set
# CONFIG_RT_USING_UART8 is not set
#
# Select spi bus and dev drivers
#
CONFIG_LPSPI_CLK_SOURCE_FROM_PLL3PFD1=y
# CONFIG_LPSPI_CLK_SOURCE_FROM_PLL3PFD0 is not set
# CONFIG_LPSPI_CLK_SOURCE_FROM_PLL2 is not set
# CONFIG_LPSPI_CLK_SOURCE_FROM_PLL2PFD2 is not set
CONFIG_LPSPI_CLK_SOURCE=0
CONFIG_LPSPI_CLK_SOURCE_DIVIDER=8
# CONFIG_RT_USING_SPIBUS1 is not set
# CONFIG_RT_USING_SPIBUS2 is not set
# CONFIG_RT_USING_SPIBUS3 is not set
CONFIG_RT_USING_SPIBUS4=y
CONFIG_LPSPI4_SCK_GPIO_1=y
# CONFIG_LPSPI4_SCK_GPIO_2 is not set
CONFIG_LPSPI4_SDO_GPIO_1=y
# CONFIG_LPSPI4_SDO_GPIO_2 is not set
CONFIG_LPSPI4_SDI_GPIO_1=y
# CONFIG_LPSPI4_SDI_GPIO_2 is not set
# CONFIG_RT_USING_SPI_FLASH is not set
#
# Select iic bus drivers
#
CONFIG_RT_USING_HW_I2C1=y
CONFIG_HW_I2C1_BADURATE_100kHZ=y
# CONFIG_HW_I2C1_BADURATE_400kHZ is not set
# CONFIG_RT_USING_HW_I2C2 is not set
# CONFIG_RT_USING_HW_I2C3 is not set
# CONFIG_RT_USING_HW_I2C4 is not set
#
# Select lcd driver
#
#
# Notice: Evk Board para: 480*272 4 4 8 2 40 10 106 45
#
CONFIG_RT_USING_LCD=y
CONFIG_LCD_WIDTH=480
CONFIG_LCD_HEIGHT=272
CONFIG_LCD_HFP=4
CONFIG_LCD_VFP=4
CONFIG_LCD_HBP=8
CONFIG_LCD_VBP=2
CONFIG_LCD_HSW=40
CONFIG_LCD_VSW=10
CONFIG_LCD_BL_PIN=106
CONFIG_LCD_RST_PIN=45
CONFIG_RT_USING_SDRAM=y
CONFIG_RT_USING_RTC_HP=y
mainmenu "RT-Thread Configuration"
config $BSP_DIR
string
option env="BSP_ROOT"
default "."
config $RTT_DIR
string
option env="RTT_ROOT"
default "../../.."
config $PKGS_DIR
string
option env="PKGS_ROOT"
default "packages"
source "$RTT_DIR/Kconfig"
source "$PKGS_DIR/Kconfig"
config SOC_IMXRT1052
bool
select ARCH_ARM_CORTEX_M7
default y
config BOARD_USING_HYPERFLASH
bool
default n
config BOARD_USING_QSPIFLASH
bool
default n
# RT1050 board select!
choice
prompt "RT1050 Board select"
default BOARD_RT1050_EVK
config BOARD_RT1050_EVK
bool "RT1050_EVK"
select BOARD_USING_HYPERFLASH
config BOARD_RT1050_FIRE
bool "RT1050_FIRE"
select BOARD_USING_QSPIFLASH
config BOARD_RT1050_ShareBoard
bool "RT1050_ShareBoard"
select BOARD_USING_QSPIFLASH
config BOARD_RT1050_ATK
bool "RT1050_ATK"
select BOARD_USING_QSPIFLASH
config BOARD_RT1050_SeeedStudio
bool "RT1050_SeeedStudio"
select BOARD_USING_HYPERFLASH
endchoice
menu "RT1050 Bsp Config"
menu "Select uart drivers"
config RT_USING_UART1
bool "Using uart1"
select RT_USING_SERIAL
default y
config RT_USING_UART2
bool "Using uart2"
select RT_USING_SERIAL
default n
config RT_USING_UART3
bool "Using uart3"
select RT_USING_SERIAL
default n
if !BOARD_RT1050_SeeedStudio
config RT_USING_UART4
bool "Using uart4"
select RT_USING_SERIAL
default n
config RT_USING_UART5
bool "Using uart5"
select RT_USING_SERIAL
default n
config RT_USING_UART6
bool "Using uart6"
select RT_USING_SERIAL
default n
endif
if !BOARD_RT1050_ATK && !BOARD_RT1050_SeeedStudio
config RT_USING_UART7
bool "Using uart7"
select RT_USING_SERIAL
default n
endif
config RT_USING_UART8
bool "Using uart8"
select RT_USING_SERIAL
default n
endmenu
menu "Select spi bus and dev drivers"
choice
prompt "SPI bus clock source"
default LPSPI_CLK_SOURCE_FROM_PLL3PFD1
config LPSPI_CLK_SOURCE_FROM_PLL3PFD1
bool "PLL3PFD1"
config LPSPI_CLK_SOURCE_FROM_PLL3PFD0
bool "PLL3PFD0"
config LPSPI_CLK_SOURCE_FROM_PLL2
bool "PLL2"
config LPSPI_CLK_SOURCE_FROM_PLL2PFD2
bool "PLL2PFD2"
endchoice
config LPSPI_CLK_SOURCE
int
default 0 if LPSPI_CLK_SOURCE_FROM_PLL3PFD1
default 1 if LPSPI_CLK_SOURCE_FROM_PLL3PFD0
default 2 if LPSPI_CLK_SOURCE_FROM_PLL2
default 3 if LPSPI_CLK_SOURCE_FROM_PLL2PFD2
config LPSPI_CLK_SOURCE_DIVIDER
int "SPI bus clock source divider"
range 1 8
default 8
if !BOARD_RT1050_SeeedStudio
config RT_USING_SPIBUS1
bool "Using spi1 bus"
select RT_USING_SPI
default n
choice
prompt "spi1 bus sck io choice"
default LPSPI1_SCK_GPIO_1
depends on RT_USING_SPIBUS1
config LPSPI1_SCK_GPIO_1
bool "GPIO_EMC_27"
config LPSPI1_SCK_GPIO_2
bool "GPIO_SD_B0_00"
endchoice
choice
prompt "spi1 bus sdo io choice"
default LPSPI1_SDO_GPIO_1
depends on RT_USING_SPIBUS1
config LPSPI1_SDO_GPIO_1
bool "GPIO_EMC_28"
config LPSPI1_SDO_GPIO_2
bool "GPIO_SD_B0_02"
endchoice
choice
prompt "spi1 bus sdi io choice"
default LPSPI1_SDI_GPIO_1
depends on RT_USING_SPIBUS1
config LPSPI1_SDI_GPIO_1
bool "GPIO_EMC_29"
config LPSPI1_SDI_GPIO_2
bool "GPIO_SD_B0_03"
endchoice
config RT_USING_SPIBUS2
bool "Using spi2 bus"
select RT_USING_SPI
default n
choice
prompt "spi2 bus sck io choice"
default LPSPI2_SCK_GPIO_1
depends on RT_USING_SPIBUS2
config LPSPI2_SCK_GPIO_1
bool "GPIO_SD_B1_07"
config LPSPI2_SCK_GPIO_2
bool "GPIO_EMC_00"
endchoice
choice
prompt "spi2 bus sdo io choice"
default LPSPI2_SDO_GPIO_1
depends on RT_USING_SPIBUS2
config LPSPI2_SDO_GPIO_1
bool "GPIO_SD_B1_08"
config LPSPI2_SDO_GPIO_2
bool "GPIO_EMC_02"
endchoice
choice
prompt "spi2 bus sdi io choice"
default LPSPI2_SDI_GPIO_1
depends on RT_USING_SPIBUS2
config LPSPI2_SDI_GPIO_1
bool "GPIO_SD_B1_09"
config LPSPI2_SDI_GPIO_2
bool "GPIO_EMC_03"
endchoice
endif
config RT_USING_SPIBUS3
bool "Using spi3 bus"
select RT_USING_SPI
default n
choice
prompt "spi3 bus sck io choice"
default LPSPI3_SCK_GPIO_1
depends on RT_USING_SPIBUS3
config LPSPI3_SCK_GPIO_1
bool "GPIO_AD_B1_15"
config LPSPI3_SCK_GPIO_2
bool "GPIO_AD_B0_00"
depends on !BOARD_RT1050_SeeedStudio
endchoice
choice
prompt "spi3 bus sdo io choice"
default LPSPI3_SDO_GPIO_1
depends on RT_USING_SPIBUS3
config LPSPI3_SDO_GPIO_1
bool "GPIO_AD_B1_14"
config LPSPI3_SDO_GPIO_2
bool "GPIO_AD_B0_01"
depends on !BOARD_RT1050_SeeedStudio
endchoice
choice
prompt "spi3 bus sdi io choice"
default LPSPI3_SDI_GPIO_1
depends on RT_USING_SPIBUS3
config LPSPI3_SDI_GPIO_1
bool "GPIO_AD_B1_13"
config LPSPI3_SDI_GPIO_2
bool "GPIO_AD_B0_02"
depends on !BOARD_RT1050_SeeedStudio
endchoice
config RT_USING_SPIBUS4
bool "Using spi4 bus"
select RT_USING_SPI
default y
choice
prompt "spi4 bus sck io choice"
default LPSPI4_SCK_GPIO_1
depends on RT_USING_SPIBUS4
config LPSPI4_SCK_GPIO_1
bool "GPIO_B0_03"
depends on !BOARD_RT1050_SeeedStudio
config LPSPI4_SCK_GPIO_2
bool "GPIO_B1_07"
endchoice
choice
prompt "spi4 bus sdo io choice"
default LPSPI4_SDO_GPIO_1
depends on RT_USING_SPIBUS4
config LPSPI4_SDO_GPIO_1
bool "GPIO_B0_02"
depends on !BOARD_RT1050_SeeedStudio
config LPSPI4_SDO_GPIO_2
bool "GPIO_B1_06"
endchoice
choice
prompt "spi4 bus sdi io choice"
default LPSPI4_SDI_GPIO_1
depends on RT_USING_SPIBUS4
config LPSPI4_SDI_GPIO_1
bool "GPIO_B0_01"
depends on !BOARD_RT1050_SeeedStudio
config LPSPI4_SDI_GPIO_2
bool "GPIO_B1_05"
endchoice
config RT_USING_SPI_FLASH
bool "Using spi flash with sfud"
default n
select RT_USING_SPI
select RT_USING_SFUD
select RT_USING_PIN
choice
prompt "SPI flash using spibus"
default SPI_FLASH_USING_SPIBUS4
depends on RT_USING_SPI_FLASH
config SPI_FLASH_USING_SPIBUS1
bool "spi1"
select RT_USING_SPIBUS1
config SPI_FLASH_USING_SPIBUS2
bool "spi2"
select RT_USING_SPIBUS2
config SPI_FLASH_USING_SPIBUS3
bool "spi3"
select RT_USING_SPIBUS3
config SPI_FLASH_USING_SPIBUS4
bool "spi4"
select RT_USING_SPIBUS4
endchoice
config SPI_FLASH_USING_SPIBUS_NAME
string
default "spi1" if SPI_FLASH_USING_SPIBUS1
default "spi2" if SPI_FLASH_USING_SPIBUS2
default "spi3" if SPI_FLASH_USING_SPIBUS3
default "spi4" if SPI_FLASH_USING_SPIBUS4
config SPI_FLASH_NAME
string "SPI flash device name"
default "flash0"
depends on RT_USING_SPI_FLASH
config SPI_FLASH_USING_CS_PIN
int "SPI flash cs pin index"
default 79
range 1 127
depends on RT_USING_SPI_FLASH
endmenu
menu "Select iic bus drivers"
config RT_USING_HW_I2C1
bool "using hardware i2c1"
select RT_USING_I2C
default y
choice
prompt "i2c1 bus badurate choice"
default HW_I2C1_BADURATE_100kHZ
depends on RT_USING_HW_I2C1
config HW_I2C1_BADURATE_100kHZ
bool "100kHZ"
config HW_I2C1_BADURATE_400kHZ
bool "400kHZ"
endchoice
if !BOARD_RT1050_SeeedStudio
config RT_USING_HW_I2C2
bool "using hardware i2c2"
select RT_USING_I2C
default n
choice
prompt "i2c2 bus badurate choice"
default HW_I2C2_BADURATE_100kHZ
depends on RT_USING_HW_I2C2
config HW_I2C2_BADURATE_100kHZ
bool "100kHZ"
config HW_I2C2_BADURATE_400kHZ
bool "400kHZ"
endchoice
endif
config RT_USING_HW_I2C3
bool "using hardware i2c3"
select RT_USING_I2C
default n
choice
prompt "i2c3 bus badurate choice"
default HW_I2C3_BADURATE_100kHZ
depends on RT_USING_HW_I2C3
config HW_I2C3_BADURATE_100kHZ
bool "100kHZ"
config HW_I2C3_BADURATE_400kHZ
bool "400kHZ"
endchoice
config RT_USING_HW_I2C4
bool "using hardware i2c4"
select RT_USING_I2C
default n
choice
prompt "i2c4 bus badurate choice"
default HW_I2C4_BADURATE_100kHZ
depends on RT_USING_HW_I2C4
config HW_I2C4_BADURATE_100kHZ
bool "100kHZ"
config HW_I2C4_BADURATE_400kHZ
bool "400kHZ"
endchoice
endmenu
menu "Select lcd driver"
if RT_USING_LCD && BOARD_RT1050_EVK
comment "Notice: Evk Board para: 480*272 4 4 8 2 40 10 106 45"
endif
if RT_USING_LCD && BOARD_RT1050_ShareBoard
comment "Notice: ShareBoard Board para: 800*480 4 4 8 2 40 10 58 45"
endif
if RT_USING_LCD && BOARD_RT1050_FIRE
comment "Notice: Fire Board para: 800*480 4 4 8 2 40 10 58 45"
endif
if RT_USING_LCD && BOARD_RT1050_ATK
comment "Notice: ATK Board para: 480*272 4 4 8 2 40 10 109 45"
endif
if RT_USING_LCD && BOARD_RT1050_SeeedStudio
comment "Notice: SeeedStudio Board para: 480*272 4 4 8 2 40 10 127 45"
endif
config RT_USING_LCD
bool "Using lcd"
default n
config LCD_WIDTH
int "Width pixel num"
default 480 if (BOARD_RT1050_EVK || BOARD_RT1050_ATK || BOARD_RT1050_SeeedStudio)
default 800 if (BOARD_RT1050_FIRE || BOARD_RT1050_ShareBoard)
depends on RT_USING_LCD
config LCD_HEIGHT
int "Height pixel num"
default 272 if (BOARD_RT1050_EVK || BOARD_RT1050_ATK || BOARD_RT1050_SeeedStudio)
default 480 if (BOARD_RT1050_FIRE || BOARD_RT1050_ShareBoard)
depends on RT_USING_LCD
config LCD_HFP
int "HFP"
default 4 if (BOARD_RT1050_EVK || BOARD_RT1050_ATK || BOARD_RT1050_SeeedStudio)
default 4 if (BOARD_RT1050_FIRE || BOARD_RT1050_ShareBoard)
depends on RT_USING_LCD
config LCD_VFP
int "VFP"
default 4 if (BOARD_RT1050_EVK || BOARD_RT1050_ATK || BOARD_RT1050_SeeedStudio)
default 4 if (BOARD_RT1050_FIRE || BOARD_RT1050_ShareBoard)
depends on RT_USING_LCD
config LCD_HBP
int "HBP"
default 8 if (BOARD_RT1050_EVK || BOARD_RT1050_ATK || BOARD_RT1050_SeeedStudio)
default 8 if (BOARD_RT1050_FIRE || BOARD_RT1050_ShareBoard)
depends on RT_USING_LCD
config LCD_VBP
int "VBP"
default 2 if (BOARD_RT1050_EVK || BOARD_RT1050_ATK || BOARD_RT1050_SeeedStudio)
default 2 if (BOARD_RT1050_FIRE || BOARD_RT1050_ShareBoard)
depends on RT_USING_LCD
config LCD_HSW
int "HSW"
default 40 if (BOARD_RT1050_EVK || BOARD_RT1050_ATK || BOARD_RT1050_SeeedStudio)
default 40 if (BOARD_RT1050_FIRE || BOARD_RT1050_ShareBoard)
depends on RT_USING_LCD
config LCD_VSW
int "VSW"
default 10 if (BOARD_RT1050_EVK || BOARD_RT1050_ATK || BOARD_RT1050_SeeedStudio)
default 10 if (BOARD_RT1050_FIRE || BOARD_RT1050_ShareBoard)
depends on RT_USING_LCD
config LCD_BL_PIN
int "Backlight pin index"
default 127 if BOARD_RT1050_SeeedStudio
default 109 if BOARD_RT1050_ATK
default 106 if BOARD_RT1050_EVK
default 58 if (BOARD_RT1050_FIRE || BOARD_RT1050_ShareBoard)
depends on RT_USING_LCD
config LCD_RST_PIN
int "Reset pin index"
default 45 if (BOARD_RT1050_EVK || BOARD_RT1050_ATK || BOARD_RT1050_SeeedStudio)
default 45 if (BOARD_RT1050_FIRE || BOARD_RT1050_ShareBoard)
depends on RT_USING_LCD
endmenu
#menu "Select SDRAM driver"
config RT_USING_SDRAM
bool "Using sdram"
default y
#endmenu
#menu "Select RTC driver"
config RT_USING_RTC_HP
bool "Using hp rtc"
select RT_USING_RTC
default n
#endmenu
if RT_USING_USB_DEVICE
choice
prompt "select usb device controller"
default RT_USING_EHCI0_AS_DEVICE
config RT_USING_EHCI0_AS_DEVICE
bool "set EHCI0 as device"
config RT_USING_EHCI1_AS_DEVICE
bool "set EHCI1 as device"
endchoice
endif
endmenu
# i.MX RT1050
## 1. 简介
i.MX RT 1050系列芯片,是由 NXP 半导体公司推出的跨界处理器芯片。它基于应用处理器的芯片架构,采用了微控制器的内核Cortex-M7,从而具有应用处理器的高性能及丰富的功能,又具备传统微控制器的易用、实时及低功耗的特性。
BSP默认支持的i.MX RT1052处理器具备以下简要的特性:
| 介绍 | 描述 |
| ---- | ---- |
| 主CPU平台 | ARM Cortex-M7 |
| 最高频率 | 600MHz |
| 内部存储器 | 512KB SRAM |
| 外部存储器接口 | NAND、eMMC、QuadSPI NOR Flash 和 Parallel NOR Flash |
## 2. 编译说明
i.MX RT1050板级包支持MDK5﹑IAR开发环境和GCC编译器,以下是具体版本信息:
| IDE/编译器 | 已测试版本 |
| ---------- | --------- |
| MDK5 | MDK525 |
| IAR | IAR 8.11.3.13984 |
| GCC | GCC 5.4.1 20160919 (release) |
## 3.BSP使用
### 3.1 配置工程
i.MX RT1052 BSP支持多块开发板,包括官方开发板MIMXRT1050-EVK,野火的i.MX RT1052开发板等。如果不是基于官方开发板,那么需要重新配置并生成工程:
- 在bsp下打开env工具
- 输入`menuconfig`命令,`RT1052 Board select (***)-->`选择正确的开发板。
- 输入`scons --target=mdk5 -s``scons --target=iar`来生成需要的工程
### 3.2 下载和仿真
#### 3.2.1 MIMXRT1050-EVK
EVK开发板有板载OpenSDA仿真器,仿真器还连接到i.MX RT1052的UART1。使用USB线连接电脑和仿真器的USB口(J28),就可以进行下载和仿真。在终端工具里打开仿真器的虚拟串口。
#### 3.2.2 野火开发板
连接外置仿真器(野火DAP仿真器或者Jlink)后,就可以进行下载和仿真。使用USB线连接开发板底板的USB转串口,在终端工具里打开相应的串口。
#### 3.2.3 ShareBoard开发板
连接外置仿真器Jlink后,就可以进行下载和仿真。使用USB线连接开发板底板的USB转串口,在终端工具里打开相应的串口。
#### 3.2.4 正点原子开发板
连接外置仿真器(正点原子DAP仿真器或者Jlink)后,就可以进行下载和仿真。使用USB线连接开发板底板的USB_232,在终端工具里打开相应的串口。
#### 3.2.5 SeeedStudio开发板
连接外置仿真器Jlink后,就可以进行下载和仿真。使用TTL转串口工具连接开发板上J3的17/18引脚,在终端工具里打开相应的串口。(17接RX,18接TX)
### 3.3 运行结果
如果编译 & 烧写无误,当复位设备后,会在串口上看到RT-Thread的启动logo信息:
```
\ | /
- RT - Thread Operating System
/ | \ 3.0.4 build May 2 2018
2006 - 2018 Copyright by rt-thread team
lwIP-2.0.2 initialized!
using armcc, version: 5060750
build time: May 2 2018 21:52:40
msh />[PHY] wait autonegotiation complete...
SD card capacity 123904 KB
probe mmcsd block device!
found part[0], begin: 32256, size: 120.992MB
File System initialized!
[PHY] wait autonegotiation complete...
```
## 4. 驱动支持情况及计划
| 驱动 | 支持情况 | 备注 |
| ------ | ---- | ------ |
| UART | 支持 | UART 1~8 |
| GPIO | 支持 | |
| IIC | 支持 | IIC 1~4 |
| SPI | 支持 | SPI 1~4 |
| ETH | 支持 | 暂时仅支持官方的ETH |
| LCD | 支持 | |
| RTC | 支持 | |
| SDIO | 支持 | 暂时仅仅支持一个SDIO,还不支持中断方式 |
| SDRAM | 支持 | 32M SDRAM,后面2M作为Non Cache区域 |
## 5. 联系人信息
维护人:
- [tanek](https://github.com/TanekLiang)
- [liu2guang](https://github.com/liu2guang)
## 6. 参考
- [MIMXRT1050-EVK: i.MX RT1050评估套件概述](https://www.nxp.com/cn/products/processors-and-microcontrollers/applications-processors/i.mx-applications-processors/i.mx-rt-series/i.mx-rt1050-evaluation-kit:MIMXRT1050-EVK)
- [MIMXRT1050 EVK Board Hardware User’s Guide ](https://www.nxp.com/docs/en/user-guide/MIMXRT1050EVKHUG.pdf)
- [i.MX RT Series Crossover Processor Quick Start Guide](https://www.nxp.com/docs/en/user-guide/IMXRT1050EVKQSG.pdf)
- [i.MX RT Series Crossover Processor Fact Sheet](https://www.nxp.com/docs/en/fact-sheet/IMXRTSERIESFS.pdf)
- [Evaluation Kit Based on i.MX RT1050 Crossover Processors](https://www.nxp.com/docs/en/fact-sheet/IMXRT1050EVKFS.pdf)
# for module compiling
import os
Import('RTT_ROOT')
cwd = str(Dir('#'))
objs = []
list = os.listdir(cwd)
for d in list:
path = os.path.join(cwd, d)
if os.path.isfile(os.path.join(path, 'SConscript')):
objs = objs + SConscript(os.path.join(d, 'SConscript'))
Return('objs')
import os
import sys
import rtconfig
if os.getenv('RTT_ROOT'):
RTT_ROOT = os.getenv('RTT_ROOT')
else:
RTT_ROOT = os.path.normpath(os.getcwd() + '/../../..')
sys.path = sys.path + [os.path.join(RTT_ROOT, 'tools')]
from building import *
TARGET = 'rtthread-imxrt.' + rtconfig.TARGET_EXT
if rtconfig.PLATFORM == 'armcc':
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS,
# overwrite cflags, because cflags has '--C99'
CXXCOM = '$CXX -o $TARGET --cpp -c $CXXFLAGS $_CCCOMCOM $SOURCES')
else:
env = Environment(tools = ['mingw'],
AS = rtconfig.AS, ASFLAGS = rtconfig.AFLAGS,
CC = rtconfig.CC, CCFLAGS = rtconfig.CFLAGS,
CXX = rtconfig.CXX, CXXFLAGS = rtconfig.CXXFLAGS,
AR = rtconfig.AR, ARFLAGS = '-rc',
LINK = rtconfig.LINK, LINKFLAGS = rtconfig.LFLAGS,
CXXCOM = '$CXX -o $TARGET -c $CXXFLAGS $_CCCOMCOM $SOURCES')
env.PrependENVPath('PATH', rtconfig.EXEC_PATH)
if rtconfig.PLATFORM == 'iar':
env.Replace(CCCOM = ['$CC $CCFLAGS $CPPFLAGS $_CPPDEFFLAGS $_CPPINCFLAGS -o $TARGET $SOURCES'])
env.Replace(ARFLAGS = [''])
env.Replace(LINKCOM = ['$LINK $SOURCES $LINKFLAGS -o $TARGET --map project.map'])
Export('RTT_ROOT')
Export('rtconfig')
# prepare building environment
objs = PrepareBuilding(env, RTT_ROOT, has_libcpu=False)
objs = objs + SConscript('../Libraries/imxrt1050/SConscript')
# make a building
DoBuilding(TARGET, objs)
def Update_MDKFlashProgrammingAlgorithm(flash_dict):
import xml.etree.ElementTree as etree
from utils import xml_indent
project_tree = etree.parse('project.uvoptx')
root = project_tree.getroot()
out = file('project.uvoptx', 'wb')
for elem in project_tree.iterfind('.//Target/TargetOption/TargetDriverDllRegistry/SetRegEntry'):
Key = elem.find('Key')
if Key.text in flash_dict.keys():
elem.find('Name').text = flash_dict[Key.text]
xml_indent(root)
out.write(etree.tostring(root, encoding='utf-8'))
out.close()
Import('rtconfig')
from building import *
cwd = GetCurrentDir()
src = Glob('*.c')
CPPPATH = [cwd, str(Dir('#'))]
# add for startup script
if rtconfig.CROSS_TOOL == 'gcc':
CPPDEFINES = ['__START=entry']
else:
CPPDEFINES = []
group = DefineGroup('Applications', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES=CPPDEFINES)
Return('group')
/*
* File : lcd_init.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2018-06-12 Tanek first version
*/
#include <rtthread.h>
#if defined(PKG_USING_GUIENGINE)
#include <rtgui/driver.h>
int lcd_init(void)
{
struct rt_device *device;
device = rt_device_find("lcd");
if (device)
{
rtgui_graphic_set_device(device);
}
return 0;
}
INIT_APP_EXPORT(lcd_init);
#endif
/*
* File : clock.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2006 - 2012, RT-Thread Development Team
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2017-10-10 Tanek first version
*/
#include <stdint.h>
#include <rthw.h>
#include <rtthread.h>
#ifdef RT_USING_DFS
#include <dfs_file.h>
#endif
#ifdef RT_USING_DEVICE
#include <rtdevice.h>
#endif
#include <board.h>
void dump_clock(void)
{
rt_kprintf("OSC clock : %d\n", CLOCK_GetFreq(kCLOCK_OscClk));
rt_kprintf("RTC clock : %d\n", CLOCK_GetFreq(kCLOCK_RtcClk));
rt_kprintf("CPU clock: %d\n", CLOCK_GetFreq(kCLOCK_CpuClk));
rt_kprintf("AHB clock : %d\n", CLOCK_GetFreq(kCLOCK_AhbClk));
rt_kprintf("SEMC clock : %d\n", CLOCK_GetFreq(kCLOCK_SemcClk));
rt_kprintf("IPG clock : %d\n", CLOCK_GetFreq(kCLOCK_IpgClk));
rt_kprintf("ARMPLLCLK(PLL1) : %d\n", CLOCK_GetFreq(kCLOCK_ArmPllClk));
rt_kprintf("SYSPLLCLK(PLL2/528_PLL) : %d\n", CLOCK_GetFreq(kCLOCK_SysPllClk));
rt_kprintf("SYSPLLPDF0CLK : %d\n", CLOCK_GetFreq(kCLOCK_SysPllPfd0Clk));
rt_kprintf("SYSPLLPFD1CLK : %d\n", CLOCK_GetFreq(kCLOCK_SysPllPfd1Clk));
rt_kprintf("SYSPLLPFD2CLK : %d\n", CLOCK_GetFreq(kCLOCK_SysPllPfd2Clk));
rt_kprintf("SYSPLLPFD3CLK : %d\n", CLOCK_GetFreq(kCLOCK_SysPllPfd3Clk));
rt_kprintf("USB1PLLCLK(PLL3) : %d\n", CLOCK_GetFreq(kCLOCK_Usb1PllClk));
rt_kprintf("USB1PLLPDF0CLK : %d\n", CLOCK_GetFreq(kCLOCK_Usb1PllPfd0Clk));
rt_kprintf("USB1PLLPFD1CLK : %d\n", CLOCK_GetFreq(kCLOCK_Usb1PllPfd1Clk));
rt_kprintf("USB1PLLPFD2CLK : %d\n", CLOCK_GetFreq(kCLOCK_Usb1PllPfd2Clk));
rt_kprintf("USB1PLLPFD3CLK : %d\n", CLOCK_GetFreq(kCLOCK_Usb1PllPfd3Clk));
rt_kprintf("Audio PLLCLK(PLL4) : %d\n", CLOCK_GetFreq(kCLOCK_AudioPllClk));
rt_kprintf("Video PLLCLK(PLL5) : %d\n", CLOCK_GetFreq(kCLOCK_VideoPllClk));
rt_kprintf("Enet PLLCLK ref_enetpll0 : %d\n", CLOCK_GetFreq(kCLOCK_EnetPll0Clk));
rt_kprintf("Enet PLLCLK ref_enetpll1 : %d\n", CLOCK_GetFreq(kCLOCK_EnetPll1Clk));
rt_kprintf("USB2PLLCLK(PLL7) : %d\n", CLOCK_GetFreq(kCLOCK_Usb2PllClk));
}
void dump_cc_info(void)
{
#if defined(__CC_ARM)
rt_kprintf("using armcc, version: %d\n", __ARMCC_VERSION);
#elif defined(__ICCARM__)
rt_kprintf("using iccarm, version: %d\n", __VER__);
#elif defined(__GNUC__)
rt_kprintf("using gcc, version: %d.%d\n", __GNUC__, __GNUC_MINOR__);
#endif
}
void dump_link_info(void)
{
#if defined(__CC_ARM)
#elif defined(__ICCARM__)
#elif defined(__GNUC__)
#define DUMP_SYMBOL(__SYM) \
extern int __SYM; \
rt_kprintf("%s: %p\n", #__SYM, &__SYM)
DUMP_SYMBOL(__fsymtab_start);
DUMP_SYMBOL(__fsymtab_end);
DUMP_SYMBOL(__vsymtab_start);
DUMP_SYMBOL(__vsymtab_end);
DUMP_SYMBOL(__rt_init_start);
DUMP_SYMBOL(__rt_init_end);
DUMP_SYMBOL(__exidx_start);
DUMP_SYMBOL(__exidx_end);
DUMP_SYMBOL(__etext);
DUMP_SYMBOL(__data_start__);
DUMP_SYMBOL(__data_end__);
DUMP_SYMBOL(__noncachedata_start__);
DUMP_SYMBOL(__noncachedata_init_end__);
DUMP_SYMBOL(__noncachedata_end__);
DUMP_SYMBOL(__bss_start__);
DUMP_SYMBOL(__bss_end__);
DUMP_SYMBOL(stack_start);
DUMP_SYMBOL(stack_end);
DUMP_SYMBOL(heap_start);
#endif
}
int main(void)
{
rt_uint32_t result;
//dump_clock();
dump_cc_info();
dump_link_info();
rt_kprintf("build time: %s %s\n", __DATE__, __TIME__);
#if defined(RT_USING_DFS) && defined(RT_USING_SDIO)
result = mmcsd_wait_cd_changed(RT_TICK_PER_SECOND);
if (result == MMCSD_HOST_PLUGED)
{
/* mount sd card fat partition 1 as root directory */
if (dfs_mount("sd0", "/", "elm", 0, 0) == 0)
rt_kprintf("File System initialized!\n");
else
rt_kprintf("File System init failed!\n");
}
else
{
rt_kprintf("sdcard init fail or timeout: %d!\n", result);
}
#endif
}
/*@}*/
from building import *
cwd = GetCurrentDir()
# add the general drivers.
src = Split("""
board.c
""")
CPPPATH = [cwd]
CPPDEFINES = []
group = DefineGroup('Drivers', src, depend = [''], CPPPATH = CPPPATH, CPPDEFINES=CPPDEFINES)
Return('group')
/*
* File : board.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009 RT-Thread Develop Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-01-05 Bernard first implementation
*/
#include <stdint.h>
#include <rthw.h>
#include <rtthread.h>
#include "board.h"
#include "drv_uart.h"
#if defined(RT_USING_SDRAM) && defined(RT_USING_MEMHEAP_AS_HEAP)
static struct rt_memheap system_heap;
#endif
/* ARM PLL configuration for RUN mode */
const clock_arm_pll_config_t armPllConfig = { .loopDivider = 100U };
/* SYS PLL configuration for RUN mode */
const clock_sys_pll_config_t sysPllConfig = { .loopDivider = 1U };
/* USB1 PLL configuration for RUN mode */
const clock_usb_pll_config_t usb1PllConfig = { .loopDivider = 0U };
static void BOARD_BootClockGate(void)
{
// /* Disable all unused peripheral clock */
// CCM->CCGR0 = 0x00C0000FU;
// CCM->CCGR1 = 0x30000000U;
// CCM->CCGR2 = 0x003F0030U;
// CCM->CCGR3 = 0xF0000330U;
// CCM->CCGR4 = 0x0000FF3CU;
// CCM->CCGR5 = 0xF000330FU;
// CCM->CCGR6 = 0x00FC0300U;
}
static void BOARD_BootClockRUN(void)
{
/* Boot ROM did initialize the XTAL, here we only sets external XTAL OSC freq */
CLOCK_SetXtalFreq(24000000U);
CLOCK_SetRtcXtalFreq(32768U);
CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0x1); /* Set PERIPH_CLK2 MUX to OSC */
CLOCK_SetMux(kCLOCK_PeriphMux, 0x1); /* Set PERIPH_CLK MUX to PERIPH_CLK2 */
/* Setting the VDD_SOC to 1.5V. It is necessary to config AHB to 600Mhz */
DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x12);
CLOCK_InitArmPll(&armPllConfig); /* Configure ARM PLL to 1200M */
#ifndef SKIP_SYSCLK_INIT
CLOCK_InitSysPll(&sysPllConfig); /* Configure SYS PLL to 528M */
#endif
#ifndef SKIP_USB_PLL_INIT
CLOCK_InitUsb1Pll(&usb1PllConfig); /* Configure USB1 PLL to 480M */
#endif
CLOCK_SetDiv(kCLOCK_ArmDiv, 0x1); /* Set ARM PODF to 0, divide by 2 */
CLOCK_SetDiv(kCLOCK_AhbDiv, 0x0); /* Set AHB PODF to 0, divide by 1 */
CLOCK_SetDiv(kCLOCK_IpgDiv, 0x3); /* Set IPG PODF to 3, divede by 4 */
CLOCK_SetMux(kCLOCK_PrePeriphMux, 0x3); /* Set PRE_PERIPH_CLK to PLL1, 1200M */
CLOCK_SetMux(kCLOCK_PeriphMux, 0x0); /* Set PERIPH_CLK MUX to PRE_PERIPH_CLK */
/* Disable unused clock */
BOARD_BootClockGate();
/* Power down all unused PLL */
CLOCK_DeinitAudioPll();
CLOCK_DeinitVideoPll();
CLOCK_DeinitEnetPll();
CLOCK_DeinitUsb2Pll();
/* iomuxc clock (iomuxc_clk_enable): 0x03u */
CLOCK_EnableClock(kCLOCK_Iomuxc);
/* Update core clock */
SystemCoreClockUpdate();
}
/* MPU configuration. */
static void BOARD_ConfigMPU(void)
{
/* Disable I cache and D cache */
SCB_DisableICache();
SCB_DisableDCache();
/* Disable MPU */
ARM_MPU_Disable();
/* Region 0 setting */
MPU->RBAR = ARM_MPU_RBAR(0, 0xC0000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_512MB);
/* Region 1 setting */
MPU->RBAR = ARM_MPU_RBAR(1, 0x80000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1GB);
/* Region 2 setting */
// spi flash: normal type, cacheable, no bufferable, no shareable
MPU->RBAR = ARM_MPU_RBAR(2, 0x60000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 0, 0, ARM_MPU_REGION_SIZE_512MB);
/* Region 3 setting */
MPU->RBAR = ARM_MPU_RBAR(3, 0x00000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 2, 0, 0, 0, 0, ARM_MPU_REGION_SIZE_1GB);
/* Region 4 setting */
MPU->RBAR = ARM_MPU_RBAR(4, 0x00000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB);
/* Region 5 setting */
MPU->RBAR = ARM_MPU_RBAR(5, 0x20000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_128KB);
/* Region 6 setting */
MPU->RBAR = ARM_MPU_RBAR(6, 0x20200000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_256KB);
#if defined(SDRAM_MPU_INIT)
/* Region 7 setting */
MPU->RBAR = ARM_MPU_RBAR(7, 0x80000000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 0, 0, 1, 1, 0, ARM_MPU_REGION_SIZE_32MB);
/* Region 8 setting */
MPU->RBAR = ARM_MPU_RBAR(8, 0x81E00000U);
MPU->RASR = ARM_MPU_RASR(0, ARM_MPU_AP_FULL, 1, 1, 0, 0, 0, ARM_MPU_REGION_SIZE_2MB);
#endif
/* Enable MPU */
ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk);
/* Enable I cache and D cache */
SCB_EnableDCache();
SCB_EnableICache();
}
/**
* This is the timer interrupt service routine.
*
*/
void SysTick_Handler(void)
{
/* enter interrupt */
rt_interrupt_enter();
rt_tick_increase();
/* leave interrupt */
rt_interrupt_leave();
}
void SystemInitHook(void)
{
BOARD_ConfigMPU();
#if defined(RT_USING_SDRAM)
extern int imxrt_sdram_init(void);
imxrt_sdram_init();
#endif
}
/**
* This function will initial rt1050 board.
*/
void rt_hw_board_init()
{
BOARD_BootClockRUN();
SysTick_Config(SystemCoreClock / RT_TICK_PER_SECOND);
#ifdef RT_USING_COMPONENTS_INIT
rt_components_board_init();
#endif
#ifdef RT_USING_CONSOLE
rt_console_set_device(RT_CONSOLE_DEVICE_NAME);
#endif
#ifdef RT_USING_HEAP
#if defined(RT_USING_SDRAM) && defined(RT_USING_MEMHEAP_AS_HEAP)
rt_kprintf("sdram heap, begin: 0x%p, end: 0x%p\n", SDRAM_BEGIN, SDRAM_END);
rt_system_heap_init((void *)SDRAM_BEGIN, (void *)SDRAM_END);
rt_kprintf("sram heap, begin: 0x%p, end: 0x%p\n", HEAP_BEGIN, HEAP_END);
rt_memheap_init(&system_heap, "sram", (void *)HEAP_BEGIN, HEAP_SIZE);
#else
rt_kprintf("sram heap, begin: 0x%p, end: 0x%p\n", HEAP_BEGIN, HEAP_END);
rt_system_heap_init((void *)HEAP_BEGIN, (void *)HEAP_END);
#endif
#endif
}
/*@}*/
/*
* File : board.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) 2009, RT-Thread Development Team
*
* The license and distribution terms for this file may be
* found in the file LICENSE in this distribution or at
* http://www.rt-thread.org/license/LICENSE
*
* Change Logs:
* Date Author Notes
* 2009-09-22 Bernard add board.h to this bsp
*/
// <<< Use Configuration Wizard in Context Menu >>>
#ifndef __BOARD_H__
#define __BOARD_H__
#include <fsl_common.h>
#include <fsl_lpuart.h>
#include <fsl_iomuxc.h>
#ifdef __CC_ARM
extern int Image$$RTT_HEAP$$ZI$$Base;
extern int Image$$RTT_HEAP$$ZI$$Limit;
#define HEAP_BEGIN (&Image$$RTT_HEAP$$ZI$$Base)
#define HEAP_END (&Image$$RTT_HEAP$$ZI$$Limit)
#elif __ICCARM__
#pragma section="HEAP"
#define HEAP_BEGIN (__segment_end("HEAP"))
extern void __RTT_HEAP_END;
#define HEAP_END (&__RTT_HEAP_END)
#else
extern int heap_start;
extern int heap_end;
#define HEAP_BEGIN (&heap_start)
#define HEAP_END (&heap_end)
#endif
#define HEAP_SIZE ((uint32_t)HEAP_END - (uint32_t)HEAP_BEGIN)
#define SDRAM_MPU_INIT
#define SDRAM_BEGIN (0x80000000u)
#define SDRAM_END (0x81E00000u)
void rt_hw_board_init(void);
#endif
//*** <<< end of configuration section >>> ***
/*
* Copyright 2017 NXP
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
FUNC void Setup (void) {
SP = _RDWORD(0x60002000); // Setup Stack Pointer
PC = _RDWORD(0x60002004); // Setup Program Counter
_WDWORD(0xE000ED08, 0x60002000); // Setup Vector Table Offset Register
}
FUNC void OnResetExec (void) { // executes upon software RESET
Setup(); // Setup for Running
}
LOAD %L INCREMENTAL // Download
Setup(); // Setup for Running
// g, main
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<?xml version="1.0" encoding="iso-8859-1"?>
<workspace>
<project>
<path>$WS_DIR$\project.ewp</path>
</project>
<batchBuild/>
</workspace>
<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_optx.xsd">
<SchemaVersion>1.0</SchemaVersion>
<Header>### uVision Project, (C) Keil Software</Header>
<Extensions>
<cExt>*.c</cExt>
<aExt>*.s*; *.src; *.a*</aExt>
<oExt>*.obj; *.o</oExt>
<lExt>*.lib</lExt>
<tExt>*.txt; *.h; *.inc</tExt>
<pExt>*.plm</pExt>
<CppX>*.cpp</CppX>
<nMigrate>0</nMigrate>
</Extensions>
<DaveTm>
<dwLowDateTime>0</dwLowDateTime>
<dwHighDateTime>0</dwHighDateTime>
</DaveTm>
<Target>
<TargetName>RT-Thread IMXRT1052</TargetName>
<ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName>
<TargetOption>
<CLKADS>12000000</CLKADS>
<OPTTT>
<gFlags>1</gFlags>
<BeepAtEnd>1</BeepAtEnd>
<RunSim>0</RunSim>
<RunTarget>1</RunTarget>
<RunAbUc>0</RunAbUc>
</OPTTT>
<OPTHX>
<HexSelection>1</HexSelection>
<FlashByte>65535</FlashByte>
<HexRangeLowAddress>0</HexRangeLowAddress>
<HexRangeHighAddress>0</HexRangeHighAddress>
<HexOffset>0</HexOffset>
</OPTHX>
<OPTLEX>
<PageWidth>79</PageWidth>
<PageLength>66</PageLength>
<TabStop>8</TabStop>
<ListingPath>.\build\</ListingPath>
</OPTLEX>
<ListingPage>
<CreateCListing>1</CreateCListing>
<CreateAListing>1</CreateAListing>
<CreateLListing>1</CreateLListing>
<CreateIListing>0</CreateIListing>
<AsmCond>1</AsmCond>
<AsmSymb>1</AsmSymb>
<AsmXref>0</AsmXref>
<CCond>1</CCond>
<CCode>0</CCode>
<CListInc>0</CListInc>
<CSymb>0</CSymb>
<LinkerCodeListing>0</LinkerCodeListing>
</ListingPage>
<OPTXL>
<LMap>1</LMap>
<LComments>1</LComments>
<LGenerateSymbols>1</LGenerateSymbols>
<LLibSym>1</LLibSym>
<LLines>1</LLines>
<LLocSym>1</LLocSym>
<LPubSym>1</LPubSym>
<LXref>0</LXref>
<LExpSel>0</LExpSel>
</OPTXL>
<OPTFL>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<IsCurrentTarget>1</IsCurrentTarget>
</OPTFL>
<CpuCode>8</CpuCode>
<DebugOpt>
<uSim>0</uSim>
<uTrg>1</uTrg>
<sLdApp>1</sLdApp>
<sGomain>1</sGomain>
<sRbreak>1</sRbreak>
<sRwatch>1</sRwatch>
<sRmem>1</sRmem>
<sRfunc>1</sRfunc>
<sRbox>1</sRbox>
<tLdApp>1</tLdApp>
<tGomain>1</tGomain>
<tRbreak>1</tRbreak>
<tRwatch>1</tRwatch>
<tRmem>1</tRmem>
<tRfunc>0</tRfunc>
<tRbox>1</tRbox>
<tRtrace>1</tRtrace>
<sRSysVw>1</sRSysVw>
<tRSysVw>1</tRSysVw>
<sRunDeb>0</sRunDeb>
<sLrtime>0</sLrtime>
<bEvRecOn>1</bEvRecOn>
<bSchkAxf>0</bSchkAxf>
<bTchkAxf>0</bTchkAxf>
<nTsel>3</nTsel>
<sDll></sDll>
<sDllPa></sDllPa>
<sDlgDll></sDlgDll>
<sDlgPa></sDlgPa>
<sIfile></sIfile>
<tDll></tDll>
<tDllPa></tDllPa>
<tDlgDll></tDlgDll>
<tDlgPa></tDlgPa>
<tIfile>.\Libraries\arm\evkmimxrt1050_flexspi_nor.ini</tIfile>
<pMon>BIN\CMSIS_AGDI.dll</pMon>
</DebugOpt>
<TargetDriverDllRegistry>
<SetRegEntry>
<Number>0</Number>
<Key>JL2CM3</Key>
<Name>-U30000299 -O78 -S2 -ZTIFSpeedSel5000 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST1 -TO18 -TC10000000 -TP21 -TDS8001 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO7 -FD20000000 -FCF000 -FN1 -FF0MIMXRT105x_HYPER_256KB_SEC.FLM -FS060000000 -FL04000000 -FP0($$Device:MIMXRT1052$Flash\MIMXRT105x_HYPER_256KB_SEC.FLM)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>CMSIS_AGDI</Key>
<Name>-X"" -O974 -S0 -C0 -P00 -TO18 -TC10000000 -TP20 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -FO7 -FD20000000 -FCF000 -FN1 -FF0MIMXRT105x_HYPER_256KB_SEC.FLM -FS060000000 -FL04000000 -FP0($$Device:MIMXRT1052$Flash\MIMXRT105x_HYPER_256KB_SEC.FLM)</Name>
</SetRegEntry>
<SetRegEntry>
<Number>0</Number>
<Key>UL2CM3</Key>
<Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FCF000 -FN1 -FF0MIMXRT105x_HYPER_256KB_SEC -FS060000000 -FL04000000 -FP0($$Device:MIMXRT1052$Flash\MIMXRT105x_HYPER_256KB_SEC.FLM))</Name>
</SetRegEntry>
</TargetDriverDllRegistry>
<Breakpoint/>
<Tracepoint>
<THDelay>0</THDelay>
</Tracepoint>
<DebugFlag>
<trace>0</trace>
<periodic>0</periodic>
<aLwin>0</aLwin>
<aCover>0</aCover>
<aSer1>0</aSer1>
<aSer2>0</aSer2>
<aPa>0</aPa>
<viewmode>0</viewmode>
<vrSel>0</vrSel>
<aSym>0</aSym>
<aTbox>0</aTbox>
<AscS1>0</AscS1>
<AscS2>0</AscS2>
<AscS3>0</AscS3>
<aSer3>0</aSer3>
<eProf>0</eProf>
<aLa>0</aLa>
<aPa1>0</aPa1>
<AscS4>0</AscS4>
<aSer4>0</aSer4>
<StkLoc>0</StkLoc>
<TrcWin>0</TrcWin>
<newCpu>0</newCpu>
<uProt>0</uProt>
</DebugFlag>
<LintExecutable></LintExecutable>
<LintConfigFile></LintConfigFile>
<bLintAuto>0</bLintAuto>
<bAutoGenD>0</bAutoGenD>
<LntExFlags>0</LntExFlags>
<pMisraName></pMisraName>
<pszMrule></pszMrule>
<pSingCmds></pSingCmds>
<pMultCmds></pMultCmds>
<pMisraNamep></pMisraNamep>
<pszMrulep></pszMrulep>
<pSingCmdsp></pSingCmdsp>
<pMultCmdsp></pMultCmdsp>
</TargetOption>
</Target>
<Group>
<GroupName>::CMSIS</GroupName>
<tvExp>0</tvExp>
<tvExpOptDlg>0</tvExpOptDlg>
<cbSel>0</cbSel>
<RteFlg>1</RteFlg>
</Group>
</ProjectOpt>
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import os
# toolchains options
ARCH='arm'
CPU='cortex-m7'
CROSS_TOOL='gcc'
if os.getenv('RTT_CC'):
CROSS_TOOL = os.getenv('RTT_CC')
# cross_tool provides the cross compiler
# EXEC_PATH is the compiler execute path, for example, CodeSourcery, Keil MDK, IAR
if CROSS_TOOL == 'gcc':
PLATFORM = 'gcc'
EXEC_PATH = '/usr/local/Cellar/arm-none-eabi-gcc/7-2017-q4-major/gcc/bin/'
elif CROSS_TOOL == 'keil':
PLATFORM = 'armcc'
EXEC_PATH = 'C:/Keil_v5'
elif CROSS_TOOL == 'iar':
PLATFORM = 'iar'
EXEC_PATH = r'C:/Program Files (x86)/IAR Systems/Embedded Workbench 8.0'
if os.getenv('RTT_EXEC_PATH'):
EXEC_PATH = os.getenv('RTT_EXEC_PATH')
#BUILD = 'debug'
BUILD = 'release'
if PLATFORM == 'gcc':
# toolchains
PREFIX = 'arm-none-eabi-'
CC = PREFIX + 'gcc'
CXX = PREFIX + 'g++'
AS = PREFIX + 'gcc'
AR = PREFIX + 'ar'
LINK = PREFIX + 'gcc'
TARGET_EXT = 'elf'
SIZE = PREFIX + 'size'
OBJDUMP = PREFIX + 'objdump'
OBJCPY = PREFIX + 'objcopy'
STRIP = PREFIX + 'strip'
DEVICE = ' -mcpu=cortex-m7 -mthumb -mfpu=fpv4-sp-d16 -mfloat-abi=hard -ffunction-sections -fdata-sections'
CFLAGS = DEVICE + ' -std=c99 -Wall -D__FPU_PRESENT -eentry'
AFLAGS = ' -c' + DEVICE + ' -x assembler-with-cpp -Wa,-mimplicit-it=thumb '
LFLAGS = DEVICE + ' -lm -lgcc -lc' + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread-imxrt-gcc.map,-cref,-u,Reset_Handler -T ./Libraries/gcc/MIMXRT1052xxxxx_flexspi_nor.ld'
CPATH = ''
LPATH = ''
if BUILD == 'debug':
CFLAGS += ' -gdwarf-2'
AFLAGS += ' -gdwarf-2'
CFLAGS += ' -O0'
else:
CFLAGS += ' -O2 -Os'
POST_ACTION = OBJCPY + ' -O binary --remove-section=.boot_data --remove-section=.image_vertor_table --remove-section=.ncache $TARGET rtthread.bin\n' + SIZE + ' $TARGET \n'
# module setting
CXXFLAGS = ' -Woverloaded-virtual -fno-exceptions -fno-rtti '
M_CFLAGS = CFLAGS + ' -mlong-calls -fPIC '
M_CXXFLAGS = CXXFLAGS + ' -mlong-calls -fPIC'
M_LFLAGS = DEVICE + CXXFLAGS + ' -Wl,--gc-sections,-z,max-page-size=0x4' +\
' -shared -fPIC -nostartfiles -static-libgcc'
M_POST_ACTION = STRIP + ' -R .hash $TARGET\n' + SIZE + ' $TARGET \n'
elif PLATFORM == 'armcc':
# toolchains
CC = 'armcc'
CXX = 'armcc'
AS = 'armasm'
AR = 'armar'
LINK = 'armlink'
TARGET_EXT = 'axf'
DEVICE = ' --cpu Cortex-M7.fp.sp'
CFLAGS = DEVICE + ' --apcs=interwork'
AFLAGS = DEVICE
LFLAGS = DEVICE + ' --libpath "' + EXEC_PATH + '\ARM\ARMCC\lib" --info sizes --info totals --info unused --info veneers --list rtthread-imxrt-mdk.map --scatter ./Libraries/arm/MIMXRT1052xxxxx_flexspi_nor.scf'
CFLAGS += ' --diag_suppress=66,1296,186'
CFLAGS += ' -I' + EXEC_PATH + '/ARM/RV31/INC'
LFLAGS += ' --libpath ' + EXEC_PATH + '/ARM/RV31/LIB'
EXEC_PATH += '/arm/bin40/'
if BUILD == 'debug':
CFLAGS += ' -g -O0'
AFLAGS += ' -g'
else:
CFLAGS += ' -O2'
CXXFLAGS = CFLAGS
CFLAGS += ' --c99'
POST_ACTION = 'fromelf -z $TARGET'
# POST_ACTION = 'fromelf --bin $TARGET --output rtthread.bin \nfromelf -z $TARGET'
elif PLATFORM == 'iar':
# toolchains
CC = 'iccarm'
CXX = 'iccarm'
AS = 'iasmarm'
AR = 'iarchive'
LINK = 'ilinkarm'
TARGET_EXT = 'out'
DEVICE = ' -D__FPU_PRESENT'
CFLAGS = DEVICE
CFLAGS += ' --diag_suppress Pa050'
CFLAGS += ' --no_cse'
CFLAGS += ' --no_unroll'
CFLAGS += ' --no_inline'
CFLAGS += ' --no_code_motion'
CFLAGS += ' --no_tbaa'
CFLAGS += ' --no_clustering'
CFLAGS += ' --no_scheduling'
CFLAGS += ' --debug'
CFLAGS += ' --endian=little'
CFLAGS += ' --cpu=Cortex-M7'
CFLAGS += ' -e'
CFLAGS += ' --fpu=None'
CFLAGS += ' --dlib_config "' + EXEC_PATH + '/arm/INC/c/DLib_Config_Normal.h"'
CFLAGS += ' -Ol'
CFLAGS += ' --use_c++_inline'
CXXFLAGS = CFLAGS
AFLAGS = ''
AFLAGS += ' -s+'
AFLAGS += ' -w+'
AFLAGS += ' -r'
AFLAGS += ' --cpu Cortex-M7'
AFLAGS += ' --fpu None'
LFLAGS = ' --config ./Libraries/iar/MIMXRT1052xxxxx_flexspi_nor.icf'
LFLAGS += ' --redirect _Printf=_PrintfTiny'
LFLAGS += ' --redirect _Scanf=_ScanfSmall'
LFLAGS += ' --entry __iar_program_start'
EXEC_PATH = EXEC_PATH + '/arm/bin/'
POST_ACTION = ''
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Import('RTT_ROOT')
Import('rtconfig')
from building import *
if GetDepend('BOARD_USING_HYPERFLASH'):
cwd = GetCurrentDir()
src = Glob('*.c')
CPPPATH = [cwd]
if rtconfig.CROSS_TOOL == 'keil':
LINKFLAGS = '--keep=*(.boot_hdr.ivt)'
LINKFLAGS += '--keep=*(.boot_hdr.boot_data)'
LINKFLAGS += '--keep=*(.boot_hdr.dcd_data)'
LINKFLAGS += '--keep=*(.boot_hdr.conf)'
else:
LINKFLAGS = ''
group = DefineGroup('xip', src, depend = [''], CPPPATH = CPPPATH, LINKFLAGS = LINKFLAGS)
Return('group')
if GetDepend('BOARD_USING_QSPIFLASH'):
group = []
Return('group')
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/*
* The Clear BSD License
* Copyright 2017 NXP
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted (subject to the limitations in the disclaimer below) provided
* that the following conditions are met:
*
* o Redistributions of source code must retain the above copyright notice, this list
* of conditions and the following disclaimer.
*
* o Redistributions in binary form must reproduce the above copyright notice, this
* list of conditions and the following disclaimer in the documentation and/or
* other materials provided with the distribution.
*
* o Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "fsl_flexspi_nor_flash.h"
/*******************************************************************************
* Code
******************************************************************************/
#if defined(__CC_ARM) || defined(__GNUC__)
__attribute__((section(".boot_hdr.conf")))
#elif defined(__ICCARM__)
#pragma location=".boot_hdr.conf"
#endif
const flexspi_nor_config_t hyperflash_config =
{
.memConfig =
{
.tag = FLEXSPI_CFG_BLK_TAG,
.version = FLEXSPI_CFG_BLK_VERSION,
.readSampleClkSrc = kFlexSPIReadSampleClk_ExternalInputFromDqsPad,
.csHoldTime = 3u,
.csSetupTime = 3u,
.columnAddressWidth = 3u,
// Enable DDR mode, Wordaddassable, Safe configuration, Differential clock
.controllerMiscOption = (1u << kFlexSpiMiscOffset_DdrModeEnable) |
(1u << kFlexSpiMiscOffset_WordAddressableEnable) |
(1u << kFlexSpiMiscOffset_SafeConfigFreqEnable) |
(1u << kFlexSpiMiscOffset_DiffClkEnable),
.sflashPadType = kSerialFlash_8Pads,
.serialClkFreq = kFlexSpiSerialClk_133MHz,
.sflashA1Size = 64u * 1024u * 1024u,
.dataValidTime = {16u, 16u},
.lookupTable =
{
// Read LUTs
FLEXSPI_LUT_SEQ(CMD_DDR, FLEXSPI_8PAD, 0xA0, RADDR_DDR, FLEXSPI_8PAD, 0x18),
FLEXSPI_LUT_SEQ(CADDR_DDR, FLEXSPI_8PAD, 0x10, DUMMY_DDR, FLEXSPI_8PAD, 0x06),
FLEXSPI_LUT_SEQ(READ_DDR, FLEXSPI_8PAD, 0x04, STOP, FLEXSPI_1PAD, 0x0),
},
},
.pageSize = 512u,
.sectorSize = 256u * 1024u,
.blockSize = 256u * 1024u,
.isUniformBlockSize = true,
};
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