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000daf03
编写于
7月 15, 2014
作者:
N
nongxiaoming
浏览文件
操作
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电子邮件补丁
差异文件
xplorer4330:update the startup code.
上级
7b32a2bd
变更
8
隐藏空白更改
内联
并排
Showing
8 changed file
with
779 addition
and
987 deletion
+779
-987
bsp/xplorer4330/Libraries/Device/NXP/LPC43xx/Source/Templates/ARM/startup_LPC43xx.s
...Device/NXP/LPC43xx/Source/Templates/ARM/startup_LPC43xx.s
+0
-12
bsp/xplorer4330/Libraries/Device/NXP/LPC43xx/Source/Templates/GCC/cr_startup_lpc43xx.c
...ice/NXP/LPC43xx/Source/Templates/GCC/cr_startup_lpc43xx.c
+0
-502
bsp/xplorer4330/Libraries/Device/NXP/LPC43xx/Source/Templates/GCC/cr_startup_lpc43xx_m0sub.c
...P/LPC43xx/Source/Templates/GCC/cr_startup_lpc43xx_m0sub.c
+0
-464
bsp/xplorer4330/Libraries/Device/NXP/LPC43xx/Source/Templates/GCC/startup_LPC43xx.s
...Device/NXP/LPC43xx/Source/Templates/GCC/startup_LPC43xx.s
+266
-0
bsp/xplorer4330/Libraries/Device/NXP/LPC43xx/Source/Templates/GCC/startup_LPC43xx_M0.s
...ice/NXP/LPC43xx/Source/Templates/GCC/startup_LPC43xx_M0.s
+266
-0
bsp/xplorer4330/Libraries/Device/NXP/LPC43xx/Source/Templates/IAR/startup_LPC43xx_M0.s
...ice/NXP/LPC43xx/Source/Templates/IAR/startup_LPC43xx_M0.s
+242
-0
bsp/xplorer4330/Libraries/Device/NXP/LPC43xx/Source/Templates/system_LPC43xx.c
...ries/Device/NXP/LPC43xx/Source/Templates/system_LPC43xx.c
+1
-5
bsp/xplorer4330/Libraries/Device/SConscript
bsp/xplorer4330/Libraries/Device/SConscript
+4
-4
未找到文件。
bsp/xplorer4330/Libraries/Device/NXP/LPC43xx/Source/Templates/ARM/startup_LPC43xx.s
浏览文件 @
000daf03
...
...
@@ -128,10 +128,6 @@ __Vectors DCD __initial_sp ; 0 Top of Stack
DCD
QEI_IRQHandler
; 68 QEI
IF
:LNOT::DEF:
NO_CRP
AREA
|.ARM.__at_0x02FC|
,
CODE
,
READONLY
CRP_Key
DCD
0xFFFFFFFF
ENDIF
AREA
|.text|
,
CODE
,
READONLY
...
...
@@ -327,13 +323,5 @@ __user_initial_stackheap
ENDIF
AREA
|.text|
,
CODE
,
READONLY
getPC
PROC
EXPORT
getPC
MOV
R0
,
LR
BX
LR
ENDP
END
bsp/xplorer4330/Libraries/Device/NXP/LPC43xx/Source/Templates/GCC/cr_startup_lpc43xx.c
已删除
100644 → 0
浏览文件 @
7b32a2bd
//*****************************************************************************
// LPC43xx (Cortex-M4) Microcontroller Startup code for use with LPCXpresso IDE
//
// Version : 140113
//*****************************************************************************
//
// Copyright(C) NXP Semiconductors, 2013-2014
// All rights reserved.
//
// Software that is described herein is for illustrative purposes only
// which provides customers with programming information regarding the
// LPC products. This software is supplied "AS IS" without any warranties of
// any kind, and NXP Semiconductors and its licensor disclaim any and
// all warranties, express or implied, including all implied warranties of
// merchantability, fitness for a particular purpose and non-infringement of
// intellectual property rights. NXP Semiconductors assumes no responsibility
// or liability for the use of the software, conveys no license or rights under any
// patent, copyright, mask work right, or any other intellectual property rights in
// or to any products. NXP Semiconductors reserves the right to make changes
// in the software without notification. NXP Semiconductors also makes no
// representation or warranty that such application will be suitable for the
// specified use without further testing or modification.
//
// Permission to use, copy, modify, and distribute this software and its
// documentation is hereby granted, under NXP Semiconductors' and its
// licensor's relevant copyrights in the software, without fee, provided that it
// is used in conjunction with NXP Semiconductors microcontrollers. This
// copyright, permission, and disclaimer notice must appear in all copies of
// this code.
//*****************************************************************************
#if defined (__cplusplus)
#ifdef __REDLIB__
#error Redlib does not support C++
#else
//*****************************************************************************
//
// The entry point for the C++ library startup
//
//*****************************************************************************
extern
"C"
{
extern
void
__libc_init_array
(
void
);
}
#endif
#endif
#define WEAK __attribute__ ((weak))
#define ALIAS(f) __attribute__ ((weak, alias (#f)))
//*****************************************************************************
#if defined (__cplusplus)
extern
"C"
{
#endif
//*****************************************************************************
#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
// Declaration of external SystemInit function
extern
void
SystemInit
(
void
);
#endif
//*****************************************************************************
//
// Forward declaration of the default handlers. These are aliased.
// When the application defines a handler (with the same name), this will
// automatically take precedence over these weak definitions
//
//*****************************************************************************
void
ResetISR
(
void
);
WEAK
void
NMI_Handler
(
void
);
WEAK
void
HardFault_Handler
(
void
);
WEAK
void
MemManage_Handler
(
void
);
WEAK
void
BusFault_Handler
(
void
);
WEAK
void
UsageFault_Handler
(
void
);
WEAK
void
SVC_Handler
(
void
);
WEAK
void
DebugMon_Handler
(
void
);
WEAK
void
PendSV_Handler
(
void
);
WEAK
void
SysTick_Handler
(
void
);
WEAK
void
IntDefaultHandler
(
void
);
//*****************************************************************************
//
// Forward declaration of the specific IRQ handlers. These are aliased
// to the IntDefaultHandler, which is a 'forever' loop. When the application
// defines a handler (with the same name), this will automatically take
// precedence over these weak definitions
//
//*****************************************************************************
void
DAC_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
#if defined (__USE_LPCOPEN)
void
M0APP_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
#else
void
M0CORE_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
#endif
void
DMA_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
FLASH_EEPROM_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
ETH_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
SDIO_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
LCD_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
USB0_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
USB1_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
SCT_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
RIT_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
TIMER0_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
TIMER1_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
TIMER2_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
TIMER3_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
MCPWM_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
ADC0_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
I2C0_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
SPI_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
I2C1_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
ADC1_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
SSP0_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
SSP1_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
UART0_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
UART1_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
UART2_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
UART3_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
I2S0_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
I2S1_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
SPIFI_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
SGPIO_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
GPIO0_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
GPIO1_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
GPIO2_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
GPIO3_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
GPIO4_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
GPIO5_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
GPIO6_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
GPIO7_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
GINT0_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
GINT1_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
EVRT_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
CAN1_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
#if defined (__USE_LPCOPEN)
void
ADCHS_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
#else
void
VADC_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
#endif
void
ATIMER_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
RTC_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
WDT_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
M0SUB_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
CAN0_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
QEI_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
//*****************************************************************************
//
// The entry point for the application.
// __main() is the entry point for Redlib based applications
// main() is the entry point for Newlib based applications
//
//*****************************************************************************
#if defined (__REDLIB__)
extern
void
__main
(
void
);
#endif
extern
int
main
(
void
);
//*****************************************************************************
//
// External declaration for the pointer to the stack top from the Linker Script
//
//*****************************************************************************
extern
void
_vStackTop
(
void
);
//*****************************************************************************
#if defined (__cplusplus)
}
// extern "C"
#endif
//*****************************************************************************
//
// The vector table.
// This relies on the linker script to place at correct location in memory.
//
//*****************************************************************************
extern
void
(
*
const
g_pfnVectors
[])(
void
);
__attribute__
((
section
(
".isr_vector"
)))
void
(
*
const
g_pfnVectors
[])(
void
)
=
{
// Core Level - CM4
&
_vStackTop
,
// The initial stack pointer
ResetISR
,
// The reset handler
NMI_Handler
,
// The NMI handler
HardFault_Handler
,
// The hard fault handler
MemManage_Handler
,
// The MPU fault handler
BusFault_Handler
,
// The bus fault handler
UsageFault_Handler
,
// The usage fault handler
0
,
// Reserved
0
,
// Reserved
0
,
// Reserved
0
,
// Reserved
SVC_Handler
,
// SVCall handler
DebugMon_Handler
,
// Debug monitor handler
0
,
// Reserved
PendSV_Handler
,
// The PendSV handler
SysTick_Handler
,
// The SysTick handler
// Chip Level - LPC43 (M4)
DAC_IRQHandler
,
// 16
#if defined (__USE_LPCOPEN)
M0APP_IRQHandler
,
// 17 CortexM4/M0 (LPC43XX ONLY)
#else
M0CORE_IRQHandler
,
// 17
#endif
DMA_IRQHandler
,
// 18
0
,
// 19
FLASH_EEPROM_IRQHandler
,
// 20 ORed flash Bank A, flash Bank B, EEPROM interrupts
ETH_IRQHandler
,
// 21
SDIO_IRQHandler
,
// 22
LCD_IRQHandler
,
// 23
USB0_IRQHandler
,
// 24
USB1_IRQHandler
,
// 25
SCT_IRQHandler
,
// 26
RIT_IRQHandler
,
// 27
TIMER0_IRQHandler
,
// 28
TIMER1_IRQHandler
,
// 29
TIMER2_IRQHandler
,
// 30
TIMER3_IRQHandler
,
// 31
MCPWM_IRQHandler
,
// 32
ADC0_IRQHandler
,
// 33
I2C0_IRQHandler
,
// 34
I2C1_IRQHandler
,
// 35
SPI_IRQHandler
,
// 36
ADC1_IRQHandler
,
// 37
SSP0_IRQHandler
,
// 38
SSP1_IRQHandler
,
// 39
UART0_IRQHandler
,
// 40
UART1_IRQHandler
,
// 41
UART2_IRQHandler
,
// 42
UART3_IRQHandler
,
// 43
I2S0_IRQHandler
,
// 44
I2S1_IRQHandler
,
// 45
SPIFI_IRQHandler
,
// 46
SGPIO_IRQHandler
,
// 47
GPIO0_IRQHandler
,
// 48
GPIO1_IRQHandler
,
// 49
GPIO2_IRQHandler
,
// 50
GPIO3_IRQHandler
,
// 51
GPIO4_IRQHandler
,
// 52
GPIO5_IRQHandler
,
// 53
GPIO6_IRQHandler
,
// 54
GPIO7_IRQHandler
,
// 55
GINT0_IRQHandler
,
// 56
GINT1_IRQHandler
,
// 57
EVRT_IRQHandler
,
// 58
CAN1_IRQHandler
,
// 59
0
,
// 60
#if defined (__USE_LPCOPEN)
ADCHS_IRQHandler
,
// 61 ADCHS combined interrupt
#else
VADC_IRQHandler
,
// 61
#endif
ATIMER_IRQHandler
,
// 62
RTC_IRQHandler
,
// 63
0
,
// 64
WDT_IRQHandler
,
// 65
M0SUB_IRQHandler
,
// 66
CAN0_IRQHandler
,
// 67
QEI_IRQHandler
,
// 68
};
//*****************************************************************************
// Functions to carry out the initialization of RW and BSS data sections. These
// are written as separate functions rather than being inlined within the
// ResetISR() function in order to cope with MCUs with multiple banks of
// memory.
//*****************************************************************************
__attribute__
((
section
(
".after_vectors"
)))
void
data_init
(
unsigned
int
romstart
,
unsigned
int
start
,
unsigned
int
len
)
{
unsigned
int
*
pulDest
=
(
unsigned
int
*
)
start
;
unsigned
int
*
pulSrc
=
(
unsigned
int
*
)
romstart
;
unsigned
int
loop
;
for
(
loop
=
0
;
loop
<
len
;
loop
=
loop
+
4
)
*
pulDest
++
=
*
pulSrc
++
;
}
__attribute__
((
section
(
".after_vectors"
)))
void
bss_init
(
unsigned
int
start
,
unsigned
int
len
)
{
unsigned
int
*
pulDest
=
(
unsigned
int
*
)
start
;
unsigned
int
loop
;
for
(
loop
=
0
;
loop
<
len
;
loop
=
loop
+
4
)
*
pulDest
++
=
0
;
}
//*****************************************************************************
// The following symbols are constructs generated by the linker, indicating
// the location of various points in the "Global Section Table". This table is
// created by the linker via the Code Red managed linker script mechanism. It
// contains the load address, execution address and length of each RW data
// section and the execution and length of each BSS (zero initialized) section.
//*****************************************************************************
extern
unsigned
int
__data_section_table
;
extern
unsigned
int
__data_section_table_end
;
extern
unsigned
int
__bss_section_table
;
extern
unsigned
int
__bss_section_table_end
;
//*****************************************************************************
// Reset entry point for your code.
// Sets up a simple runtime environment and initializes the C/C++
// library.
//
//*****************************************************************************
void
ResetISR
(
void
)
{
// *************************************************************
// The following conditional block of code manually resets as
// much of the peripheral set of the LPC43 as possible. This is
// done because the LPC43 does not provide a means of triggering
// a full system reset under debugger control, which can cause
// problems in certain circumstances when debugging.
//
// You can prevent this code block being included if you require
// (for example when creating a final executable which you will
// not debug) by setting the define 'DONT_RESET_ON_RESTART'.
//
#ifndef DONT_RESET_ON_RESTART
// Disable interrupts
__asm
volatile
(
"cpsid i"
);
// equivalent to CMSIS '__disable_irq()' function
unsigned
int
*
RESET_CONTROL
=
(
unsigned
int
*
)
0x40053100
;
// LPC_RGU->RESET_CTRL0 @ 0x40053100
// LPC_RGU->RESET_CTRL1 @ 0x40053104
// Note that we do not use the CMSIS register access mechanism,
// as there is no guarantee that the project has been configured
// to use CMSIS.
// Write to LPC_RGU->RESET_CTRL0
*
(
RESET_CONTROL
+
0
)
=
0x10DF1000
;
// GPIO_RST|AES_RST|ETHERNET_RST|SDIO_RST|DMA_RST|
// USB1_RST|USB0_RST|LCD_RST|M0_SUB_RST
// Write to LPC_RGU->RESET_CTRL1
*
(
RESET_CONTROL
+
1
)
=
0x01DFF7FF
;
// M0APP_RST|CAN0_RST|CAN1_RST|I2S_RST|SSP1_RST|SSP0_RST|
// I2C1_RST|I2C0_RST|UART3_RST|UART1_RST|UART1_RST|UART0_RST|
// DAC_RST|ADC1_RST|ADC0_RST|QEI_RST|MOTOCONPWM_RST|SCT_RST|
// RITIMER_RST|TIMER3_RST|TIMER2_RST|TIMER1_RST|TIMER0_RST
// Clear all pending interrupts in the NVIC
volatile
unsigned
int
*
NVIC_ICPR
=
(
unsigned
int
*
)
0xE000E280
;
unsigned
int
irqpendloop
;
for
(
irqpendloop
=
0
;
irqpendloop
<
8
;
irqpendloop
++
)
{
*
(
NVIC_ICPR
+
irqpendloop
)
=
0xFFFFFFFF
;
}
// Reenable interrupts
__asm
volatile
(
"cpsie i"
);
// equivalent to CMSIS '__enable_irq()' function
#endif // ifndef DONT_RESET_ON_RESTART
// *************************************************************
#if defined (__USE_LPCOPEN)
SystemInit
();
#endif
//
// Copy the data sections from flash to SRAM.
//
unsigned
int
LoadAddr
,
ExeAddr
,
SectionLen
;
unsigned
int
*
SectionTableAddr
;
// Load base address of Global Section Table
SectionTableAddr
=
&
__data_section_table
;
// Copy the data sections from flash to SRAM.
while
(
SectionTableAddr
<
&
__data_section_table_end
)
{
LoadAddr
=
*
SectionTableAddr
++
;
ExeAddr
=
*
SectionTableAddr
++
;
SectionLen
=
*
SectionTableAddr
++
;
data_init
(
LoadAddr
,
ExeAddr
,
SectionLen
);
}
// At this point, SectionTableAddr = &__bss_section_table;
// Zero fill the bss segment
while
(
SectionTableAddr
<
&
__bss_section_table_end
)
{
ExeAddr
=
*
SectionTableAddr
++
;
SectionLen
=
*
SectionTableAddr
++
;
bss_init
(
ExeAddr
,
SectionLen
);
}
#if !defined (__USE_LPCOPEN)
// LPCOpen init code deals with FP and VTOR initialisation
#if defined (__VFP_FP__) && !defined (__SOFTFP__)
/*
* Code to enable the Cortex-M4 FPU only included
* if appropriate build options have been selected.
* Code taken from Section 7.1, Cortex-M4 TRM (DDI0439C)
*/
// CPACR is located at address 0xE000ED88
asm
(
"LDR.W R0, =0xE000ED88"
);
// Read CPACR
asm
(
"LDR R1, [R0]"
);
// Set bits 20-23 to enable CP10 and CP11 coprocessors
asm
(
" ORR R1, R1, #(0xF << 20)"
);
// Write back the modified value to the CPACR
asm
(
"STR R1, [R0]"
);
#endif // (__VFP_FP__) && !(__SOFTFP__)
// ******************************
// Check to see if we are running the code from a non-zero
// address (eg RAM, external flash), in which case we need
// to modify the VTOR register to tell the CPU that the
// vector table is located at a non-0x0 address.
// Note that we do not use the CMSIS register access mechanism,
// as there is no guarantee that the project has been configured
// to use CMSIS.
unsigned
int
*
pSCB_VTOR
=
(
unsigned
int
*
)
0xE000ED08
;
if
((
unsigned
int
*
)
g_pfnVectors
!=
(
unsigned
int
*
)
0x00000000
)
{
// CMSIS : SCB->VTOR = <address of vector table>
*
pSCB_VTOR
=
(
unsigned
int
)
g_pfnVectors
;
}
#endif
#if defined (__USE_CMSIS)
SystemInit
();
#endif
#if defined (__cplusplus)
//
// Call C++ library initialisation
//
__libc_init_array
();
#endif
#if defined (__REDLIB__)
// Call the Redlib library, which in turn calls main()
__main
();
#else
main
();
#endif
//
// main() shouldn't return, but if it does, we'll just enter an infinite loop
//
while
(
1
)
{
;
}
}
//*****************************************************************************
// Default exception handlers. Override the ones here by defining your own
// handler routines in your application code.
//*****************************************************************************
__attribute__
((
section
(
".after_vectors"
)))
void
NMI_Handler
(
void
)
{
while
(
1
)
{
}
}
__attribute__
((
section
(
".after_vectors"
)))
void
HardFault_Handler
(
void
)
{
while
(
1
)
{
}
}
__attribute__
((
section
(
".after_vectors"
)))
void
MemManage_Handler
(
void
)
{
while
(
1
)
{
}
}
__attribute__
((
section
(
".after_vectors"
)))
void
BusFault_Handler
(
void
)
{
while
(
1
)
{
}
}
__attribute__
((
section
(
".after_vectors"
)))
void
UsageFault_Handler
(
void
)
{
while
(
1
)
{
}
}
__attribute__
((
section
(
".after_vectors"
)))
void
SVC_Handler
(
void
)
{
while
(
1
)
{
}
}
__attribute__
((
section
(
".after_vectors"
)))
void
DebugMon_Handler
(
void
)
{
while
(
1
)
{
}
}
__attribute__
((
section
(
".after_vectors"
)))
void
PendSV_Handler
(
void
)
{
while
(
1
)
{
}
}
__attribute__
((
section
(
".after_vectors"
)))
void
SysTick_Handler
(
void
)
{
while
(
1
)
{
}
}
//*****************************************************************************
//
// Processor ends up here if an unexpected interrupt occurs or a specific
// handler is not present in the application code.
//
//*****************************************************************************
__attribute__
((
section
(
".after_vectors"
)))
void
IntDefaultHandler
(
void
)
{
while
(
1
)
{
}
}
bsp/xplorer4330/Libraries/Device/NXP/LPC43xx/Source/Templates/GCC/cr_startup_lpc43xx_m0sub.c
已删除
100644 → 0
浏览文件 @
7b32a2bd
//*****************************************************************************
// LPC43xx (Cortex M0 SUB) Startup code for use with LPCXpresso IDE
//
// Version : 131115
//*****************************************************************************
//
// Copyright(C) NXP Semiconductors, 2013
// All rights reserved.
//
// Software that is described herein is for illustrative purposes only
// which provides customers with programming information regarding the
// LPC products. This software is supplied "AS IS" without any warranties of
// any kind, and NXP Semiconductors and its licensor disclaim any and
// all warranties, express or implied, including all implied warranties of
// merchantability, fitness for a particular purpose and non-infringement of
// intellectual property rights. NXP Semiconductors assumes no responsibility
// or liability for the use of the software, conveys no license or rights under any
// patent, copyright, mask work right, or any other intellectual property rights in
// or to any products. NXP Semiconductors reserves the right to make changes
// in the software without notification. NXP Semiconductors also makes no
// representation or warranty that such application will be suitable for the
// specified use without further testing or modification.
//
// Permission to use, copy, modify, and distribute this software and its
// documentation is hereby granted, under NXP Semiconductors' and its
// licensor's relevant copyrights in the software, without fee, provided that it
// is used in conjunction with NXP Semiconductors microcontrollers. This
// copyright, permission, and disclaimer notice must appear in all copies of
// this code.
//*****************************************************************************
#if defined (__cplusplus)
#ifdef __REDLIB__
#error Redlib does not support C++
#else
//*****************************************************************************
//
// The entry point for the C++ library startup
//
//*****************************************************************************
extern
"C"
{
extern
void
__libc_init_array
(
void
);
}
#endif
#endif
#define WEAK __attribute__ ((weak))
#define ALIAS(f) __attribute__ ((weak, alias (#f)))
#if defined (__USE_CMSIS) || defined (__USE_LPCOPEN)
void
SystemInit
(
void
);
#endif
//*****************************************************************************
#if defined (__cplusplus)
extern
"C"
{
#endif
//*****************************************************************************
//
// Forward declaration of the default handlers. These are aliased.
// When the application defines a handler (with the same name), this will
// automatically take precedence over these weak definitions
//
//*****************************************************************************
void
ResetISR
(
void
);
#if defined (__USE_LPCOPEN)
WEAK
void
NMI_Handler
(
void
);
WEAK
void
HardFault_Handler
(
void
);
WEAK
void
SVC_Handler
(
void
);
WEAK
void
PendSV_Handler
(
void
);
WEAK
void
SysTick_Handler
(
void
);
WEAK
void
IntDefaultHandler
(
void
);
#else
WEAK
void
M0S_NMI_Handler
(
void
);
WEAK
void
M0S_HardFault_Handler
(
void
);
WEAK
void
M0S_DebugMon_Handler
(
void
);
WEAK
void
M0S_SVC_Handler
(
void
);
WEAK
void
M0S_PendSV_Handler
(
void
);
WEAK
void
M0S_SysTick_Handler
(
void
);
WEAK
void
M0S_IntDefaultHandler
(
void
);
#endif
//*****************************************************************************
//
// Forward declaration of the specific IRQ handlers. These are aliased
// to the IntDefaultHandler, which is a 'forever' loop. When the application
// defines a handler (with the same name), this will automatically take
// precedence over these weak definitions
//
//*****************************************************************************
#if defined (__USE_LPCOPEN)
void
DAC_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
M4_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
DMA_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
SGPIO_INPUT_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
SGPIO_MATCH_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
SGPIO_SHIFT_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
SGPIO_POS_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
USB0_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
USB1_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
SCT_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
RIT_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
GINT1_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
TIMER1_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
TIMER2_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
GPIO5_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
ADC0_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
MCPWM_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
I2C0_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
I2C1_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
SPI_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
ADC1_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
SSP0_SSP1_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
EVRT_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
UART0_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
UART1_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
UART2_CAN1_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
UART3_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
I2S0_I2S1_QEI_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
CAN0_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
SPIFI_ADCHS_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
void
M0APP_IRQHandler
(
void
)
ALIAS
(
IntDefaultHandler
);
#else
void
M0S_DAC_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_M4CORE_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_DMA_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_SGPIO_INPUT_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_SGPIO_MATCH_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_SGPIO_SHIFT_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_SGPIO_POS_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_USB0_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_USB1_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_SCT_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_RITIMER_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_GINT1_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_TIMER1_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_TIMER2_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_PIN_INT5_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_ADC0_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_MCPWM_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_I2C0_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_I2C1_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_SPI_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_ADC1_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_SSP0_OR_SSP1_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_EVENTROUTER_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_USART0_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_UART1_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_USART2_OR_C_CAN1_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_USART3_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_I2C0_OR_I2C1_OR_I2S1_OR_QEI_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_C_CAN0_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_SPIFI_OR_VADC_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
void
M0S_M0APP_IRQHandler
(
void
)
ALIAS
(
M0S_IntDefaultHandler
);
#endif
//*****************************************************************************
//
// The entry point for the application.
// __main() is the entry point for Redlib based applications
// main() is the entry point for Newlib based applications
//
//*****************************************************************************
#if defined (__REDLIB__)
extern
void
__main
(
void
);
#endif
extern
int
main
(
void
);
//*****************************************************************************
//
// External declaration for the pointer to the stack top from the Linker Script
//
//*****************************************************************************
extern
void
_vStackTop
(
void
);
//*****************************************************************************
#if defined (__cplusplus)
}
// extern "C"
#endif
//*****************************************************************************
//
// The vector table.
// This relies on the linker script to place at correct location in memory.
//
//*****************************************************************************
extern
void
(
*
const
g_pfnVectors
[])(
void
);
__attribute__
((
section
(
".isr_vector"
)))
void
(
*
const
g_pfnVectors
[])(
void
)
=
{
#if defined (__USE_LPCOPEN)
// Core Level - CM0
&
_vStackTop
,
// The initial stack pointer
ResetISR
,
// 1 The reset handler
NMI_Handler
,
// The NMI handler
HardFault_Handler
,
// The hard fault handler
0
,
// 4 Reserved
0
,
// 5 Reserved
0
,
// 6 Reserved
0
,
// 7 Reserved
0
,
// 8 Reserved
0
,
// 9 Reserved
0
,
// 10 Reserved
SVC_Handler
,
// SVCall handler
0
,
// Reserved
0
,
// Reserved
PendSV_Handler
,
// The PendSV handler
SysTick_Handler
,
// The SysTick handler
// Chip Level - 43xx M0SUB core
DAC_IRQHandler
,
// 16
M4_IRQHandler
,
// 17 Interrupt from M4 Core
DMA_IRQHandler
,
// 18 General Purpose DMA
0
,
// 19 Reserved
SGPIO_INPUT_IRQHandler
,
// 20
SGPIO_MATCH_IRQHandler
,
// 21
SGPIO_SHIFT_IRQHandler
,
// 22
SGPIO_POS_IRQHandler
,
// 23
USB0_IRQHandler
,
// 24 USB0
USB1_IRQHandler
,
// 25 USB1
SCT_IRQHandler
,
// 26 State Configurable Timer
RIT_IRQHandler
,
// 27 Repetitive Interrupt Timer
GINT1_IRQHandler
,
// 28 GINT1
TIMER1_IRQHandler
,
// 29 Timer1
TIMER2_IRQHandler
,
// 30 Timer2
GPIO5_IRQHandler
,
// 31
MCPWM_IRQHandler
,
// 32 Motor Control PWM
ADC0_IRQHandler
,
// 33 ADC0
I2C0_IRQHandler
,
// 34
I2C1_IRQHandler
,
// 35
SPI_IRQHandler
,
// 36
ADC1_IRQHandler
,
// 37
SSP0_SSP1_IRQHandler
,
// 38
EVRT_IRQHandler
,
// 39 Event Router
UART0_IRQHandler
,
// 41 USART0
UART1_IRQHandler
,
// 41 UART1
UART2_CAN1_IRQHandler
,
// 42 USART2 or C CAN1
UART3_IRQHandler
,
// 43 USART3
I2S0_I2S1_QEI_IRQHandler
,
// 35 I2C0 or I2C1 or I2S1 or QEI
CAN0_IRQHandler
,
// 45 C CAN0
SPIFI_ADCHS_IRQHandler
,
// 46
M0APP_IRQHandler
,
// 47 Interrupt from M0APP
};
#else
// Core Level - CM0
&
_vStackTop
,
// The initial stack pointer
ResetISR
,
// 1 The reset handler
M0S_NMI_Handler
,
// 2 The NMI handler
M0S_HardFault_Handler
,
// 3 The hard fault handler
0
,
// 4 Reserved
0
,
// 5 Reserved
0
,
// 6 Reserved
0
,
// 7 Reserved
0
,
// 8 Reserved
0
,
// 9 Reserved
0
,
// 10 Reserved
M0S_SVC_Handler
,
// 11 SVCall handler
M0S_DebugMon_Handler
,
// 12 Debug monitor handler
0
,
// 13 Reserved
M0S_PendSV_Handler
,
// 14 The PendSV handler
M0S_SysTick_Handler
,
// 15 The SysTick handler
// Chip Level - LPC43 (CM0 SUB)
M0S_DAC_IRQHandler
,
// 16
M0S_M4CORE_IRQHandler
,
// 17 Interrupt from M4 Core
M0S_DMA_IRQHandler
,
// 18 General Purpose DMA
0
,
// 19 Reserved
M0S_SGPIO_INPUT_IRQHandler
,
// 20
M0S_SGPIO_MATCH_IRQHandler
,
// 21
M0S_SGPIO_SHIFT_IRQHandler
,
// 22
M0S_SGPIO_POS_IRQHandler
,
// 23
M0S_USB0_IRQHandler
,
// 24 USB0
M0S_USB1_IRQHandler
,
// 25 USB1
M0S_SCT_IRQHandler
,
// 26 State Configurable Timer
M0S_RITIMER_IRQHandler
,
// 27 Repetitive Interrupt Timer
M0S_GINT1_IRQHandler
,
// 28 GINT1
M0S_TIMER1_IRQHandler
,
// 29 Timer1
M0S_TIMER2_IRQHandler
,
// 30 Timer2
M0S_PIN_INT5_IRQHandler
,
// 31
M0S_MCPWM_IRQHandler
,
// 32 Motor Control PWM
M0S_ADC0_IRQHandler
,
// 33 ADC0
M0S_I2C0_IRQHandler
,
// 34
M0S_I2C1_IRQHandler
,
// 35
M0S_SPI_IRQHandler
,
// 36
M0S_ADC1_IRQHandler
,
// 37
M0S_SSP0_OR_SSP1_IRQHandler
,
// 38
M0S_EVENTROUTER_IRQHandler
,
// 39 Event Router
M0S_USART0_IRQHandler
,
// 41 USART0
M0S_UART1_IRQHandler
,
// 41 UART1
M0S_USART2_OR_C_CAN1_IRQHandler
,
// 42 USART2 or C CAN1
M0S_USART3_IRQHandler
,
// 43 USART3
M0S_I2C0_OR_I2C1_OR_I2S1_OR_QEI_IRQHandler
,
// 35 I2C0 or I2C1 or I2S1 or QEI
M0S_C_CAN0_IRQHandler
,
// 45 C CAN0
M0S_SPIFI_OR_VADC_IRQHandler
,
// 46
M0S_M0APP_IRQHandler
,
// 47 Interrupt from M0APP
}
;
#endif
//*****************************************************************************
// Functions to carry out the initialization of RW and BSS data sections. These
// are written as separate functions rather than being inlined within the
// ResetISR() function in order to cope with MCUs with multiple banks of
// memory.
//*****************************************************************************
__attribute__
((
section
(
".after_vectors"
)))
void
data_init
(
unsigned
int
romstart
,
unsigned
int
start
,
unsigned
int
len
)
{
unsigned
int
*
pulDest
=
(
unsigned
int
*
)
start
;
unsigned
int
*
pulSrc
=
(
unsigned
int
*
)
romstart
;
unsigned
int
loop
;
for
(
loop
=
0
;
loop
<
len
;
loop
=
loop
+
4
)
*
pulDest
++
=
*
pulSrc
++
;
}
__attribute__
((
section
(
".after_vectors"
)))
void
bss_init
(
unsigned
int
start
,
unsigned
int
len
)
{
unsigned
int
*
pulDest
=
(
unsigned
int
*
)
start
;
unsigned
int
loop
;
for
(
loop
=
0
;
loop
<
len
;
loop
=
loop
+
4
)
*
pulDest
++
=
0
;
}
//*****************************************************************************
// The following symbols are constructs generated by the linker, indicating
// the location of various points in the "Global Section Table". This table is
// created by the linker via the Code Red managed linker script mechanism. It
// contains the load address, execution address and length of each RW data
// section and the execution and length of each BSS (zero initialized) section.
//*****************************************************************************
extern
unsigned
int
__data_section_table
;
extern
unsigned
int
__data_section_table_end
;
extern
unsigned
int
__bss_section_table
;
extern
unsigned
int
__bss_section_table_end
;
//*****************************************************************************
// Reset entry point for your code.
// Sets up a simple runtime environment and initializes the C/C++
// library.
//
//*****************************************************************************
void
ResetISR
(
void
)
{
// ******************************
// Modify CREG->M0SUBMEMMAP so that M0 looks in correct place
// for its vector table when an exception is triggered.
// Note that we do not use the CMSIS register access mechanism,
// as there is no guarantee that the project has been configured
// to use CMSIS.
unsigned
int
*
pCREG_M0SUBMEMMAP
=
(
unsigned
int
*
)
0x40043308
;
// CMSIS : CREG->M0SUBMEMMAP = <address of vector table>
*
pCREG_M0SUBMEMMAP
=
(
unsigned
int
)
g_pfnVectors
;
//
// Copy the data sections from flash to SRAM.
//
unsigned
int
LoadAddr
,
ExeAddr
,
SectionLen
;
unsigned
int
*
SectionTableAddr
;
// Load base address of Global Section Table
SectionTableAddr
=
&
__data_section_table
;
// Copy the data sections from flash to SRAM.
while
(
SectionTableAddr
<
&
__data_section_table_end
)
{
LoadAddr
=
*
SectionTableAddr
++
;
ExeAddr
=
*
SectionTableAddr
++
;
SectionLen
=
*
SectionTableAddr
++
;
data_init
(
LoadAddr
,
ExeAddr
,
SectionLen
);
}
// At this point, SectionTableAddr = &__bss_section_table;
// Zero fill the bss segment
while
(
SectionTableAddr
<
&
__bss_section_table_end
)
{
ExeAddr
=
*
SectionTableAddr
++
;
SectionLen
=
*
SectionTableAddr
++
;
bss_init
(
ExeAddr
,
SectionLen
);
}
// **********************************************************
// No need to call SystemInit() here, as master CM4 cpu will
// have done the main system set up before enabling CM0.
// **********************************************************
#if defined (__cplusplus)
//
// Call C++ library initialisation
//
__libc_init_array
();
#endif
#if defined (__REDLIB__)
// Call the Redlib library, which in turn calls main()
__main
()
;
#else
main
();
#endif
//
// main() shouldn't return, but if it does, we'll just enter an infinite loop
//
while
(
1
)
{
;
}
}
//*****************************************************************************
// Default exception handlers. Override the ones here by defining your own
// handler routines in your application code.
//*****************************************************************************
__attribute__
((
section
(
".after_vectors"
)))
#if defined (__USE_LPCOPEN)
void
NMI_Handler
(
void
)
#else
void
M0S_NMI_Handler
(
void
)
#endif
{
while
(
1
)
{
}
}
__attribute__
((
section
(
".after_vectors"
)))
#if defined (__USE_LPCOPEN)
void
HardFault_Handler
(
void
)
#else
void
M0S_HardFault_Handler
(
void
)
#endif
{
while
(
1
)
{
}
}
__attribute__
((
section
(
".after_vectors"
)))
#if defined (__USE_LPCOPEN)
void
SVC_Handler
(
void
)
#else
void
M0S_SVC_Handler
(
void
)
#endif
{
while
(
1
)
{
}
}
__attribute__
((
section
(
".after_vectors"
)))
#if defined (__USE_LPCOPEN)
void
PendSV_Handler
(
void
)
#else
void
M0S_PendSV_Handler
(
void
)
#endif
{
while
(
1
)
{
}
}
__attribute__
((
section
(
".after_vectors"
)))
#if defined (__USE_LPCOPEN)
void
SysTick_Handler
(
void
)
#else
void
M0S_SysTick_Handler
(
void
)
#endif
{
while
(
1
)
{
}
}
//*****************************************************************************
//
// Processor ends up here if an unexpected interrupt occurs or a specific
// handler is not present in the application code.
//
//*****************************************************************************
__attribute__
((
section
(
".after_vectors"
)))
#if defined (__USE_LPCOPEN)
void
IntDefaultHandler
(
void
)
#else
void
M0S_IntDefaultHandler
(
void
)
#endif
{
while
(
1
)
{
}
}
bsp/xplorer4330/Libraries/Device/NXP/LPC43xx/Source/Templates/GCC/startup_LPC43xx.s
0 → 100644
浏览文件 @
000daf03
/*****************************************************************************/
/*
startup_LPC43xx
.
s
:
Startup
file
for
LPC43xx
device
series
*/
/*****************************************************************************/
/*
Version
:
CodeSourcery
Sourcery
G
++
Lite
(
with
CS3
)
*/
/*****************************************************************************/
.
syntax
unified
.
cpu
cortex
-
m3
.
fpu
softvfp
.
thumb
.
word
_sidata
.
word
_sdata
.
word
_edata
.
word
_sbss
.
word
_ebss
.
equ
Sign_Value
,
0x5A5A5A5A
/*
Vector
Table
*/
.
section
".interrupt_vector"
.
globl
__interrupt_vector
.
type
__interrupt_vector
,
%
function
__interrupt_vector
:
.
long
_estack
/*
Top
of
Stack
*/
.
long
Reset_Handler
/*
Reset
Handler
*/
.
long
NMI_Handler
/*
NMI
Handler
*/
.
long
HardFault_Handler
/*
Hard
Fault
Handler
*/
.
long
MemManage_Handler
/*
MPU
Fault
Handler
*/
.
long
BusFault_Handler
/*
Bus
Fault
Handler
*/
.
long
UsageFault_Handler
/*
Usage
Fault
Handler
*/
.
long
Sign_Value
/*
Reserved
*/
.
long
0
/*
Reserved
*/
.
long
0
/*
Reserved
*/
.
long
0
/*
Reserved
*/
.
long
SVC_Handler
/*
SVCall
Handler
*/
.
long
DebugMon_Handler
/*
Debug
Monitor
Handler
*/
.
long
0
/*
Reserved
*/
.
long
PendSV_Handler
/*
PendSV
Handler
*/
.
long
SysTick_Handler
/*
SysTick
Handler
*/
/*
External
Interrupts
*/
.
long
DAC_IRQHandler
/*
16
D
/
A
Converter
*/
.
long
M0CORE_IRQHandler
/*
17
M0
Core
*/
.
long
DMA_IRQHandler
/*
18
General
Purpose
DMA
*/
.
long
EZH_IRQHandler
/*
19
EZH
/
EDM
*/
.
long
FLASH_EEPROM_IRQHandler
/*
20
Reserved
for
Typhoon
*/
.
long
ETH_IRQHandler
/*
21
Ethernet
*/
.
long
SDIO_IRQHandler
/*
22
SD
/
MMC
*/
.
long
LCD_IRQHandler
/*
23
LCD
*/
.
long
USB0_IRQHandler
/*
24
USB0
*/
.
long
USB1_IRQHandler
/*
25
USB1
*/
.
long
SCT_IRQHandler
/*
26
State
Configurable
Timer
*/
.
long
RIT_IRQHandler
/*
27
Repetitive
Interrupt
Timer
*/
.
long
TIMER0_IRQHandler
/*
28
Timer0
*/
.
long
TIMER1_IRQHandler
/*
29
Timer1
*/
.
long
TIMER2_IRQHandler
/*
30
Timer2
*/
.
long
TIMER3_IRQHandler
/*
31
Timer3
*/
.
long
MCPWM_IRQHandler
/*
32
Motor
Control
PWM
*/
.
long
ADC0_IRQHandler
/*
33
A
/
D
Converter
0
*/
.
long
I2C0_IRQHandler
/*
34
I2C0
*/
.
long
I2C1_IRQHandler
/*
35
I2C1
*/
.
long
SPI_IRQHandler
/*
36
SPI
*/
.
long
ADC1_IRQHandler
/*
37
A
/
D
Converter
1
*/
.
long
SSP0_IRQHandler
/*
38
SSP0
*/
.
long
SSP1_IRQHandler
/*
39
SSP1
*/
.
long
UART0_IRQHandler
/*
40
UART0
*/
.
long
UART1_IRQHandler
/*
41
UART1
*/
.
long
UART2_IRQHandler
/*
42
UART2
*/
.
long
UART3_IRQHandler
/*
43
UART3
*/
.
long
I2S0_IRQHandler
/*
44
I2S0
*/
.
long
I2S1_IRQHandler
/*
45
I2S1
*/
.
long
SPIFI_IRQHandler
/*
46
SPI
Flash
Interface
*/
.
long
SGPIO_IRQHandler
/*
47
SGPIO
*/
.
long
GPIO0_IRQHandler
/*
48
GPIO0
*/
.
long
GPIO1_IRQHandler
/*
49
GPIO1
*/
.
long
GPIO2_IRQHandler
/*
50
GPIO2
*/
.
long
GPIO3_IRQHandler
/*
51
GPIO3
*/
.
long
GPIO4_IRQHandler
/*
52
GPIO4
*/
.
long
GPIO5_IRQHandler
/*
53
GPIO5
*/
.
long
GPIO6_IRQHandler
/*
54
GPIO6
*/
.
long
GPIO7_IRQHandler
/*
55
GPIO7
*/
.
long
GINT0_IRQHandler
/*
56
GINT0
*/
.
long
GINT1_IRQHandler
/*
57
GINT1
*/
.
long
EVRT_IRQHandler
/*
58
Event
Router
*/
.
long
CAN1_IRQHandler
/*
59
C_CAN1
*/
.
long
0
/*
60
Reserved
*/
.
long
VADC_IRQHandler
/*
61
VADC
*/
.
long
ATIMER_IRQHandler
/*
62
ATIMER
*/
.
long
RTC_IRQHandler
/*
63
RTC
*/
.
long
0
/*
64
Reserved
*/
.
long
WDT_IRQHandler
/*
65
WDT
*/
.
long
M0s_IRQHandler
/*
66
M0s
*/
.
long
CAN0_IRQHandler
/*
67
C_CAN0
*/
.
long
QEI_IRQHandler
/*
68
QEI
*/
.
size
__interrupt_vector
,
.
-
__interrupt_vector
.
thumb
/*
Reset
Handler
*/
.
section
.
text
.
Reset_Handler
.
weak
Reset_Handler
.
type
Reset_Handler
,
%
function
Reset_Handler
:
.
fnstart
.
ifdef
RAM_MODE
/*
Clear
.
bss
section
(
Zero
init
)
*/
mov
R0
,
#
0
ldr
R1
,
=
__bss_start__
ldr
R2
,
=
__bss_end__
cmp
R1
,
R2
beq
BSSIsEmpty
LoopZI
:
cmp
R1
,
R2
bhs
BSSIsEmpty
str
R0
,
[
R1
]
add
R1
,
#
4
blo
LoopZI
BSSIsEmpty
:
ldr
R0
,
=
SystemInit
blx
R0
ldr
R0
,=
main
bx
R0
.
else
ldr
R0
,
=
SystemInit
blx
R0
ldr
R0
,=
main
bx
R0
.
endif
.
pool
.
cantunwind
.
fnend
.
size
Reset_Handler
,
.
-
Reset_Handler
.
section
".text"
/*
Exception
Handlers
*/
.
weak
NMI_Handler
.
type
NMI_Handler
,
%
function
NMI_Handler
:
B
.
.
size
NMI_Handler
,
.
-
NMI_Handler
.
weak
HardFault_Handler
.
type
HardFault_Handler
,
%
function
HardFault_Handler
:
B
.
.
size
HardFault_Handler
,
.
-
HardFault_Handler
.
weak
MemManage_Handler
.
type
MemManage_Handler
,
%
function
MemManage_Handler
:
B
.
.
size
MemManage_Handler
,
.
-
MemManage_Handler
.
weak
BusFault_Handler
.
type
BusFault_Handler
,
%
function
BusFault_Handler
:
B
.
.
size
BusFault_Handler
,
.
-
BusFault_Handler
.
weak
UsageFault_Handler
.
type
UsageFault_Handler
,
%
function
UsageFault_Handler
:
B
.
.
size
UsageFault_Handler
,
.
-
UsageFault_Handler
.
weak
SVC_Handler
.
type
SVC_Handler
,
%
function
SVC_Handler
:
B
.
.
size
SVC_Handler
,
.
-
SVC_Handler
.
weak
DebugMon_Handler
.
type
DebugMon_Handler
,
%
function
DebugMon_Handler
:
B
.
.
size
DebugMon_Handler
,
.
-
DebugMon_Handler
.
weak
PendSV_Handler
.
type
PendSV_Handler
,
%
function
PendSV_Handler
:
B
.
.
size
PendSV_Handler
,
.
-
PendSV_Handler
.
weak
SysTick_Handler
.
type
SysTick_Handler
,
%
function
SysTick_Handler
:
B
.
.
size
SysTick_Handler
,
.
-
SysTick_Handler
/*
IRQ
Handlers
*/
.
globl
Default_Handler
.
type
Default_Handler
,
%
function
Default_Handler
:
B
.
.
size
Default_Handler
,
.
-
Default_Handler
.
macro
IRQ
handler
.
weak
\
handler
.
set
\
handler
,
Default_Handler
.
endm
IRQ
DAC_IRQHandler
IRQ
M0CORE_IRQHandler
IRQ
DMA_IRQHandler
IRQ
EZH_IRQHandler
IRQ
FLASH_EEPROM_IRQHandler
IRQ
ETH_IRQHandler
IRQ
SDIO_IRQHandler
IRQ
LCD_IRQHandler
IRQ
USB0_IRQHandler
IRQ
USB1_IRQHandler
IRQ
SCT_IRQHandler
IRQ
RIT_IRQHandler
IRQ
TIMER0_IRQHandler
IRQ
TIMER1_IRQHandler
IRQ
TIMER2_IRQHandler
IRQ
TIMER3_IRQHandler
IRQ
MCPWM_IRQHandler
IRQ
ADC0_IRQHandler
IRQ
I2C0_IRQHandler
IRQ
I2C1_IRQHandler
IRQ
SPI_IRQHandler
IRQ
ADC1_IRQHandler
IRQ
SSP0_IRQHandler
IRQ
SSP1_IRQHandler
IRQ
UART0_IRQHandler
IRQ
UART1_IRQHandler
IRQ
UART2_IRQHandler
IRQ
UART3_IRQHandler
IRQ
I2S0_IRQHandler
IRQ
I2S1_IRQHandler
IRQ
SPIFI_IRQHandler
IRQ
SGPIO_IRQHandler
IRQ
GPIO0_IRQHandler
IRQ
GPIO1_IRQHandler
IRQ
GPIO2_IRQHandler
IRQ
GPIO3_IRQHandler
IRQ
GPIO4_IRQHandler
IRQ
GPIO5_IRQHandler
IRQ
GPIO6_IRQHandler
IRQ
GPIO7_IRQHandler
IRQ
GINT0_IRQHandler
IRQ
GINT1_IRQHandler
IRQ
EVRT_IRQHandler
IRQ
CAN1_IRQHandler
IRQ
VADC_IRQHandler
IRQ
ATIMER_IRQHandler
IRQ
RTC_IRQHandler
IRQ
WDT_IRQHandler
IRQ
M0s_IRQHandler
IRQ
CAN0_IRQHandler
IRQ
QEI_IRQHandler
.
end
bsp/xplorer4330/Libraries/Device/NXP/LPC43xx/Source/Templates/GCC/startup_LPC43xx_M0.s
0 → 100644
浏览文件 @
000daf03
/*****************************************************************************/
/*
startup_LPC43xx
.
s
:
Startup
file
for
LPC43xx
device
series
*/
/*****************************************************************************/
/*
Version
:
CodeSourcery
Sourcery
G
++
Lite
(
with
CS3
)
*/
/*****************************************************************************/
.
syntax
unified
.
cpu
cortex
-
m0
.
fpu
softvfp
.
thumb
.
word
_sidata
.
word
_sdata
.
word
_edata
.
word
_sbss
.
word
_ebss
.
equ
Sign_Value
,
0x5A5A5A5A
/*
Vector
Table
*/
.
section
".interrupt_vector"
.
globl
__interrupt_vector
.
type
__interrupt_vector
,
%
function
__interrupt_vector
:
.
long
_estack
/*
Top
of
Stack
*/
.
long
Reset_Handler
/*
Reset
Handler
*/
.
long
NMI_Handler
/*
NMI
Handler
*/
.
long
HardFault_Handler
/*
Hard
Fault
Handler
*/
.
long
MemManage_Handler
/*
MPU
Fault
Handler
*/
.
long
BusFault_Handler
/*
Bus
Fault
Handler
*/
.
long
UsageFault_Handler
/*
Usage
Fault
Handler
*/
.
long
Sign_Value
/*
Reserved
*/
.
long
0
/*
Reserved
*/
.
long
0
/*
Reserved
*/
.
long
0
/*
Reserved
*/
.
long
SVC_Handler
/*
SVCall
Handler
*/
.
long
DebugMon_Handler
/*
Debug
Monitor
Handler
*/
.
long
0
/*
Reserved
*/
.
long
PendSV_Handler
/*
PendSV
Handler
*/
.
long
SysTick_Handler
/*
SysTick
Handler
*/
/*
External
Interrupts
*/
.
long
DAC_IRQHandler
/*
16
D
/
A
Converter
*/
.
long
M4CORE_IRQHandler
/*
17
M0
Core
*/
.
long
DMA_IRQHandler
/*
18
General
Purpose
DMA
*/
.
long
EZH_IRQHandler
/*
19
EZH
/
EDM
*/
.
long
FLASH_EEPROM_IRQHandler
/*
20
Reserved
for
Typhoon
*/
.
long
ETH_IRQHandler
/*
21
Ethernet
*/
.
long
SDIO_IRQHandler
/*
22
SD
/
MMC
*/
.
long
LCD_IRQHandler
/*
23
LCD
*/
.
long
USB0_IRQHandler
/*
24
USB0
*/
.
long
USB1_IRQHandler
/*
25
USB1
*/
.
long
SCT_IRQHandler
/*
26
State
Configurable
Timer
*/
.
long
RIT_IRQHandler
/*
27
Repetitive
Interrupt
Timer
*/
.
long
TIMER0_IRQHandler
/*
28
Timer0
*/
.
long
TIMER1_IRQHandler
/*
29
Timer1
*/
.
long
TIMER2_IRQHandler
/*
30
Timer2
*/
.
long
TIMER3_IRQHandler
/*
31
Timer3
*/
.
long
MCPWM_IRQHandler
/*
32
Motor
Control
PWM
*/
.
long
ADC0_IRQHandler
/*
33
A
/
D
Converter
0
*/
.
long
I2C0_IRQHandler
/*
34
I2C0
*/
.
long
I2C1_IRQHandler
/*
35
I2C1
*/
.
long
SPI_IRQHandler
/*
36
SPI
*/
.
long
ADC1_IRQHandler
/*
37
A
/
D
Converter
1
*/
.
long
SSP0_IRQHandler
/*
38
SSP0
*/
.
long
SSP1_IRQHandler
/*
39
SSP1
*/
.
long
UART0_IRQHandler
/*
40
UART0
*/
.
long
UART1_IRQHandler
/*
41
UART1
*/
.
long
UART2_IRQHandler
/*
42
UART2
*/
.
long
UART3_IRQHandler
/*
43
UART3
*/
.
long
I2S0_IRQHandler
/*
44
I2S0
*/
.
long
I2S1_IRQHandler
/*
45
I2S1
*/
.
long
SPIFI_IRQHandler
/*
46
SPI
Flash
Interface
*/
.
long
SGPIO_IRQHandler
/*
47
SGPIO
*/
.
long
GPIO0_IRQHandler
/*
48
GPIO0
*/
.
long
GPIO1_IRQHandler
/*
49
GPIO1
*/
.
long
GPIO2_IRQHandler
/*
50
GPIO2
*/
.
long
GPIO3_IRQHandler
/*
51
GPIO3
*/
.
long
GPIO4_IRQHandler
/*
52
GPIO4
*/
.
long
GPIO5_IRQHandler
/*
53
GPIO5
*/
.
long
GPIO6_IRQHandler
/*
54
GPIO6
*/
.
long
GPIO7_IRQHandler
/*
55
GPIO7
*/
.
long
GINT0_IRQHandler
/*
56
GINT0
*/
.
long
GINT1_IRQHandler
/*
57
GINT1
*/
.
long
EVRT_IRQHandler
/*
58
Event
Router
*/
.
long
CAN1_IRQHandler
/*
59
C_CAN1
*/
.
long
0
/*
60
Reserved
*/
.
long
VADC_IRQHandler
/*
61
VADC
*/
.
long
ATIMER_IRQHandler
/*
62
ATIMER
*/
.
long
RTC_IRQHandler
/*
63
RTC
*/
.
long
0
/*
64
Reserved
*/
.
long
WDT_IRQHandler
/*
65
WDT
*/
.
long
M0s_IRQHandler
/*
66
M0s
*/
.
long
CAN0_IRQHandler
/*
67
C_CAN0
*/
.
long
QEI_IRQHandler
/*
68
QEI
*/
.
size
__interrupt_vector
,
.
-
__interrupt_vector
.
thumb
/*
Reset
Handler
*/
.
section
.
text
.
Reset_Handler
.
weak
Reset_Handler
.
type
Reset_Handler
,
%
function
Reset_Handler
:
.
fnstart
.
ifdef
RAM_MODE
/*
Clear
.
bss
section
(
Zero
init
)
*/
mov
R0
,
#
0
ldr
R1
,
=
__bss_start__
ldr
R2
,
=
__bss_end__
cmp
R1
,
R2
beq
BSSIsEmpty
LoopZI
:
cmp
R1
,
R2
bhs
BSSIsEmpty
str
R0
,
[
R1
]
add
R1
,
#
4
blo
LoopZI
BSSIsEmpty
:
ldr
R0
,
=
SystemInit
blx
R0
ldr
R0
,=
main
bx
R0
.
else
ldr
R0
,
=
SystemInit
blx
R0
ldr
R0
,=
main
bx
R0
.
endif
.
pool
.
cantunwind
.
fnend
.
size
Reset_Handler
,
.
-
Reset_Handler
.
section
".text"
/*
Exception
Handlers
*/
.
weak
NMI_Handler
.
type
NMI_Handler
,
%
function
NMI_Handler
:
B
.
.
size
NMI_Handler
,
.
-
NMI_Handler
.
weak
HardFault_Handler
.
type
HardFault_Handler
,
%
function
HardFault_Handler
:
B
.
.
size
HardFault_Handler
,
.
-
HardFault_Handler
.
weak
MemManage_Handler
.
type
MemManage_Handler
,
%
function
MemManage_Handler
:
B
.
.
size
MemManage_Handler
,
.
-
MemManage_Handler
.
weak
BusFault_Handler
.
type
BusFault_Handler
,
%
function
BusFault_Handler
:
B
.
.
size
BusFault_Handler
,
.
-
BusFault_Handler
.
weak
UsageFault_Handler
.
type
UsageFault_Handler
,
%
function
UsageFault_Handler
:
B
.
.
size
UsageFault_Handler
,
.
-
UsageFault_Handler
.
weak
SVC_Handler
.
type
SVC_Handler
,
%
function
SVC_Handler
:
B
.
.
size
SVC_Handler
,
.
-
SVC_Handler
.
weak
DebugMon_Handler
.
type
DebugMon_Handler
,
%
function
DebugMon_Handler
:
B
.
.
size
DebugMon_Handler
,
.
-
DebugMon_Handler
.
weak
PendSV_Handler
.
type
PendSV_Handler
,
%
function
PendSV_Handler
:
B
.
.
size
PendSV_Handler
,
.
-
PendSV_Handler
.
weak
SysTick_Handler
.
type
SysTick_Handler
,
%
function
SysTick_Handler
:
B
.
.
size
SysTick_Handler
,
.
-
SysTick_Handler
/*
IRQ
Handlers
*/
.
globl
Default_Handler
.
type
Default_Handler
,
%
function
Default_Handler
:
B
.
.
size
Default_Handler
,
.
-
Default_Handler
.
macro
IRQ
handler
.
weak
\
handler
.
set
\
handler
,
Default_Handler
.
endm
IRQ
DAC_IRQHandler
IRQ
M0CORE_IRQHandler
IRQ
DMA_IRQHandler
IRQ
EZH_IRQHandler
IRQ
FLASH_EEPROM_IRQHandler
IRQ
ETH_IRQHandler
IRQ
SDIO_IRQHandler
IRQ
LCD_IRQHandler
IRQ
USB0_IRQHandler
IRQ
USB1_IRQHandler
IRQ
SCT_IRQHandler
IRQ
RIT_IRQHandler
IRQ
TIMER0_IRQHandler
IRQ
TIMER1_IRQHandler
IRQ
TIMER2_IRQHandler
IRQ
TIMER3_IRQHandler
IRQ
MCPWM_IRQHandler
IRQ
ADC0_IRQHandler
IRQ
I2C0_IRQHandler
IRQ
I2C1_IRQHandler
IRQ
SPI_IRQHandler
IRQ
ADC1_IRQHandler
IRQ
SSP0_IRQHandler
IRQ
SSP1_IRQHandler
IRQ
UART0_IRQHandler
IRQ
UART1_IRQHandler
IRQ
UART2_IRQHandler
IRQ
UART3_IRQHandler
IRQ
I2S0_IRQHandler
IRQ
I2S1_IRQHandler
IRQ
SPIFI_IRQHandler
IRQ
SGPIO_IRQHandler
IRQ
GPIO0_IRQHandler
IRQ
GPIO1_IRQHandler
IRQ
GPIO2_IRQHandler
IRQ
GPIO3_IRQHandler
IRQ
GPIO4_IRQHandler
IRQ
GPIO5_IRQHandler
IRQ
GPIO6_IRQHandler
IRQ
GPIO7_IRQHandler
IRQ
GINT0_IRQHandler
IRQ
GINT1_IRQHandler
IRQ
EVRT_IRQHandler
IRQ
CAN1_IRQHandler
IRQ
VADC_IRQHandler
IRQ
ATIMER_IRQHandler
IRQ
RTC_IRQHandler
IRQ
WDT_IRQHandler
IRQ
M0s_IRQHandler
IRQ
CAN0_IRQHandler
IRQ
QEI_IRQHandler
.
end
bsp/xplorer4330/Libraries/Device/NXP/LPC43xx/Source/Templates/IAR/startup_LPC43xx_M0.s
0 → 100644
浏览文件 @
000daf03
/**************************************************
*
*
Part
one
of
the
system
initialization
code
,
contains
low
-
level
*
initialization
,
plain
thumb
variant
.
*
*
Copyright
2011
IAR
Systems
.
All
rights
reserved
.
*
*
$Revision
:
47876
$
*
**************************************************/
;
; The modules in this file are included in the libraries, and may be replaced
; by any user-defined modules that define the PUBLIC symbol _program_start or
; a user defined start symbol.
; To override the cstartup defined in the library, simply add your modified
; version to the workbench project.
;
; The vector table is normally located at address 0.
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
; The name "__vector_table" has special meaning for C-SPY:
; it is where the SP start value is found, and the NVIC vector
; table register (VTOR) is initialized to this address if != 0.
;
; Cortex-M version
;
MODULE
?
cstartup
;; Forward declaration of sections.
SECTION
CSTACK
:
DATA
:
NOROOT
(
3
)
SECTION
.
intvec
:
CODE
:
NOROOT
(
2
)
EXTERN
__iar_program_start
EXTERN
SystemInit
PUBLIC
__vector_table
PUBLIC
__vector_table_0x1c
PUBLIC
__Vectors
PUBLIC
__Vectors_End
PUBLIC
__Vectors_Size
DATA
__vector_table
DCD
sfe
(
CSTACK
)
DCD
Reset_Handler
DCD
NMI_Handler
DCD
HardFault_Handler
DCD
MemManage_Handler
DCD
BusFault_Handler
DCD
UsageFault_Handler
__vector_table_0x1c
DCD
0
DCD
0
DCD
0
DCD
0
DCD
SVC_Handler
DCD
DebugMon_Handler
DCD
0
DCD
PendSV_Handler
DCD
SysTick_Handler
; External Interrupts
DCD
DAC_IRQHandler
DCD
M4_IRQHandler
DCD
DMA_IRQHandler
DCD
0
DCD
SGPIO_INPUT_IRQHandler
DCD
SGPIO_MATCH_IRQHandler
DCD
SGPIO_SHIFT_IRQHandler
DCD
SGPIO_POS_IRQHandler
DCD
USB0_IRQHandler
DCD
USB1_IRQHandler
DCD
SCT_IRQHandler
DCD
RIT_IRQHandler
DCD
GINT1_IRQHandler
DCD
TIMER1_IRQHandler
DCD
TIMER2_IRQHandler
DCD
GPIO5_IRQHandler
DCD
MCPWM_IRQHandler
DCD
ADC0_IRQHandler
DCD
I2C0_IRQHandler
DCD
I2C1_IRQHandler
DCD
SPI_IRQHandler
DCD
ADC1_IRQHandler
DCD
SSP0_SSP1_IRQHandler
DCD
EVRT_IRQHandler
DCD
UART0_IRQHandler
DCD
UART1_IRQHandler
DCD
UART2_CAN1_IRQHandler
DCD
UART3_IRQHandler
DCD
I2S0_I2S1_QEI_IRQHandler
DCD
CAN0_IRQHandler
DCD
SPIFI_ADCHS_IRQHandler
DCD
M0APP_IRQHandler
__Vectors_End
__Vectors
EQU
__vector_table
__Vectors_Size
EQU
__Vectors_End
-
__Vectors
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Default interrupt handlers.
;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
THUMB
PUBWEAK
Reset_Handler
SECTION
.
text
:
CODE
:
REORDER
(
2
)
Reset_Handler
LDR
R0
,
=
SystemInit
BLX
R0
LDR
R0
,
=
__iar_program_start
BX
R0
PUBWEAK
NMI_Handler
PUBWEAK
HardFault_Handler
PUBWEAK
MemManage_Handler
PUBWEAK
BusFault_Handler
PUBWEAK
UsageFault_Handler
PUBWEAK
SVC_Handler
PUBWEAK
DebugMon_Handler
PUBWEAK
PendSV_Handler
PUBWEAK
SysTick_Handler
PUBWEAK
DAC_IRQHandler
PUBWEAK
M4_IRQHandler
PUBWEAK
DMA_IRQHandler
PUBWEAK
UnHandled_Vector
PUBWEAK
SGPIO_INPUT_IRQHandler
PUBWEAK
SGPIO_MATCH_IRQHandler
PUBWEAK
SGPIO_SHIFT_IRQHandler
PUBWEAK
SGPIO_POS_IRQHandler
PUBWEAK
USB0_IRQHandler
PUBWEAK
USB1_IRQHandler
PUBWEAK
SCT_IRQHandler
PUBWEAK
RIT_IRQHandler
PUBWEAK
GINT1_IRQHandler
PUBWEAK
TIMER1_IRQHandler
PUBWEAK
TIMER2_IRQHandler
PUBWEAK
GPIO5_IRQHandler
PUBWEAK
MCPWM_IRQHandler
PUBWEAK
ADC0_IRQHandler
PUBWEAK
I2C0_IRQHandler
PUBWEAK
I2C1_IRQHandler
PUBWEAK
SPI_IRQHandler
PUBWEAK
ADC1_IRQHandler
PUBWEAK
SSP0_SSP1_IRQHandler
PUBWEAK
EVRT_IRQHandler
PUBWEAK
UART0_IRQHandler
PUBWEAK
UART1_IRQHandler
PUBWEAK
UART2_CAN1_IRQHandler
PUBWEAK
UART3_IRQHandler
PUBWEAK
I2S0_I2S1_QEI_IRQHandler
PUBWEAK
CAN0_IRQHandler
PUBWEAK
SPIFI_ADCHS_IRQHandler
PUBWEAK
M0APP_IRQHandler
SECTION
.
text
:
CODE
:
REORDER
(
1
)
NMI_Handler
B
.
SVC_Handler
B
.
DebugMon_Handler
B
.
PendSV_Handler
B
.
SysTick_Handler
B
.
HardFault_Handler
B
.
MemManage_Handler
B
.
BusFault_Handler
B
.
UsageFault_Handler
DAC_IRQHandler
M4_IRQHandler
DMA_IRQHandler
UnHandled_Vector
SGPIO_INPUT_IRQHandler
SGPIO_MATCH_IRQHandler
SGPIO_SHIFT_IRQHandler
SGPIO_POS_IRQHandler
USB0_IRQHandler
USB1_IRQHandler
SCT_IRQHandler
RIT_IRQHandler
GINT1_IRQHandler
TIMER1_IRQHandler
TIMER2_IRQHandler
GPIO5_IRQHandler
MCPWM_IRQHandler
ADC0_IRQHandler
I2C0_IRQHandler
I2C1_IRQHandler
SPI_IRQHandler
ADC1_IRQHandler
SSP0_SSP1_IRQHandler
EVRT_IRQHandler
UART0_IRQHandler
UART1_IRQHandler
UART2_CAN1_IRQHandler
UART3_IRQHandler
I2S0_I2S1_QEI_IRQHandler
CAN0_IRQHandler
SPIFI_ADCHS_IRQHandler
M0APP_IRQHandler
Default_IRQHandler
B
.
/*
CRP
Section
-
not
needed
for
flashless
devices
*/
;;; SECTION .crp:CODE:ROOT(2)
;;; DATA
/*
Code
Read
Protection
NO_ISP
0
x4E697370
-
Prevents
sampling
of
pin
PIO0_1
for
entering
ISP
mode
CRP1
0
x12345678
-
Write
to
RAM
command
cannot
access
RAM
below
0x10000300
.
-
Copy
RAM
to
flash
command
can
not
write
to
Sector
0
.
-
Erase
command
can
erase
Sector
0
only
when
all
sectors
are
selected
for
erase
.
-
Compare
command
is
disabled
.
-
Read
Memory
command
is
disabled
.
CRP2
0
x87654321
-
Read
Memory
is
disabled
.
-
Write
to
RAM
is
disabled
.
-
"Go"
command
is
disabled
.
-
Copy
RAM
to
flash
is
disabled
.
-
Compare
is
disabled
.
CRP3
0
x43218765
-
Access
to
chip
via
the
SWD
pins
is
disabled
.
ISP
entry
by
pulling
PIO0_1
LOW
is
disabled
if
a
valid
user
code
is
present
in
flash
sector
0
.
Caution
:
If
CRP3
is
selected
,
no
future
factory
testing
can
be
performed
on
the
device
.
*/
;;; DCD 0xFFFFFFFF
;;;
END
bsp/xplorer4330/Libraries/Device/NXP/LPC43xx/Source/Templates/system_LPC43xx.c
浏览文件 @
000daf03
...
...
@@ -863,7 +863,6 @@ void SystemCoreClockUpdate (void) {
}
extern
uint32_t
getPC
(
void
);
/*----------------------------------------------------------------------------
Initialize the system
...
...
@@ -877,10 +876,7 @@ void SystemInit (void) {
/* Disable SysTick timer */
SysTick
->
CTRL
&=
~
(
SysTick_CTRL_TICKINT_Msk
|
SysTick_CTRL_ENABLE_Msk
);
#ifdef CORE_M4
/* Set vector table pointer */
SCB
->
VTOR
=
getPC
()
&
0xFFF00000
;
#endif
/* Configure PLL0 and PLL1, connect CPU clock to selected clock source */
SetClock
();
...
...
bsp/xplorer4330/Libraries/Device/SConscript
浏览文件 @
000daf03
...
...
@@ -8,19 +8,19 @@ src = Split('''
NXP/LPC43xx/Source/Templates/system_LPC43xx.c
'''
)
CPPPATH
=
[
cwd
+
'/NXP/LPC43xx/Include'
,
cwd
+
'/../CMSIS/Include'
]
CPPDEFINES
=
[
rtconfig
.
USE_CORE
+
' USE_SPIFI'
]
CPPDEFINES
=
[
rtconfig
.
USE_CORE
]
CPPDEFINES
+=
[
'USE_SPIFI'
]
# add for startup script
if
rtconfig
.
USE_CORE
==
'CORE_M4'
:
if
rtconfig
.
CROSS_TOOL
==
'gcc'
:
src
+=
[
'NXP/LPC43xx/Source/Templates/GCC/
cr_startup_lpc43xx.c
'
]
src
+=
[
'NXP/LPC43xx/Source/Templates/GCC/
startup_LPC43xx.s
'
]
elif
rtconfig
.
CROSS_TOOL
==
'keil'
:
src
+=
[
'NXP/LPC43xx/Source/Templates/ARM/startup_LPC43xx.s'
]
elif
rtconfig
.
CROSS_TOOL
==
'iar'
:
src
+=
[
'NXP/LPC43xx/Source/Templates/IAR/startup_LPC43xx.s'
]
else
:
if
rtconfig
.
CROSS_TOOL
==
'gcc'
:
src
+=
[
'NXP/LPC43xx/Source/Templates/GCC/
cr_startup_lpc43xx_m0sub.c
'
]
src
+=
[
'NXP/LPC43xx/Source/Templates/GCC/
startup_LPC43xx_M0.s
'
]
elif
rtconfig
.
CROSS_TOOL
==
'keil'
:
src
+=
[
'NXP/LPC43xx/Source/Templates/ARM/startup_LPC43xx_M0.s'
]
elif
rtconfig
.
CROSS_TOOL
==
'iar'
:
...
...
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