Fixed sample rate not set correctly under slave I2S mode. (Tested this time. ^_^)

Added locking mechanism to periperials on SPI1.
Added DMA mode read/write routine to SPI Flash. (Debug reuiqred. WARNING: !!! ENABLING DMA MODE MAY DESTROY YOUR DATA IN THE SPI FLASH !!!)

git-svn-id: https://rt-thread.googlecode.com/svn/trunk@538 bbd45198-f89e-11dd-88c7-29a3b14d5316

bsp/stm32_radio/board.c

@@ -18,6 +18,8 @@
 #include "stm32f10x.h"
 #include "board.h"
 
+struct rt_semaphore spi1_lock;
+
 /**
  * @addtogroup STM32
  */
@@ -87,7 +89,7 @@ static void all_device_reset(void)
                            | RCC_APB2Periph_GPIOF | RCC_APB2Periph_GPIOG,ENABLE);
 
     GPIO_InitStructure.GPIO_Mode  = GPIO_Mode_Out_PP;
-    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
+    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
 
     /* SDIO POWER */
     GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
@@ -279,6 +281,11 @@ void rt_hw_board_init()
         /* Enable SPI_MASTER */
         SPI_Cmd(SPI1, ENABLE);
         SPI_CalculateCRC(SPI1, DISABLE);
+
+    	if (rt_sem_init(&spi1_lock, "spi1lock", 1, RT_IPC_FLAG_FIFO) != RT_EOK)
+    	{
+    		rt_kprintf("init spi1 lock semaphore failed\n");
+    	}
     }
 
 }/* rt_hw_board_init */

bsp/stm32_radio/board.h

@@ -69,6 +69,8 @@ void rt_hw_board_init(void);
 void rt_hw_usart_init(void);
 void rt_hw_sdcard_init(void);
 
+extern struct rt_semaphore spi1_lock;
+
 #endif
 
 // <<< Use Configuration Wizard in Context Menu >>>

bsp/stm32_radio/spi_flash.c

 #include <stm32f10x.h>
+#include "board.h"
 #include "spi_flash.h"
 #include "rtthread.h"
 
-extern unsigned char SPI_WriteByte(unsigned char data);
+/*
+ * WARNING: !!! ENABLING DMA MODE MAY DESTROY YOUR DATA IN THE SPI FLASH !!!
+ * Don't set SPI_FLASH_USE_DMA to 1 unless you know what you're doing!
+ * However, readonly access is just fine. :)
+ */
+#define SPI_FLASH_USE_DMA	0
+#define SECTOR_SIZE			512
+
+extern uint8_t SPI_WriteByte(unsigned char data);
+
+#if SPI_FLASH_USE_DMA
+static uint8_t dummy = 0;
+static uint8_t _spi_flash_buffer[SECTOR_SIZE];
+#endif
 
 /********************** hardware *************************************/
 /* SPI_FLASH_CS   PA4 */
@@ -18,19 +32,102 @@ static void GPIO_Configuration(void)
 {
     GPIO_InitTypeDef GPIO_InitStructure;
 
-    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA,ENABLE);
+    RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
 
     GPIO_InitStructure.GPIO_Pin   = GPIO_Pin_4 | GPIO_Pin_3;
     GPIO_InitStructure.GPIO_Mode  = GPIO_Mode_Out_PP;
-    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
-    GPIO_Init(GPIOA,&GPIO_InitStructure);
+    GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
+    GPIO_Init(GPIOA, &GPIO_InitStructure);
 
     FLASH_RST_0(); // RESET
     FLASH_CS_1();
     FLASH_RST_1();
 }
 
-static unsigned char SPI_HostReadByte(void)
+#if SPI_FLASH_USE_DMA
+static void DMA_RxConfiguration(rt_uint32_t addr, rt_size_t size)
+{
+    DMA_InitTypeDef DMA_InitStructure;
+
+    DMA_ClearFlag(DMA1_FLAG_TC2 | DMA1_FLAG_TE2 | DMA1_FLAG_TC3 | DMA1_FLAG_TE3);
+    dummy = 0;
+
+	/* DMA Channel configuration ----------------------------------------------*/
+	DMA_Cmd(DMA1_Channel2, DISABLE);
+	DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&(SPI1->DR));
+	DMA_InitStructure.DMA_MemoryBaseAddr = (u32) addr;
+	DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
+	DMA_InitStructure.DMA_BufferSize = size;
+	DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
+	DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
+	DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
+	DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
+	DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
+	DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
+	DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
+	DMA_Init(DMA1_Channel2, &DMA_InitStructure);
+
+	DMA_Cmd(DMA1_Channel2, ENABLE);
+
+	/* Dummy TX channel configuration */
+	DMA_Cmd(DMA1_Channel3, DISABLE);
+	DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&(SPI1->DR));
+	DMA_InitStructure.DMA_MemoryBaseAddr = (u32)(&dummy);
+	DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
+	DMA_InitStructure.DMA_BufferSize = size;
+	DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
+	DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Disable;
+	DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
+	DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
+	DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
+	DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
+	DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
+	DMA_Init(DMA1_Channel3, &DMA_InitStructure);
+
+	DMA_Cmd(DMA1_Channel3, ENABLE);
+}
+
+static void DMA_TxConfiguration(rt_uint32_t addr, rt_size_t size)
+{
+    DMA_InitTypeDef DMA_InitStructure;
+
+    DMA_ClearFlag(DMA1_FLAG_TC2 | DMA1_FLAG_TE2 | DMA1_FLAG_TC3 | DMA1_FLAG_TE3);
+
+	/* DMA Channel configuration ----------------------------------------------*/
+	DMA_Cmd(DMA1_Channel2, DISABLE);
+	DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&(SPI1->DR));
+	DMA_InitStructure.DMA_MemoryBaseAddr = (u32)(&dummy);
+	DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
+	DMA_InitStructure.DMA_BufferSize = size;
+	DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
+	DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Disable;
+	DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
+	DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
+	DMA_InitStructure.DMA_Priority = DMA_Priority_VeryHigh;
+	DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
+	DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
+	DMA_Init(DMA1_Channel2, &DMA_InitStructure);
+
+    /* DMA Channel configuration ----------------------------------------------*/
+	DMA_Cmd(DMA1_Channel3, DISABLE);
+	DMA_InitStructure.DMA_PeripheralBaseAddr = (u32)(&(SPI1->DR));
+	DMA_InitStructure.DMA_MemoryBaseAddr = (u32) addr;
+	DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
+	DMA_InitStructure.DMA_BufferSize = size;
+	DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
+	DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
+	DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
+	DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
+	DMA_InitStructure.DMA_Priority = DMA_Priority_Medium;
+	DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
+	DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
+	DMA_Init(DMA1_Channel3, &DMA_InitStructure);
+
+	DMA_Cmd(DMA1_Channel3, ENABLE);
+}
+#endif
+
+static uint8_t SPI_HostReadByte(void)
 {
     //return SPI_WriteByte(0x00);
     //Wait until the transmit buffer is empty
@@ -47,7 +144,7 @@ static unsigned char SPI_HostReadByte(void)
 
 }
 
-static void SPI_HostWriteByte(unsigned char wByte)
+static void SPI_HostWriteByte(uint8_t wByte)
 {
     SPI_WriteByte(wByte);
 }
@@ -63,13 +160,13 @@ static void SPI_HostWriteByte(unsigned char wByte)
 /* 1:ready  |        |        AT45DB161:1011             |                   */
 /* --------------------------------------------------------------------------*/
 /*****************************************************************************/
-static unsigned char AT45DB_StatusRegisterRead(void)
+static uint8_t AT45DB_StatusRegisterRead(void)
 {
-    unsigned char i;
+    uint8_t i;
 
     FLASH_CS_0();
     SPI_HostWriteByte(AT45DB_READ_STATE_REGISTER);
-    i=SPI_HostReadByte();
+    i = SPI_HostReadByte();
     FLASH_CS_1();
 
     return i;
@@ -77,74 +174,122 @@ static unsigned char AT45DB_StatusRegisterRead(void)
 
 static void wait_busy(void)
 {
-    unsigned int    i=0;
-    while (i++<3000)
+    uint16_t i = 0;
+    while (i++ < 10000)
     {
-        if (AT45DB_StatusRegisterRead()&0x80)
+        if (AT45DB_StatusRegisterRead() & 0x80)
         {
-            break;
+            return;
         }
     }
-    if( !(i<3000) )
-    {
-        rt_kprintf("\r\nSPI_FLASH timeout!!!");
-    }
+    rt_kprintf("\r\nSPI_FLASH timeout!!!\r\n");
 }
 
-static void read_page(unsigned int page,unsigned char * pHeader)
+static void read_page(uint32_t page, uint8_t *pHeader)
 {
-    unsigned int i=0;
+#if SPI_FLASH_USE_DMA
+    rt_sem_take(&spi1_lock, RT_WAITING_FOREVER);
 
-    wait_busy();
+	DMA_RxConfiguration((rt_uint32_t) pHeader, SECTOR_SIZE);
 
     FLASH_CS_0();
-    SPI_HostWriteByte(AT45DB_MM_PAGE_TO_B1_XFER);
-    SPI_HostWriteByte((unsigned char)(page >> 6));
-    SPI_HostWriteByte((unsigned char)(page << 2));
+
+    SPI_HostWriteByte(AT45DB_MM_PAGE_READ);
+    SPI_HostWriteByte((uint8_t)(page >> 6));
+    SPI_HostWriteByte((uint8_t)(page << 2));
     SPI_HostWriteByte(0x00);
-    FLASH_CS_1();
 
-    wait_busy();
+    // 4 don't care bytes
+    SPI_HostWriteByte(0x00);
+    SPI_HostWriteByte(0x00);
+    SPI_HostWriteByte(0x00);
+    SPI_HostWriteByte(0x00);
+
+	SPI_I2S_ClearFlag(SPI1, SPI_I2S_FLAG_RXNE);
+	SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Tx | SPI_I2S_DMAReq_Rx, ENABLE);
+	while (DMA_GetFlagStatus(DMA1_FLAG_TC2) == RESET);
+
+	FLASH_CS_1();
+
+	SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Tx | SPI_I2S_DMAReq_Rx, DISABLE);
+
+	rt_sem_release(&spi1_lock);
+#else
+    uint16_t i;
+
+    rt_sem_take(&spi1_lock, RT_WAITING_FOREVER);
 
     FLASH_CS_0();
-    SPI_HostWriteByte(AT45DB_BUFFER_1_READ);
+
+    SPI_HostWriteByte(AT45DB_MM_PAGE_READ);
+    SPI_HostWriteByte((uint8_t)(page >> 6));
+    SPI_HostWriteByte((uint8_t)(page << 2));
     SPI_HostWriteByte(0x00);
+
+    // 4 don't care bytes
     SPI_HostWriteByte(0x00);
     SPI_HostWriteByte(0x00);
     SPI_HostWriteByte(0x00);
-    for (i=0; i<512; i++)
-    {
-        *pHeader++ = SPI_HostReadByte();
-    }
-    FLASH_CS_1();
+    SPI_HostWriteByte(0x00);
+
+	for (i = 0; i < SECTOR_SIZE; i++)
+	{
+		*pHeader++ = SPI_HostReadByte();
+	}
+
+	FLASH_CS_1();
 
+    rt_sem_release(&spi1_lock);
+#endif
 }
 
-static void write_page(unsigned int page,unsigned char * pHeader)
+static void write_page(uint32_t page, uint8_t *pHeader)
 {
-    unsigned int i;
+#if SPI_FLASH_USE_DMA
+    rt_sem_take(&spi1_lock, RT_WAITING_FOREVER);
+
+    DMA_TxConfiguration((rt_uint32_t) pHeader, SECTOR_SIZE);
+
+    FLASH_CS_0();
+
+    SPI_HostWriteByte(AT45DB_MM_PAGE_PROG_THRU_BUFFER1);
+    SPI_HostWriteByte((uint8_t) (page >> 6));
+    SPI_HostWriteByte((uint8_t) (page << 2));
+    SPI_HostWriteByte(0x00);
+
+	SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Tx, ENABLE);
+	while (DMA_GetFlagStatus(DMA1_FLAG_TC3) == RESET);
+
+	FLASH_CS_1();
+
+    SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Tx, DISABLE);
 
     wait_busy();
 
+    rt_sem_release(&spi1_lock);
+#else
+    uint16_t i;
+
+    rt_sem_take(&spi1_lock, RT_WAITING_FOREVER);
+
     FLASH_CS_0();
-    SPI_HostWriteByte(AT45DB_BUFFER_2_WRITE);
-    SPI_HostWriteByte(0);
-    SPI_HostWriteByte(0);
-    SPI_HostWriteByte(0);
-    for(i=0; i<512; i++)
+
+    SPI_HostWriteByte(AT45DB_MM_PAGE_PROG_THRU_BUFFER1);
+    SPI_HostWriteByte((uint8_t) (page >> 6));
+    SPI_HostWriteByte((uint8_t) (page << 2));
+    SPI_HostWriteByte(0x00);
+
+    for (i = 0; i < SECTOR_SIZE; i++)
     {
         SPI_HostWriteByte(*pHeader++);
     }
+
     FLASH_CS_1();
 
     wait_busy();
 
-    FLASH_CS_0();
-    SPI_HostWriteByte(AT45DB_B2_TO_MM_PAGE_PROG_WITH_ERASE);
-    SPI_HostWriteByte((unsigned char)(page>>6));
-    SPI_HostWriteByte((unsigned char)(page<<2));
-    SPI_HostWriteByte(0x00);
-    FLASH_CS_1();
+    rt_sem_release(&spi1_lock);
+#endif
 }
 
 
@@ -176,42 +321,53 @@ static rt_err_t rt_spi_flash_control(rt_device_t dev, rt_uint8_t cmd, void *args
 
 static rt_size_t rt_spi_flash_read(rt_device_t dev, rt_off_t pos, void* buffer, rt_size_t size)
 {
-    rt_uint8_t *ptr;
     rt_uint32_t index, nr;
 
-    nr = size/512;
-    ptr = (rt_uint8_t*)buffer;
+    nr = size / SECTOR_SIZE;
 
-    for (index = 0; index < nr; index ++)
+    for (index = 0; index < nr; index++)
     {
         /* only supply single block read: block size 512Byte */
-        read_page((pos + index * 512)/512, &ptr[index * 512]);
+#if SPI_FLASH_USE_DMA
+        read_page((pos / SECTOR_SIZE + index), _spi_flash_buffer);
+    	rt_memcpy(((rt_uint8_t *) buffer + index * SECTOR_SIZE), _spi_flash_buffer, SECTOR_SIZE);
+#else
+        read_page((pos / SECTOR_SIZE + index), ((rt_uint8_t *) buffer + index * SECTOR_SIZE));
+#endif
     }
 
-    return nr * 512;
+    return nr * SECTOR_SIZE;
 }
 
-static rt_size_t rt_spi_flash_write (rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
+static rt_size_t rt_spi_flash_write(rt_device_t dev, rt_off_t pos, const void* buffer, rt_size_t size)
 {
-    rt_uint8_t *ptr;
     rt_uint32_t index, nr;
 
-    nr = size / 512;
-    ptr = (rt_uint8_t*)buffer;
+    nr = size / SECTOR_SIZE;
 
-    for (index = 0; index < nr; index ++)
+    for (index = 0; index < nr; index++)
     {
         /* only supply single block write: block size 512Byte */
-        write_page((pos + index * 512)/512, &ptr[index * 512]);
+#if SPI_FLASH_USE_DMA
+    	rt_memcpy(_spi_flash_buffer, ((rt_uint8_t *) buffer + index * SECTOR_SIZE), SECTOR_SIZE);
+        write_page((pos / SECTOR_SIZE + index), _spi_flash_buffer);
+#else
+        write_page((pos / SECTOR_SIZE + index), ((rt_uint8_t *) buffer + index * SECTOR_SIZE));
+#endif
     }
 
-    return nr * 512;
+    return nr * SECTOR_SIZE;
 }
 
 void rt_hw_spi_flash_init(void)
 {
     GPIO_Configuration();
 
+#if SPI_FLASH_USE_DMA
+    /* Enable the DMA1 Clock */
+    RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
+#endif
+
     /* register spi_flash device */
     spi_flash_device.type    = RT_Device_Class_Block;
     spi_flash_device.init    = rt_spi_flash_init;

bsp/stm32_radio/spi_flash.h

@@ -18,7 +18,8 @@ thanks to gxlujd.
 #define AT45DB_PAGE_ERASE                     0x81	/* 页删除（每页512/528字节） */
 #define AT45DB_SECTOR_ERASE                   0x7C	/* 扇区擦除（每扇区128K字节）*/
 #define AT45DB_READ_STATE_REGISTER            0xD7	/* 读取状态寄存器 */
-
+#define AT45DB_MM_PAGE_READ                   0xD2	/* 读取主储存器的指定页 */
+#define AT45DB_MM_PAGE_PROG_THRU_BUFFER1      0x82  /* 通过缓冲区写入主储存器 */
 
 extern void rt_hw_spi_flash_init(void);