[smart][risc-v/libcpu] port rv64 cpu code (#6704)

* [risc-v/libcpu] porting Smart & RTOS
* [fix] rv64 plic
* [risc-v/rv64] remove macro in rtdef

bsp/qemu-virt64-riscv/.config

@@ -445,7 +445,6 @@ CONFIG_UTEST_THR_PRIORITY=20
 # CONFIG_PKG_USING_SMALL_MODBUS is not set
 # CONFIG_PKG_USING_NET_SERVER is not set
 # CONFIG_PKG_USING_ZFTP is not set
-# CONFIG_PKG_USING_WOL is not set
 
 #
 # security packages
@@ -536,6 +535,7 @@ CONFIG_UTEST_THR_PRIORITY=20
 # CONFIG_PKG_USING_SEGGER_RTT is not set
 # CONFIG_PKG_USING_RDB is not set
 # CONFIG_PKG_USING_ULOG_EASYFLASH is not set
+# CONFIG_PKG_USING_ULOG_FILE is not set
 # CONFIG_PKG_USING_LOGMGR is not set
 # CONFIG_PKG_USING_ADBD is not set
 # CONFIG_PKG_USING_COREMARK is not set
@@ -569,6 +569,7 @@ CONFIG_UTEST_THR_PRIORITY=20
 # CONFIG_PKG_USING_CBOX is not set
 # CONFIG_PKG_USING_SNOWFLAKE is not set
 # CONFIG_PKG_USING_HASH_MATCH is not set
+# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
 # CONFIG_PKG_USING_ARMV7M_DWT_TOOL is not set
 # CONFIG_PKG_USING_VOFA_PLUS is not set
 
@@ -645,83 +646,11 @@ CONFIG_UTEST_THR_PRIORITY=20
 #
 # peripheral libraries and drivers
 #
-
-#
-# sensors drivers
-#
-# CONFIG_PKG_USING_FINGERPRINT is not set
-# CONFIG_PKG_USING_LSM6DSM is not set
-# CONFIG_PKG_USING_LSM6DSL is not set
-# CONFIG_PKG_USING_LPS22HB is not set
-# CONFIG_PKG_USING_HTS221 is not set
-# CONFIG_PKG_USING_LSM303AGR is not set
-# CONFIG_PKG_USING_BME280 is not set
-# CONFIG_PKG_USING_BME680 is not set
-# CONFIG_PKG_USING_BMA400 is not set
-# CONFIG_PKG_USING_BMI160_BMX160 is not set
-# CONFIG_PKG_USING_SPL0601 is not set
-# CONFIG_PKG_USING_MS5805 is not set
-# CONFIG_PKG_USING_DA270 is not set
-# CONFIG_PKG_USING_DF220 is not set
-# CONFIG_PKG_USING_HSHCAL001 is not set
-# CONFIG_PKG_USING_BH1750 is not set
-# CONFIG_PKG_USING_MPU6XXX is not set
-# CONFIG_PKG_USING_AHT10 is not set
-# CONFIG_PKG_USING_AP3216C is not set
-# CONFIG_PKG_USING_TSL4531 is not set
-# CONFIG_PKG_USING_DS18B20 is not set
-# CONFIG_PKG_USING_DHT11 is not set
-# CONFIG_PKG_USING_DHTXX is not set
-# CONFIG_PKG_USING_GY271 is not set
-# CONFIG_PKG_USING_GP2Y10 is not set
-# CONFIG_PKG_USING_SGP30 is not set
-# CONFIG_PKG_USING_HDC1000 is not set
-# CONFIG_PKG_USING_BMP180 is not set
-# CONFIG_PKG_USING_BMP280 is not set
-# CONFIG_PKG_USING_SHTC1 is not set
-# CONFIG_PKG_USING_BMI088 is not set
-# CONFIG_PKG_USING_HMC5883 is not set
-# CONFIG_PKG_USING_MAX6675 is not set
-# CONFIG_PKG_USING_TMP1075 is not set
-# CONFIG_PKG_USING_SR04 is not set
-# CONFIG_PKG_USING_CCS811 is not set
-# CONFIG_PKG_USING_PMSXX is not set
-# CONFIG_PKG_USING_RT3020 is not set
-# CONFIG_PKG_USING_MLX90632 is not set
-# CONFIG_PKG_USING_MLX90393 is not set
-# CONFIG_PKG_USING_MLX90392 is not set
-# CONFIG_PKG_USING_MLX90397 is not set
-# CONFIG_PKG_USING_MS5611 is not set
-# CONFIG_PKG_USING_MAX31865 is not set
-# CONFIG_PKG_USING_VL53L0X is not set
-# CONFIG_PKG_USING_INA260 is not set
-# CONFIG_PKG_USING_MAX30102 is not set
-# CONFIG_PKG_USING_INA226 is not set
-# CONFIG_PKG_USING_LIS2DH12 is not set
-# CONFIG_PKG_USING_HS300X is not set
-# CONFIG_PKG_USING_ZMOD4410 is not set
-# CONFIG_PKG_USING_ISL29035 is not set
-# CONFIG_PKG_USING_MMC3680KJ is not set
-# CONFIG_PKG_USING_QMP6989 is not set
-# CONFIG_PKG_USING_BALANCE is not set
+# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
+# CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_SHT2X is not set
 # CONFIG_PKG_USING_SHT3X is not set
-# CONFIG_PKG_USING_AD7746 is not set
 # CONFIG_PKG_USING_ADT74XX is not set
-# CONFIG_PKG_USING_MAX17048 is not set
-
-#
-# touch drivers
-#
-# CONFIG_PKG_USING_GT9147 is not set
-# CONFIG_PKG_USING_GT1151 is not set
-# CONFIG_PKG_USING_GT917S is not set
-# CONFIG_PKG_USING_GT911 is not set
-# CONFIG_PKG_USING_FT6206 is not set
-# CONFIG_PKG_USING_FT5426 is not set
-# CONFIG_PKG_USING_FT6236 is not set
-# CONFIG_PKG_USING_XPT2046_TOUCH is not set
-# CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_AS7341 is not set
 # CONFIG_PKG_USING_STM32_SDIO is not set
 # CONFIG_PKG_USING_ESP_IDF is not set
@@ -748,9 +677,12 @@ CONFIG_UTEST_THR_PRIORITY=20
 # CONFIG_PKG_USING_AGILE_LED is not set
 # CONFIG_PKG_USING_AT24CXX is not set
 # CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
+# CONFIG_PKG_USING_AD7746 is not set
 # CONFIG_PKG_USING_PCA9685 is not set
 # CONFIG_PKG_USING_I2C_TOOLS is not set
 # CONFIG_PKG_USING_NRF24L01 is not set
+# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
+# CONFIG_PKG_USING_MAX17048 is not set
 # CONFIG_PKG_USING_RPLIDAR is not set
 # CONFIG_PKG_USING_AS608 is not set
 # CONFIG_PKG_USING_RC522 is not set
@@ -801,7 +733,6 @@ CONFIG_UTEST_THR_PRIORITY=20
 # CONFIG_PKG_USING_RFM300 is not set
 # CONFIG_PKG_USING_IO_INPUT_FILTER is not set
 # CONFIG_PKG_USING_RASPBERRYPI_PICO_SDK is not set
-# CONFIG_PKG_USING_LRF_NV7LIDAR is not set
 
 #
 # AI packages
@@ -816,12 +747,6 @@ CONFIG_UTEST_THR_PRIORITY=20
 # CONFIG_PKG_USING_QUEST is not set
 # CONFIG_PKG_USING_NAXOS is not set
 
-#
-# Signal Processing and Control Algorithm Packages
-#
-# CONFIG_PKG_USING_FIRE_PID_CURVE is not set
-# CONFIG_PKG_USING_UKAL is not set
-
 #
 # miscellaneous packages
 #
@@ -873,6 +798,7 @@ CONFIG_UTEST_THR_PRIORITY=20
 # CONFIG_PKG_USING_VI is not set
 # CONFIG_PKG_USING_KI is not set
 # CONFIG_PKG_USING_ARMv7M_DWT is not set
+# CONFIG_PKG_USING_UKAL is not set
 # CONFIG_PKG_USING_CRCLIB is not set
 # CONFIG_PKG_USING_LWGPS is not set
 # CONFIG_PKG_USING_STATE_MACHINE is not set
@@ -899,10 +825,12 @@ CONFIG_UTEST_THR_PRIORITY=20
 #
 # Sensors
 #
-# CONFIG_PKG_USING_ARDUINO_SENSOR_DEVICE_DRIVERS is not set
-# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_BMP280 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_ADXL375 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VL53L0X is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_LIS3DHTR is not set
+# CONFIG_PKG_USING_ARDUINO_SEEED_DHT is not set
+# CONFIG_PKG_USING_ARDUINO_CAPACITIVESENSOR is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSOR is not set
 # CONFIG_PKG_USING_ADAFRUIT_MAX31855 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_MAX31865 is not set
@@ -987,7 +915,6 @@ CONFIG_UTEST_THR_PRIORITY=20
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU21DF is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_AS7341 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_HTU31D is not set
-# CONFIG_PKG_USING_ARDUINO_ADAFRUIT_SENSORLAB is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_INA260 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_TMP007_LIBRARY is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_L3GD20 is not set
@@ -999,44 +926,11 @@ CONFIG_UTEST_THR_PRIORITY=20
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6070 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML6075 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_VEML7700 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_LIS3DHTR is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_DHT is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL335 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_ADXL345 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_BME280 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_BMP280 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_H3LIS331DL is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_MMA7660 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_TSL2561 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_PAJ7620 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_VL53L0X is not set
-# CONFIG_PKG_USING_SEEED_ITG3200 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_SHT31 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_HP20X is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_DRV2605L is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_BBM150 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_HMC5883L is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_LSM303DLH is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_TCS3414CS is not set
-# CONFIG_PKG_USING_SEEED_MP503 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_BMP085 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_HIGHTEMP is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_VEML6070 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_SI1145 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_SHT35 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_AT42QT1070 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_LSM6DS3 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_HDC1000 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_HM3301 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_MCP9600 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_LTC2941 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_LDC1612 is not set
 
 #
 # Display
 #
 # CONFIG_PKG_USING_ARDUINO_U8G2 is not set
-# CONFIG_PKG_USING_SEEED_TM1637 is not set
 
 #
 # Timing
@@ -1064,7 +958,6 @@ CONFIG_UTEST_THR_PRIORITY=20
 #
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCF8574 is not set
 # CONFIG_PKG_USING_ARDUINO_ADAFRUIT_PCA9685 is not set
-# CONFIG_PKG_USING_ARDUINO_SEEED_PCF85063TP is not set
 
 #
 # Other
@@ -1086,65 +979,6 @@ CONFIG_UTEST_THR_PRIORITY=20
 # Uncategorized
 #
 
-#
-# Privated Packages of RealThread
-#
-# CONFIG_PKG_USING_CODEC is not set
-# CONFIG_PKG_USING_PLAYER is not set
-# CONFIG_PKG_USING_MPLAYER is not set
-# CONFIG_PKG_USING_PERSIMMON_SRC is not set
-# CONFIG_PKG_USING_JS_PERSIMMON is not set
-# CONFIG_PKG_USING_JERRYSCRIPT_WIN32 is not set
-
-#
-# Network Utilities
-#
-# CONFIG_PKG_USING_MDNS is not set
-# CONFIG_PKG_USING_UPNP is not set
-# CONFIG_PKG_USING_WICED is not set
-# CONFIG_PKG_USING_CLOUDSDK is not set
-# CONFIG_PKG_USING_POWER_MANAGER is not set
-# CONFIG_PKG_USING_RT_OTA is not set
-# CONFIG_PKG_USING_RTINSIGHT is not set
-# CONFIG_PKG_USING_SMARTCONFIG is not set
-# CONFIG_PKG_USING_RTX is not set
-# CONFIG_RT_USING_TESTCASE is not set
-# CONFIG_PKG_USING_NGHTTP2 is not set
-# CONFIG_PKG_USING_AVS is not set
-# CONFIG_PKG_USING_ALI_LINKKIT is not set
-# CONFIG_PKG_USING_STS is not set
-# CONFIG_PKG_USING_DLMS is not set
-# CONFIG_PKG_USING_AUDIO_FRAMEWORK is not set
-# CONFIG_PKG_USING_ZBAR is not set
-# CONFIG_PKG_USING_MCF is not set
-# CONFIG_PKG_USING_URPC is not set
-# CONFIG_PKG_USING_DCM is not set
-# CONFIG_PKG_USING_EMQ is not set
-# CONFIG_PKG_USING_CFGM is not set
-# CONFIG_PKG_USING_RT_CMSIS_DAP is not set
-# CONFIG_PKG_USING_SMODULE is not set
-# CONFIG_PKG_USING_SNFD is not set
-# CONFIG_PKG_USING_UDBD is not set
-# CONFIG_PKG_USING_BENCHMARK is not set
-# CONFIG_PKG_USING_UBJSON is not set
-# CONFIG_PKG_USING_DATATYPE is not set
-# CONFIG_PKG_USING_FASTFS is not set
-# CONFIG_PKG_USING_RIL is not set
-# CONFIG_PKG_USING_WATCH_DCM_SVC is not set
-# CONFIG_PKG_USING_WATCH_APP_FWK is not set
-# CONFIG_PKG_USING_GUI_TEST is not set
-# CONFIG_PKG_USING_PMEM is not set
-# CONFIG_PKG_USING_LWRDP is not set
-# CONFIG_PKG_USING_MASAN is not set
-# CONFIG_PKG_USING_BSDIFF_LIB is not set
-# CONFIG_PKG_USING_PRC_DIFF is not set
-
-#
-# RT-Thread Smart
-#
-# CONFIG_PKG_USING_UKERNEL is not set
-# CONFIG_PKG_USING_TRACE_AGENT is not set
-
 #
 # RISC-V QEMU virt64 configs
 #

bsp/qemu-virt64-riscv/Kconfig

@@ -29,10 +29,6 @@ config BOARD_QEMU_VIRT_RV64
     select ARCH_MM_MMU
     default y
 
-config RT_USING_USERSPACE
-    bool
-    default y
-
 config ENABLE_FPU
     bool "Enable FPU"
     default y

bsp/qemu-virt64-riscv/applications/test/test_mm/test_mm.c

@@ -9,7 +9,7 @@
 #include <rtthread.h>
 #include <rthw.h>
 
-#ifdef RT_USING_UTEST
+#if defined(RT_USING_UTEST) && defined(RT_USING_SMART)
 
 #include "riscv_mmu.h"
 #include "mmu.h"

bsp/qemu-virt64-riscv/driver/drv_uart.c

@@ -156,6 +156,7 @@ int rt_hw_uart_init(void)
                           RT_DEVICE_FLAG_STREAM | RT_DEVICE_FLAG_RDWR | RT_DEVICE_FLAG_INT_RX,
                           uart);
     rt_hw_interrupt_install(uart->irqno, rt_hw_uart_isr, serial, RT_CONSOLE_DEVICE_NAME);
+    rt_hw_interrupt_umask(uart->irqno);
     return 0;
 }
 

bsp/qemu-virt64-riscv/rtconfig.h

@@ -278,11 +278,6 @@
 
 /* peripheral libraries and drivers */
 
-/* sensors drivers */
-
-
-/* touch drivers */
-
 
 /* Kendryte SDK */
 
@@ -290,9 +285,6 @@
 /* AI packages */
 
 
-/* Signal Processing and Control Algorithm Packages */
-
-
 /* miscellaneous packages */
 
 /* project laboratory */
@@ -336,15 +328,6 @@
 
 /* Uncategorized */
 
-/* Privated Packages of RealThread */
-
-
-/* Network Utilities */
-
-
-/* RT-Thread Smart */
-
-
 /* RISC-V QEMU virt64 configs */
 
 #define RISCV_S_MODE

bsp/qemu-virt64-riscv/rtconfig.py

@@ -38,7 +38,7 @@ if PLATFORM == 'gcc':
     OBJCPY  = PREFIX + 'objcopy'
 
     DEVICE  = ' -mcmodel=medany -march=rv64imafdc -mabi=lp64 '
-    CFLAGS  = DEVICE + '-ffreestanding -flax-vector-conversions -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields'
+    CFLAGS  = DEVICE + '-ffreestanding -flax-vector-conversions -Wno-cpp -fno-common -ffunction-sections -fdata-sections -fstrict-volatile-bitfields'
     AFLAGS  = ' -c' + DEVICE + ' -x assembler-with-cpp -D__ASSEMBLY__ '
     LFLAGS  = DEVICE + ' -nostartfiles -Wl,--gc-sections,-Map=rtthread.map,-cref,-u,_start -T link.lds' + ' -lsupc++ -lgcc -static'
     CPATH   = ''

components/lwp/arch/risc-v/rv64/lwp_arch.h

@@ -50,6 +50,7 @@ extern "C" {
 #endif
 
 rt_mmu_info* arch_kernel_get_mmu_info(void);
+int arch_expand_user_stack(void *addr);
 
 rt_inline unsigned long rt_hw_ffz(unsigned long x)
 {

components/lwp/lwp.c

@@ -1320,7 +1320,7 @@ pid_t lwp_execve(char *filename, int debug, int argc, char **argv, char **envp)
 #ifdef RT_USING_MUSL
 extern char **__environ;
 #else
-char __environ = 0;
+char **__environ = 0;
 #endif
 
 pid_t exec(char *filename, int debug, int argc, char **argv)

include/rtdef.h

@@ -155,9 +155,6 @@ typedef rt_base_t                       rt_off_t;       /**< Type for offset */
 
 /* Common Utilities */
 
-#define _RT_STRINGIFY(x...)	#x
-#define RT_STRINGIFY(x...) _RT_STRINGIFY(x)
-
 #define RT_UNUSED(x)                   ((void)x)
 
 /* Compiler Related Definitions */
@@ -190,6 +187,8 @@ typedef __gnuc_va_list              va_list;
 #define va_end(v)                   __builtin_va_end(v)
 #define va_arg(v,l)                 __builtin_va_arg(v,l)
 #endif /* RT_USING_LIBC */
+#define __RT_STRINGIFY(x...)        #x
+#define RT_STRINGIFY(x...)          __RT_STRINGIFY(x)
 #define RT_SECTION(x)               __attribute__((section(x)))
 #define RT_USED                     __attribute__((used))
 #define ALIGN(n)                    __attribute__((aligned(n)))

libcpu/risc-v/virt64/backtrace.c

@@ -6,7 +6,9 @@
  * Change Logs:
  * Date           Author       Notes
  */
+
 #include <rtthread.h>
+#ifdef RT_USING_SMART
 #include <lwp_arch.h>
 
 #define TRANCE_LEVEL 20
@@ -132,3 +134,5 @@ static char *_get_elf_name(size_t sepc)
 {
     return IN_USERSPACE ? rt_current_thread->name : "rtthread.elf";
 }
+
+#endif /* RT_USING_SMART */

libcpu/risc-v/virt64/cpuport.c

@@ -14,9 +14,8 @@
 
 #include "cpuport.h"
 #include "stack.h"
-#include "sbi.h"
-
-#include <lwp_arch.h>
+#include <sbi.h>
+#include <encoding.h>
 
 #define K_SSTATUS_DEFAULT (SSTATUS_SPP | SSTATUS_SPIE | SSTATUS_SUM | SSTATUS_FS)
 

libcpu/risc-v/virt64/cpuport.h

@@ -60,6 +60,7 @@ typedef union {
 #endif
 
 #ifndef __ASSEMBLY__
+#include <rtthread.h>
 rt_inline void rt_hw_dsb()
 {
     asm volatile("fence":::"memory");

libcpu/risc-v/virt64/interrupt.c

@@ -10,7 +10,6 @@
  */
 #include <plic.h>
 #include <mmu.h>
-#include <lwp_arch.h>
 #include "tick.h"
 #include "encoding.h"
 #include "riscv.h"

libcpu/risc-v/virt64/interrupt_gcc.S

@@ -43,10 +43,12 @@ _save_context:
     // now we are ready to enter interrupt / excepiton handler
 _distinguish_syscall:
     csrr    t0, scause
+#ifdef RT_USING_SMART
     // TODO swap 8 with config macro name
     li      t1, 8
     beq     t0, t1, syscall_entry
     // syscall never return here
+#endif
 
 _handle_interrupt_and_exception:
     mv      a0, t0
@@ -70,9 +72,11 @@ _context_switch:
     jal     rt_hw_context_switch
 
 _resume_execution:
+#ifdef RT_USING_SMART
     LOAD    t0, FRAME_OFF_SSTATUS(sp)
     andi    t0, t0, SSTATUS_SPP
     beqz    t0, arch_ret_to_user
+#endif
 
 _resume_kernel:
     RESTORE_ALL

libcpu/risc-v/virt64/mmu.c

@@ -10,6 +10,9 @@
 
 #include <rtthread.h>
 #include <rthw.h>
+
+#ifdef RT_USING_SMART
+
 #include <board.h>
 #include <page.h>
 #include <stdlib.h>
@@ -639,3 +642,5 @@ void rt_hw_mmu_setup(rt_mmu_info *mmu_info, struct mem_desc *mdesc, int desc_nr)
 
     rt_hw_mmu_switch((void *)MMUTable);
 }
+
+#endif /* RT_USING_SMART */

libcpu/risc-v/virt64/plic.c

@@ -6,6 +6,7 @@
  * Change Logs:
  * Date           Author       Notes
  * 2021-05-20     bigmagic     first version
+ * 2022-09-16     WangXiaoyao  Porting to rv64
  */
 #include <rthw.h>
 #include <rtthread.h>
@@ -18,31 +19,39 @@
 #include <string.h>
 #include <stdlib.h>
 
+#ifdef RT_USING_SMART
+#include <ioremap.h>
+#else
+#define rt_ioremap(addr, ...) (addr)
+#endif
+
+size_t plic_base = 0x0c000000L;
+
 /*
-* Each PLIC interrupt source can be assigned a priority by writing
-* to its 32-bit memory-mapped priority register.
-* The QEMU-virt (the same as FU540-C000) supports 7 levels of priority.
-* A priority value of 0 is reserved to mean "never interrupt" and
-* effectively disables the interrupt.
-* Priority 1 is the lowest active priority, and priority 7 is the highest.
-* Ties between global interrupts of the same priority are broken by
-* the Interrupt ID; interrupts with the lowest ID have the highest
-* effective priority.
-*/
+ * Each PLIC interrupt source can be assigned a priority by writing
+ * to its 32-bit memory-mapped priority register.
+ * The QEMU-virt (the same as FU540-C000) supports 7 levels of priority.
+ * A priority value of 0 is reserved to mean "never interrupt" and
+ * effectively disables the interrupt.
+ * Priority 1 is the lowest active priority, and priority 7 is the highest.
+ * Ties between global interrupts of the same priority are broken by
+ * the Interrupt ID; interrupts with the lowest ID have the highest
+ * effective priority.
+ */
 void plic_set_priority(int irq, int priority)
 {
-    *(uint32_t*)PLIC_PRIORITY(irq) = priority;
+    *(uint32_t *)PLIC_PRIORITY(irq) = priority;
 }
 
 /*
-* Each global interrupt can be enabled by setting the corresponding
-* bit in the enables registers.
-*/
+ * Each global interrupt can be enabled by setting the corresponding
+ * bit in the enables registers.
+ */
 void plic_irq_enable(int irq)
 {
     int hart = __raw_hartid();
-    *(uint32_t*)PLIC_ENABLE(hart) = ((*(uint32_t*)PLIC_ENABLE(hart)) | (1 << irq));
-#ifdef  RISCV_S_MODE
+    *(uint32_t *)PLIC_ENABLE(hart) = ((*(uint32_t *)PLIC_ENABLE(hart)) | (1 << irq));
+#ifdef RISCV_S_MODE
     set_csr(sie, read_csr(sie) | MIP_SEIP);
 #else
     set_csr(mie, read_csr(mie) | MIP_MEIP);
@@ -52,20 +61,20 @@ void plic_irq_enable(int irq)
 void plic_irq_disable(int irq)
 {
     int hart = __raw_hartid();
-    *(uint32_t*)PLIC_ENABLE(hart) = (((*(uint32_t*)PLIC_ENABLE(hart)) & (~(1 << irq))));
+    *(uint32_t *)PLIC_ENABLE(hart) = (((*(uint32_t *)PLIC_ENABLE(hart)) & (~(1 << irq))));
 }
 
 /*
-* PLIC will mask all interrupts of a priority less than or equal to threshold.
-* Maximum threshold is 7.
-* For example, a threshold value of zero permits all interrupts with
-* non-zero priority, whereas a value of 7 masks all interrupts.
-* Notice, the threshold is global for PLIC, not for each interrupt source.
-*/
+ * PLIC will mask all interrupts of a priority less than or equal to threshold.
+ * Maximum threshold is 7.
+ * For example, a threshold value of zero permits all interrupts with
+ * non-zero priority, whereas a value of 7 masks all interrupts.
+ * Notice, the threshold is global for PLIC, not for each interrupt source.
+ */
 void plic_set_threshold(int threshold)
 {
     int hart = __raw_hartid();
-    *(uint32_t*)PLIC_THRESHOLD(hart) = threshold;
+    *(uint32_t *)PLIC_THRESHOLD(hart) = threshold;
 }
 
 /*
@@ -83,13 +92,13 @@ void plic_set_threshold(int threshold)
 int plic_claim(void)
 {
     int hart = __raw_hartid();
-    int irq = *(uint32_t*)PLIC_CLAIM(hart);
+    int irq = *(uint32_t *)PLIC_CLAIM(hart);
     return irq;
 }
 
 /*
  * DESCRIPTION:
-  *    Writing the interrupt ID it received from the claim (irq) to the
+ *    Writing the interrupt ID it received from the claim (irq) to the
  *    complete register would signal the PLIC we've served this IRQ.
  *    The PLIC does not check whether the completion ID is the same as the
  *    last claim ID for that target. If the completion ID does not match an
@@ -100,35 +109,33 @@ int plic_claim(void)
 void plic_complete(int irq)
 {
     int hart = __raw_hartid();
-    *(uint32_t*)PLIC_COMPLETE(hart) = irq;
+    *(uint32_t *)PLIC_COMPLETE(hart) = irq;
 }
 
 void plic_set_ie(rt_uint32_t word_index, rt_uint32_t val)
 {
-    volatile void *plic_ie = (void *)(rt_size_t)(PLIC_BASE_ADDR + PLIC_ENABLE_BASE + word_index * 4);
+    volatile void *plic_ie = (void *)(rt_size_t)(plic_base + PLIC_ENABLE_BASE + 0x80 + word_index * 4);
     writel(val, plic_ie);
 }
 
+static void _set_sie(int hartid)
+{
+    for (size_t i = hartid * WORD_CNT_BYTE; i < 32; i++)
+        plic_set_ie(i, 0xffffffff);
+}
+
 void plic_init()
 {
-    int i;
+    // PLIC takes up 64 MB space
+    plic_base = (size_t)rt_ioremap((void *)plic_base, 64 * 1024 * 1024);
 
     plic_set_threshold(0);
 
-    for(i = 0;i < 128;i++)
+    for (int i = 0; i < CONFIG_IRQ_NR; i++)
     {
-        plic_set_priority(i,7);
+        plic_set_priority(i, 1);
     }
 
-    plic_set_ie(0,0xffffffff);
-    plic_set_ie(1,0xffffffff);
-    plic_set_ie(2,0xffffffff);
-    plic_set_ie(3,0xffffffff);
-
-    rt_uint64_t addr;
-
-    for(addr = 0xC001000;addr <= 0xC1F1F80;addr += 4)
-    {
-        *((rt_uint32_t *)addr) = 0xffffffff;
-    }
+    // in a single core system, only current context was set
+    _set_sie(__raw_hartid());
 }

libcpu/risc-v/virt64/plic.h

@@ -15,20 +15,14 @@
 #include <rtconfig.h>
 #include <rthw.h>
 
-/*
- * This machine puts platform-level interrupt controller (PLIC) here.
- * Here only list PLIC registers in Machine mode.
- *
- */
+#define PLIC_PRIORITY_BASE  0x0
+#define PLIC_PENDING_BASE   0x1000
+#define PLIC_ENABLE_BASE    0x2000
+#define PLIC_CONTEXT_BASE   0x200000
 
-#define PLIC_PRIORITY_BASE 0x0
-#define PLIC_PENDING_BASE 0x1000
-#define PLIC_ENABLE_BASE 0x2000
-#define PLIC_CONTEXT_BASE 0x200000
+extern size_t plic_base;
 
-#define PLIC_BASE_ADDR 0xC000000
-
-#define VIRT_PLIC_BASE                  0x0c000000L
+#define VIRT_PLIC_BASE                  (plic_base)
 
 #define PLIC_PRIORITY_OFFSET            (0x0)
 #define PLIC_PENDING_OFFSET             (0x1000)
@@ -62,6 +56,12 @@
 #define PLIC_PRIORITY(id)               (VIRT_PLIC_BASE + PLIC_PRIORITY_OFFSET + (id) * 4)
 #define PLIC_PENDING(id)                (VIRT_PLIC_BASE + PLIC_PENDING_OFFSET + ((id) / 32))
 
+#define WORD_CNT_BYTE (1024 / 8)
+
+/* IRQ config in system, max 1024 (from 0 to 1023) */
+#define CONFIG_IRQ_NR (128)
+#define CONFIG_IRQ_WORD (CONFIG_IRQ_NR / 32)
+
 void plic_set_priority(int irq, int priority);
 void plic_irq_enable(int irq);
 void plic_irq_disable(int irq);

libcpu/risc-v/virt64/sbi.c

@@ -71,8 +71,8 @@ sbi_get_impl_version(void)
 
 void sbi_print_version(void)
 {
-    u_int major;
-    u_int minor;
+    uint32_t major;
+    uint32_t minor;
 
     /* For legacy SBI implementations. */
     if (sbi_spec_version == 0)

libcpu/risc-v/virt64/sbi.h

@@ -48,6 +48,7 @@
 #ifndef _MACHINE_SBI_H_
 #define _MACHINE_SBI_H_
 
+#include <stdint.h>
 #include <rtdef.h>
 
 /* SBI Specification Version */

libcpu/risc-v/virt64/syscall_c.c

@@ -12,6 +12,8 @@
 #include <rthw.h>
 #include <rtthread.h>
 
+#ifdef RT_USING_SMART
+
 #define DBG_TAG "syscall"
 #define DBG_LVL DBG_WARNING
 #include <rtdbg.h>
@@ -58,3 +60,4 @@ void syscall_handler(struct rt_hw_stack_frame *regs)
     regs->epc += 4; // skip ecall instruction
     LOG_I("[0x%lx] %s ret: 0x%lx", rt_thread_self(), syscall_name, regs->a0);
 }
+#endif /* RT_USING_SMART */

libcpu/risc-v/virt64/trap.c

@@ -5,9 +5,11 @@
  *
  * Change Logs:
  * Date           Author       Notes
+ * 2022-12-08     RT-Thread    first version
  */
 #include <rthw.h>
 #include <rtthread.h>
+#include <stdint.h>
 
 #include "encoding.h"
 #include "stack.h"
@@ -15,7 +17,13 @@
 #include "riscv.h"
 #include "tick.h"
 #include "plic.h"
-#include "lwp_arch.h"
+#include "riscv_mmu.h"
+
+#ifdef RT_USING_SMART
+#include <lwp_arch.h>
+#else
+#define rt_hw_backtrace(...) (0)
+#endif
 
 void dump_regs(struct rt_hw_stack_frame *regs)
 {
@@ -147,11 +155,11 @@ static const char *get_exception_msg(int id)
     return msg;
 }
 
+#ifdef RT_USING_SMART
 void handle_user(rt_size_t scause, rt_size_t stval, rt_size_t sepc, struct rt_hw_stack_frame *sp)
 {
     rt_size_t id = __MASKVALUE(scause, __MASK(63UL));
 
-#ifdef RT_USING_USERSPACE
     /* user page fault */
     if (id == EP_LOAD_PAGE_FAULT ||
         id == EP_STORE_PAGE_FAULT)
@@ -161,7 +169,6 @@ void handle_user(rt_size_t scause, rt_size_t stval, rt_size_t sepc, struct rt_hw
             return;
         }
     }
-#endif
     LOG_E("[FATAL ERROR] Exception %ld:%s\n", id, get_exception_msg(id));
     LOG_E("scause:0x%p,stval:0x%p,sepc:0x%p\n", scause, stval, sepc);
     dump_regs(sp);
@@ -171,6 +178,7 @@ void handle_user(rt_size_t scause, rt_size_t stval, rt_size_t sepc, struct rt_hw
     LOG_E("User Fault, killing thread: %s", rt_thread_self()->name);
     sys_exit(-1);
 }
+#endif
 
 static void vector_enable(struct rt_hw_stack_frame *sp)
 {
@@ -282,12 +290,14 @@ void handle_trap(rt_size_t scause, rt_size_t stval, rt_size_t sepc, struct rt_hw
                     goto _exit;
             }
 #endif /* ENABLE_VECTOR */
+#ifdef RT_USING_SMART
             if (!(sp->sstatus & 0x100))
             {
                 handle_user(scause, stval, sepc, sp);
                 // if handle_user() return here, jump to u mode then
                 goto _exit;
             }
+#endif
 
             // handle kernel exception:
             rt_kprintf("Unhandled Exception %ld:%s\n", id, get_exception_msg(id));