Merge pull request #5115 from yanmowudi/master

update lib

bsp/swm320-lq100/.config

@@ -7,19 +7,27 @@
 # RT-Thread Kernel
 #
 CONFIG_RT_NAME_MAX=8
+# CONFIG_RT_USING_ARCH_DATA_TYPE is not set
 # CONFIG_RT_USING_SMP is not set
 CONFIG_RT_ALIGN_SIZE=4
 # CONFIG_RT_THREAD_PRIORITY_8 is not set
 CONFIG_RT_THREAD_PRIORITY_32=y
 # CONFIG_RT_THREAD_PRIORITY_256 is not set
 CONFIG_RT_THREAD_PRIORITY_MAX=32
-CONFIG_RT_TICK_PER_SECOND=100
+CONFIG_RT_TICK_PER_SECOND=1000
 CONFIG_RT_USING_OVERFLOW_CHECK=y
 CONFIG_RT_USING_HOOK=y
 CONFIG_RT_USING_IDLE_HOOK=y
 CONFIG_RT_IDLE_HOOK_LIST_SIZE=4
 CONFIG_IDLE_THREAD_STACK_SIZE=256
 # CONFIG_RT_USING_TIMER_SOFT is not set
+
+#
+# kservice optimization
+#
+# CONFIG_RT_KSERVICE_USING_STDLIB is not set
+# CONFIG_RT_KSERVICE_USING_TINY_SIZE is not set
+# CONFIG_RT_USING_ASM_MEMCPY is not set
 CONFIG_RT_DEBUG=y
 CONFIG_RT_DEBUG_COLOR=y
 # CONFIG_RT_DEBUG_INIT_CONFIG is not set
@@ -48,10 +56,12 @@ CONFIG_RT_USING_MESSAGEQUEUE=y
 #
 CONFIG_RT_USING_MEMPOOL=y
 CONFIG_RT_USING_MEMHEAP=y
+CONFIG_RT_USING_MEMHEAP_AUTO_BINDING=y
 # CONFIG_RT_USING_NOHEAP is not set
-CONFIG_RT_USING_SMALL_MEM=y
+# CONFIG_RT_USING_SMALL_MEM is not set
 # CONFIG_RT_USING_SLAB is not set
-# CONFIG_RT_USING_MEMHEAP_AS_HEAP is not set
+CONFIG_RT_USING_MEMHEAP_AS_HEAP=y
+# CONFIG_RT_USING_USERHEAP is not set
 # CONFIG_RT_USING_MEMTRACE is not set
 CONFIG_RT_USING_HEAP=y
 
@@ -64,7 +74,12 @@ CONFIG_RT_USING_DEVICE=y
 CONFIG_RT_USING_CONSOLE=y
 CONFIG_RT_CONSOLEBUF_SIZE=128
 CONFIG_RT_CONSOLE_DEVICE_NAME="uart0"
-CONFIG_RT_VER_NUM=0x40000
+# CONFIG_RT_PRINTF_LONGLONG is not set
+CONFIG_RT_VER_NUM=0x40004
+CONFIG_ARCH_ARM=y
+CONFIG_RT_USING_CPU_FFS=y
+CONFIG_ARCH_ARM_CORTEX_M=y
+CONFIG_ARCH_ARM_CORTEX_M4=y
 # CONFIG_ARCH_CPU_STACK_GROWS_UPWARD is not set
 
 #
@@ -84,53 +99,67 @@ CONFIG_RT_MAIN_THREAD_PRIORITY=10
 # Command shell
 #
 CONFIG_RT_USING_FINSH=y
+CONFIG_RT_USING_MSH=y
+CONFIG_FINSH_USING_MSH=y
 CONFIG_FINSH_THREAD_NAME="tshell"
+CONFIG_FINSH_THREAD_PRIORITY=20
+CONFIG_FINSH_THREAD_STACK_SIZE=4096
 CONFIG_FINSH_USING_HISTORY=y
 CONFIG_FINSH_HISTORY_LINES=5
 CONFIG_FINSH_USING_SYMTAB=y
+CONFIG_FINSH_CMD_SIZE=80
+CONFIG_MSH_USING_BUILT_IN_COMMANDS=y
 CONFIG_FINSH_USING_DESCRIPTION=y
 # CONFIG_FINSH_ECHO_DISABLE_DEFAULT is not set
-CONFIG_FINSH_THREAD_PRIORITY=20
-CONFIG_FINSH_THREAD_STACK_SIZE=4096
-CONFIG_FINSH_CMD_SIZE=80
 # CONFIG_FINSH_USING_AUTH is not set
-CONFIG_FINSH_USING_MSH=y
-CONFIG_FINSH_USING_MSH_DEFAULT=y
-# CONFIG_FINSH_USING_MSH_ONLY is not set
 CONFIG_FINSH_ARG_MAX=10
 
 #
 # Device virtual file system
 #
 # CONFIG_RT_USING_DFS is not set
+# CONFIG_RT_DFS_ELM_USE_LFN_0 is not set
+# CONFIG_RT_DFS_ELM_USE_LFN_1 is not set
+# CONFIG_RT_DFS_ELM_USE_LFN_2 is not set
+# CONFIG_RT_DFS_ELM_USE_LFN_3 is not set
+# CONFIG_RT_DFS_ELM_LFN_UNICODE_0 is not set
+# CONFIG_RT_DFS_ELM_LFN_UNICODE_1 is not set
+# CONFIG_RT_DFS_ELM_LFN_UNICODE_2 is not set
+# CONFIG_RT_DFS_ELM_LFN_UNICODE_3 is not set
 
 #
 # Device Drivers
 #
 CONFIG_RT_USING_DEVICE_IPC=y
 CONFIG_RT_PIPE_BUFSZ=512
+# CONFIG_RT_USING_SYSTEM_WORKQUEUE is not set
 CONFIG_RT_USING_SERIAL=y
+CONFIG_RT_USING_SERIAL_V1=y
+# CONFIG_RT_USING_SERIAL_V2 is not set
 # CONFIG_RT_SERIAL_USING_DMA is not set
+CONFIG_RT_SERIAL_RB_BUFSZ=64
 # CONFIG_RT_USING_CAN is not set
-CONFIG_RT_USING_HWTIMER=y
+# CONFIG_RT_USING_HWTIMER is not set
 # CONFIG_RT_USING_CPUTIME is not set
 # CONFIG_RT_USING_I2C is not set
+# CONFIG_RT_USING_PHY is not set
 CONFIG_RT_USING_PIN=y
 # CONFIG_RT_USING_ADC is not set
-CONFIG_RT_USING_PWM=y
+# CONFIG_RT_USING_DAC is not set
+# CONFIG_RT_USING_PWM is not set
 # CONFIG_RT_USING_MTD_NOR is not set
 # CONFIG_RT_USING_MTD_NAND is not set
-# CONFIG_RT_USING_MTD is not set
 # CONFIG_RT_USING_PM is not set
 # CONFIG_RT_USING_RTC is not set
 # CONFIG_RT_USING_SDIO is not set
 # CONFIG_RT_USING_SPI is not set
 # CONFIG_RT_USING_WDT is not set
 # CONFIG_RT_USING_AUDIO is not set
-
-#
-# Using WiFi
-#
+# CONFIG_RT_USING_SENSOR is not set
+# CONFIG_RT_USING_TOUCH is not set
+# CONFIG_RT_USING_HWCRYPTO is not set
+# CONFIG_RT_USING_PULSE_ENCODER is not set
+# CONFIG_RT_USING_INPUT_CAPTURE is not set
 # CONFIG_RT_USING_WIFI is not set
 
 #
@@ -142,8 +171,11 @@ CONFIG_RT_USING_PWM=y
 #
 # POSIX layer and C standard library
 #
-# CONFIG_RT_USING_LIBC is not set
+CONFIG_RT_USING_LIBC=y
 # CONFIG_RT_USING_PTHREADS is not set
+CONFIG_RT_LIBC_USING_TIME=y
+# CONFIG_RT_USING_MODULE is not set
+CONFIG_RT_LIBC_DEFAULT_TIMEZONE=8
 
 #
 # Network
@@ -155,14 +187,14 @@ CONFIG_RT_USING_PWM=y
 # CONFIG_RT_USING_SAL is not set
 
 #
-# light weight TCP/IP stack
+# Network interface device
 #
-# CONFIG_RT_USING_LWIP is not set
+# CONFIG_RT_USING_NETDEV is not set
 
 #
-# Modbus master and slave stack
+# light weight TCP/IP stack
 #
-# CONFIG_RT_USING_MODBUS is not set
+# CONFIG_RT_USING_LWIP is not set
 
 #
 # AT commands
@@ -177,10 +209,16 @@ CONFIG_RT_USING_PWM=y
 #
 # Utilities
 #
-# CONFIG_RT_USING_LOGTRACE is not set
 # CONFIG_RT_USING_RYM is not set
 # CONFIG_RT_USING_ULOG is not set
 # CONFIG_RT_USING_UTEST is not set
+# CONFIG_RT_USING_RT_LINK is not set
+# CONFIG_RT_USING_LWP is not set
+
+#
+# RT-Thread Utestcases
+#
+# CONFIG_RT_USING_UTESTCASES is not set
 
 #
 # RT-Thread online packages
@@ -189,13 +227,20 @@ CONFIG_RT_USING_PWM=y
 #
 # IoT - internet of things
 #
+# CONFIG_PKG_USING_LORAWAN_DRIVER is not set
 # CONFIG_PKG_USING_PAHOMQTT is not set
+# CONFIG_PKG_USING_UMQTT is not set
 # CONFIG_PKG_USING_WEBCLIENT is not set
 # CONFIG_PKG_USING_WEBNET is not set
 # CONFIG_PKG_USING_MONGOOSE is not set
+# CONFIG_PKG_USING_MYMQTT is not set
+# CONFIG_PKG_USING_KAWAII_MQTT is not set
+# CONFIG_PKG_USING_BC28_MQTT is not set
 # CONFIG_PKG_USING_WEBTERMINAL is not set
 # CONFIG_PKG_USING_CJSON is not set
 # CONFIG_PKG_USING_JSMN is not set
+# CONFIG_PKG_USING_LIBMODBUS is not set
+# CONFIG_PKG_USING_FREEMODBUS is not set
 # CONFIG_PKG_USING_LJSON is not set
 # CONFIG_PKG_USING_EZXML is not set
 # CONFIG_PKG_USING_NANOPB is not set
@@ -213,11 +258,16 @@ CONFIG_RT_USING_PWM=y
 # Wiced WiFi
 #
 # CONFIG_PKG_USING_WLAN_WICED is not set
+# CONFIG_PKG_USING_RW007 is not set
 # CONFIG_PKG_USING_COAP is not set
 # CONFIG_PKG_USING_NOPOLL is not set
 # CONFIG_PKG_USING_NETUTILS is not set
+# CONFIG_PKG_USING_CMUX is not set
+# CONFIG_PKG_USING_PPP_DEVICE is not set
 # CONFIG_PKG_USING_AT_DEVICE is not set
+# CONFIG_PKG_USING_ATSRV_SOCKET is not set
 # CONFIG_PKG_USING_WIZNET is not set
+# CONFIG_PKG_USING_ZB_COORDINATOR is not set
 
 #
 # IoT Cloud
@@ -226,7 +276,39 @@ CONFIG_RT_USING_PWM=y
 # CONFIG_PKG_USING_GAGENT_CLOUD is not set
 # CONFIG_PKG_USING_ALI_IOTKIT is not set
 # CONFIG_PKG_USING_AZURE is not set
-# CONFIG_PKG_USING_TENCENT_IOTKIT is not set
+# CONFIG_PKG_USING_TENCENT_IOT_EXPLORER is not set
+# CONFIG_PKG_USING_JIOT-C-SDK is not set
+# CONFIG_PKG_USING_UCLOUD_IOT_SDK is not set
+# CONFIG_PKG_USING_JOYLINK is not set
+# CONFIG_PKG_USING_NIMBLE is not set
+# CONFIG_PKG_USING_OTA_DOWNLOADER is not set
+# CONFIG_PKG_USING_IPMSG is not set
+# CONFIG_PKG_USING_LSSDP is not set
+# CONFIG_PKG_USING_AIRKISS_OPEN is not set
+# CONFIG_PKG_USING_LIBRWS is not set
+# CONFIG_PKG_USING_TCPSERVER is not set
+# CONFIG_PKG_USING_PROTOBUF_C is not set
+# CONFIG_PKG_USING_DLT645 is not set
+# CONFIG_PKG_USING_QXWZ is not set
+# CONFIG_PKG_USING_SMTP_CLIENT is not set
+# CONFIG_PKG_USING_ABUP_FOTA is not set
+# CONFIG_PKG_USING_LIBCURL2RTT is not set
+# CONFIG_PKG_USING_CAPNP is not set
+# CONFIG_PKG_USING_RT_CJSON_TOOLS is not set
+# CONFIG_PKG_USING_AGILE_TELNET is not set
+# CONFIG_PKG_USING_NMEALIB is not set
+# CONFIG_PKG_USING_AGILE_JSMN is not set
+# CONFIG_PKG_USING_PDULIB is not set
+# CONFIG_PKG_USING_BTSTACK is not set
+# CONFIG_PKG_USING_LORAWAN_ED_STACK is not set
+# CONFIG_PKG_USING_WAYZ_IOTKIT is not set
+# CONFIG_PKG_USING_MAVLINK is not set
+# CONFIG_PKG_USING_RAPIDJSON is not set
+# CONFIG_PKG_USING_BSAL is not set
+# CONFIG_PKG_USING_AGILE_MODBUS is not set
+# CONFIG_PKG_USING_AGILE_FTP is not set
+# CONFIG_PKG_USING_EMBEDDEDPROTO is not set
+# CONFIG_PKG_USING_RT_LINK_HW is not set
 
 #
 # security packages
@@ -234,6 +316,8 @@ CONFIG_RT_USING_PWM=y
 # CONFIG_PKG_USING_MBEDTLS is not set
 # CONFIG_PKG_USING_libsodium is not set
 # CONFIG_PKG_USING_TINYCRYPT is not set
+# CONFIG_PKG_USING_TFM is not set
+# CONFIG_PKG_USING_YD_CRYPTO is not set
 
 #
 # language packages
@@ -241,12 +325,23 @@ CONFIG_RT_USING_PWM=y
 # CONFIG_PKG_USING_LUA is not set
 # CONFIG_PKG_USING_JERRYSCRIPT is not set
 # CONFIG_PKG_USING_MICROPYTHON is not set
+# CONFIG_PKG_USING_PIKASCRIPT is not set
 
 #
 # multimedia packages
 #
 # CONFIG_PKG_USING_OPENMV is not set
 # CONFIG_PKG_USING_MUPDF is not set
+# CONFIG_PKG_USING_STEMWIN is not set
+# CONFIG_PKG_USING_WAVPLAYER is not set
+# CONFIG_PKG_USING_TJPGD is not set
+# CONFIG_PKG_USING_PDFGEN is not set
+# CONFIG_PKG_USING_HELIX is not set
+# CONFIG_PKG_USING_AZUREGUIX is not set
+# CONFIG_PKG_USING_TOUCHGFX2RTT is not set
+# CONFIG_PKG_USING_NUEMWIN is not set
+# CONFIG_PKG_USING_MP3PLAYER is not set
+# CONFIG_PKG_USING_TINYJPEG is not set
 
 #
 # tools packages
@@ -255,120 +350,262 @@ CONFIG_RT_USING_PWM=y
 # CONFIG_PKG_USING_EASYFLASH is not set
 # CONFIG_PKG_USING_EASYLOGGER is not set
 # CONFIG_PKG_USING_SYSTEMVIEW is not set
+# CONFIG_PKG_USING_SEGGER_RTT is not set
 # CONFIG_PKG_USING_RDB is not set
 # CONFIG_PKG_USING_QRCODE is not set
 # CONFIG_PKG_USING_ULOG_EASYFLASH is not set
+# CONFIG_PKG_USING_ULOG_FILE is not set
+# CONFIG_PKG_USING_LOGMGR is not set
+# CONFIG_PKG_USING_ADBD is not set
+# CONFIG_PKG_USING_COREMARK is not set
+# CONFIG_PKG_USING_DHRYSTONE is not set
+# CONFIG_PKG_USING_MEMORYPERF is not set
+# CONFIG_PKG_USING_NR_MICRO_SHELL is not set
+# CONFIG_PKG_USING_CHINESE_FONT_LIBRARY is not set
+# CONFIG_PKG_USING_LUNAR_CALENDAR is not set
+# CONFIG_PKG_USING_BS8116A is not set
+# CONFIG_PKG_USING_GPS_RMC is not set
+# CONFIG_PKG_USING_URLENCODE is not set
+# CONFIG_PKG_USING_UMCN is not set
+# CONFIG_PKG_USING_LWRB2RTT is not set
+# CONFIG_PKG_USING_CPU_USAGE is not set
+# CONFIG_PKG_USING_GBK2UTF8 is not set
+# CONFIG_PKG_USING_VCONSOLE is not set
+# CONFIG_PKG_USING_KDB is not set
+# CONFIG_PKG_USING_WAMR is not set
+# CONFIG_PKG_USING_MICRO_XRCE_DDS_CLIENT is not set
+# CONFIG_PKG_USING_LWLOG is not set
+# CONFIG_PKG_USING_ANV_TRACE is not set
+# CONFIG_PKG_USING_ANV_MEMLEAK is not set
+# CONFIG_PKG_USING_ANV_TESTSUIT is not set
+# CONFIG_PKG_USING_ANV_BENCH is not set
+# CONFIG_PKG_USING_DEVMEM is not set
+# CONFIG_PKG_USING_REGEX is not set
+# CONFIG_PKG_USING_MEM_SANDBOX is not set
+# CONFIG_PKG_USING_SOLAR_TERMS is not set
+# CONFIG_PKG_USING_GAN_ZHI is not set
 
 #
 # system packages
 #
+
+#
+# acceleration: Assembly language or algorithmic acceleration packages
+#
+# CONFIG_PKG_USING_RT_MEMCPY_CM is not set
+# CONFIG_PKG_USING_QFPLIB_M0_FULL is not set
+# CONFIG_PKG_USING_QFPLIB_M0_TINY is not set
+# CONFIG_PKG_USING_QFPLIB_M3 is not set
+
+#
+# Micrium: Micrium software products porting for RT-Thread
+#
+# CONFIG_PKG_USING_UCOSIII_WRAPPER is not set
+# CONFIG_PKG_USING_UCOSII_WRAPPER is not set
+# CONFIG_PKG_USING_UC_CRC is not set
+# CONFIG_PKG_USING_UC_CLK is not set
+# CONFIG_PKG_USING_UC_COMMON is not set
+# CONFIG_PKG_USING_UC_MODBUS is not set
 # CONFIG_PKG_USING_GUIENGINE is not set
+# CONFIG_PKG_USING_PERSIMMON is not set
 # CONFIG_PKG_USING_CAIRO is not set
 # CONFIG_PKG_USING_PIXMAN is not set
-# CONFIG_PKG_USING_LWEXT4 is not set
 # CONFIG_PKG_USING_PARTITION is not set
 # CONFIG_PKG_USING_FAL is not set
+# CONFIG_PKG_USING_FLASHDB is not set
 # CONFIG_PKG_USING_SQLITE is not set
 # CONFIG_PKG_USING_RTI is not set
 # CONFIG_PKG_USING_LITTLEVGL2RTT is not set
 # CONFIG_PKG_USING_CMSIS is not set
 # CONFIG_PKG_USING_DFS_YAFFS is not set
 # CONFIG_PKG_USING_LITTLEFS is not set
+# CONFIG_PKG_USING_DFS_JFFS2 is not set
+# CONFIG_PKG_USING_DFS_UFFS is not set
+# CONFIG_PKG_USING_LWEXT4 is not set
+# CONFIG_PKG_USING_THREAD_POOL is not set
+# CONFIG_PKG_USING_ROBOTS is not set
+# CONFIG_PKG_USING_EV is not set
+# CONFIG_PKG_USING_SYSWATCH is not set
+# CONFIG_PKG_USING_SYS_LOAD_MONITOR is not set
+# CONFIG_PKG_USING_PLCCORE is not set
+# CONFIG_PKG_USING_RAMDISK is not set
+# CONFIG_PKG_USING_MININI is not set
+# CONFIG_PKG_USING_QBOOT is not set
+# CONFIG_PKG_USING_PPOOL is not set
+# CONFIG_PKG_USING_OPENAMP is not set
+# CONFIG_PKG_USING_RT_KPRINTF_THREADSAFE is not set
+# CONFIG_PKG_USING_LPM is not set
+# CONFIG_PKG_USING_TLSF is not set
+# CONFIG_PKG_USING_EVENT_RECORDER is not set
+# CONFIG_PKG_USING_ARM_2D is not set
+# CONFIG_PKG_USING_WCWIDTH is not set
 
 #
 # peripheral libraries and drivers
 #
+# CONFIG_PKG_USING_SENSORS_DRIVERS is not set
 # CONFIG_PKG_USING_REALTEK_AMEBA is not set
 # CONFIG_PKG_USING_SHT2X is not set
-# CONFIG_PKG_USING_AHT10 is not set
-# CONFIG_PKG_USING_AP3216C is not set
+# CONFIG_PKG_USING_SHT3X is not set
+# CONFIG_PKG_USING_AS7341 is not set
 # CONFIG_PKG_USING_STM32_SDIO is not set
 # CONFIG_PKG_USING_ICM20608 is not set
 # CONFIG_PKG_USING_U8G2 is not set
 # CONFIG_PKG_USING_BUTTON is not set
-# CONFIG_PKG_USING_MPU6XXX is not set
 # CONFIG_PKG_USING_PCF8574 is not set
+# CONFIG_PKG_USING_SX12XX is not set
+# CONFIG_PKG_USING_SIGNAL_LED is not set
+# CONFIG_PKG_USING_LEDBLINK is not set
+# CONFIG_PKG_USING_LITTLED is not set
+# CONFIG_PKG_USING_LKDGUI is not set
+# CONFIG_PKG_USING_NRF5X_SDK is not set
+# CONFIG_PKG_USING_NRFX is not set
+# CONFIG_PKG_USING_WM_LIBRARIES is not set
 # CONFIG_PKG_USING_KENDRYTE_SDK is not set
+# CONFIG_PKG_USING_INFRARED is not set
+# CONFIG_PKG_USING_AGILE_BUTTON is not set
+# CONFIG_PKG_USING_AGILE_LED is not set
+# CONFIG_PKG_USING_AT24CXX is not set
+# CONFIG_PKG_USING_MOTIONDRIVER2RTT is not set
+# CONFIG_PKG_USING_AD7746 is not set
+# CONFIG_PKG_USING_PCA9685 is not set
+# CONFIG_PKG_USING_I2C_TOOLS is not set
+# CONFIG_PKG_USING_NRF24L01 is not set
+# CONFIG_PKG_USING_TOUCH_DRIVERS is not set
+# CONFIG_PKG_USING_MAX17048 is not set
+# CONFIG_PKG_USING_RPLIDAR is not set
+# CONFIG_PKG_USING_AS608 is not set
+# CONFIG_PKG_USING_RC522 is not set
+# CONFIG_PKG_USING_WS2812B is not set
+# CONFIG_PKG_USING_EMBARC_BSP is not set
+# CONFIG_PKG_USING_EXTERN_RTC_DRIVERS is not set
+# CONFIG_PKG_USING_MULTI_RTIMER is not set
+# CONFIG_PKG_USING_MAX7219 is not set
+# CONFIG_PKG_USING_BEEP is not set
+# CONFIG_PKG_USING_EASYBLINK is not set
+# CONFIG_PKG_USING_PMS_SERIES is not set
+# CONFIG_PKG_USING_CAN_YMODEM is not set
+# CONFIG_PKG_USING_LORA_RADIO_DRIVER is not set
+# CONFIG_PKG_USING_QLED is not set
+# CONFIG_PKG_USING_PAJ7620 is not set
+# CONFIG_PKG_USING_AGILE_CONSOLE is not set
+# CONFIG_PKG_USING_LD3320 is not set
+# CONFIG_PKG_USING_WK2124 is not set
+# CONFIG_PKG_USING_LY68L6400 is not set
+# CONFIG_PKG_USING_DM9051 is not set
+# CONFIG_PKG_USING_SSD1306 is not set
+# CONFIG_PKG_USING_QKEY is not set
+# CONFIG_PKG_USING_RS485 is not set
+# CONFIG_PKG_USING_NES is not set
+# CONFIG_PKG_USING_VIRTUAL_SENSOR is not set
+# CONFIG_PKG_USING_VDEVICE is not set
+# CONFIG_PKG_USING_SGM706 is not set
+# CONFIG_PKG_USING_STM32WB55_SDK is not set
+# CONFIG_PKG_USING_RDA58XX is not set
+# CONFIG_PKG_USING_LIBNFC is not set
+# CONFIG_PKG_USING_MFOC is not set
+# CONFIG_PKG_USING_TMC51XX is not set
+# CONFIG_PKG_USING_TCA9534 is not set
+# CONFIG_PKG_USING_KOBUKI is not set
+# CONFIG_PKG_USING_ROSSERIAL is not set
+# CONFIG_PKG_USING_MICRO_ROS is not set
+# CONFIG_PKG_USING_MCP23008 is not set
+# CONFIG_PKG_USING_BLUETRUM_SDK is not set
+
+#
+# AI packages
+#
+# CONFIG_PKG_USING_LIBANN is not set
+# CONFIG_PKG_USING_NNOM is not set
+# CONFIG_PKG_USING_ONNX_BACKEND is not set
+# CONFIG_PKG_USING_ONNX_PARSER is not set
+# CONFIG_PKG_USING_TENSORFLOWLITEMICRO is not set
+# CONFIG_PKG_USING_ELAPACK is not set
+# CONFIG_PKG_USING_ULAPACK is not set
+# CONFIG_PKG_USING_QUEST is not set
+# CONFIG_PKG_USING_NAXOS is not set
 
 #
 # miscellaneous packages
 #
+
+#
+# samples: kernel and components samples
+#
+# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
+# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
+# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
+# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
+
+#
+# entertainment: terminal games and other interesting software packages
+#
+# CONFIG_PKG_USING_CMATRIX is not set
+# CONFIG_PKG_USING_SL is not set
+# CONFIG_PKG_USING_CAL is not set
+# CONFIG_PKG_USING_ACLOCK is not set
+# CONFIG_PKG_USING_THREES is not set
+# CONFIG_PKG_USING_2048 is not set
+# CONFIG_PKG_USING_SNAKE is not set
+# CONFIG_PKG_USING_TETRIS is not set
+# CONFIG_PKG_USING_DONUT is not set
 # CONFIG_PKG_USING_LIBCSV is not set
 # CONFIG_PKG_USING_OPTPARSE is not set
 # CONFIG_PKG_USING_FASTLZ is not set
 # CONFIG_PKG_USING_MINILZO is not set
 # CONFIG_PKG_USING_QUICKLZ is not set
+# CONFIG_PKG_USING_LZMA is not set
 # CONFIG_PKG_USING_MULTIBUTTON is not set
+# CONFIG_PKG_USING_FLEXIBLE_BUTTON is not set
 # CONFIG_PKG_USING_CANFESTIVAL is not set
 # CONFIG_PKG_USING_ZLIB is not set
+# CONFIG_PKG_USING_MINIZIP is not set
 # CONFIG_PKG_USING_DSTR is not set
 # CONFIG_PKG_USING_TINYFRAME is not set
-
-#
-# samples: kernel and components samples
-#
-# CONFIG_PKG_USING_KERNEL_SAMPLES is not set
-# CONFIG_PKG_USING_FILESYSTEM_SAMPLES is not set
-# CONFIG_PKG_USING_NETWORK_SAMPLES is not set
-# CONFIG_PKG_USING_PERIPHERAL_SAMPLES is not set
+# CONFIG_PKG_USING_KENDRYTE_DEMO is not set
+# CONFIG_PKG_USING_DIGITALCTRL is not set
+# CONFIG_PKG_USING_UPACKER is not set
+# CONFIG_PKG_USING_UPARAM is not set
 # CONFIG_PKG_USING_HELLO is not set
-CONFIG_SOC_SWM320VET7=y
+# CONFIG_PKG_USING_VI is not set
+# CONFIG_PKG_USING_KI is not set
+# CONFIG_PKG_USING_ARMv7M_DWT is not set
+# CONFIG_PKG_USING_VT100 is not set
+# CONFIG_PKG_USING_UKAL is not set
+# CONFIG_PKG_USING_CRCLIB is not set
+# CONFIG_PKG_USING_LWGPS is not set
+# CONFIG_PKG_USING_STATE_MACHINE is not set
+# CONFIG_PKG_USING_MCURSES is not set
+# CONFIG_PKG_USING_COWSAY is not set
+# CONFIG_PKG_USING_TERMBOX is not set
 
 #
 # Hardware Drivers Config
 #
+CONFIG_SOC_SWM320=y
 
 #
 # On-chip Peripheral Drivers
 #
-CONFIG_BSP_USING_GPIO=y
-# CONFIG_BSP_USING_WDT is not set
-
-#
-# UART Drivers
-#
+CONFIG_BSP_USING_UART=y
 CONFIG_BSP_USING_UART0=y
 # CONFIG_BSP_USING_UART1 is not set
 # CONFIG_BSP_USING_UART2 is not set
 # CONFIG_BSP_USING_UART3 is not set
-
-#
-# SPI Drivers
-#
-# CONFIG_BSP_USING_SPI0 is not set
-# CONFIG_BSP_USING_SPI1 is not set
-
-#
-# I2C Drivers
-#
+CONFIG_BSP_USING_GPIO=y
+# CONFIG_BSP_USING_ADC is not set
+# CONFIG_BSP_USING_TIM is not set
 # CONFIG_BSP_USING_I2C is not set
-
-#
-# PWM Drivers
-#
-# CONFIG_BSP_USING_PWM0 is not set
-# CONFIG_BSP_USING_PWM1 is not set
-# CONFIG_BSP_USING_PWM2 is not set
-# CONFIG_BSP_USING_PWM3 is not set
-
-#
-# RTC Drivers
-#
+# CONFIG_BSP_USING_PWM is not set
 # CONFIG_BSP_USING_RTC is not set
-
-#
-# HWtimer Drivers
-#
-# CONFIG_BSP_USING_HWTIMER0 is not set
-# CONFIG_BSP_USING_HWTIMER1 is not set
-# CONFIG_BSP_USING_HWTIMER2 is not set
-# CONFIG_BSP_USING_HWTIMER3 is not set
-# CONFIG_BSP_USING_HWTIMER4 is not set
-# CONFIG_BSP_USING_HWTIMER5 is not set
+# CONFIG_BSP_USING_SPI is not set
+# CONFIG_BSP_USING_WDT is not set
+# CONFIG_BSP_USING_CRC is not set
 
 #
 # Onboard Peripheral Drivers
 #
+# CONFIG_BSP_USING_SDIO is not set
 # CONFIG_BSP_USING_EXT_SRAM is not set
 # CONFIG_BSP_USING_NOR_FLASH is not set
 

bsp/swm320-lq100/Kconfig

@@ -17,11 +17,9 @@ config PKGS_DIR
 
 source "$RTT_DIR/Kconfig"
 source "$PKGS_DIR/Kconfig"
+source "drivers/Kconfig"
 
-config SOC_SWM320VET7
+config SOC_SWM320
     bool
-    select RT_USING_COMPONENTS_INIT
-    select RT_USING_USER_MAIN
+    select ARCH_ARM_CORTEX_M4
     default y
-
-source "drivers/Kconfig"

bsp/swm320-lq100/Libraries/CMSIS/CoreSupport/arm_common_tables.h

@@ -2,12 +2,12 @@
 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
 *
 * $Date:        31. July 2014
-* $Revision: 	V1.4.4
+* $Revision:    V1.4.4
 *
-* Project: 	    CMSIS DSP Library
-* Title:	    arm_common_tables.h
+* Project:      CMSIS DSP Library
+* Title:        arm_common_tables.h
 *
-* Description:	This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
+* Description:  This file has extern declaration for common tables like Bitreverse, reciprocal etc which are used across different functions
 *
 * Target Processor: Cortex-M4/Cortex-M3
 *
@@ -85,14 +85,13 @@ extern const float32_t twiddleCoef_rfft_1024[1024];
 extern const float32_t twiddleCoef_rfft_2048[2048];
 extern const float32_t twiddleCoef_rfft_4096[4096];
 
-
 /* floating-point bit reversal tables */
-#define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20  )
-#define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48  )
-#define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56  )
-#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208 )
-#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440 )
-#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448 )
+#define ARMBITREVINDEXTABLE__16_TABLE_LENGTH ((uint16_t)20)
+#define ARMBITREVINDEXTABLE__32_TABLE_LENGTH ((uint16_t)48)
+#define ARMBITREVINDEXTABLE__64_TABLE_LENGTH ((uint16_t)56)
+#define ARMBITREVINDEXTABLE_128_TABLE_LENGTH ((uint16_t)208)
+#define ARMBITREVINDEXTABLE_256_TABLE_LENGTH ((uint16_t)440)
+#define ARMBITREVINDEXTABLE_512_TABLE_LENGTH ((uint16_t)448)
 #define ARMBITREVINDEXTABLE1024_TABLE_LENGTH ((uint16_t)1800)
 #define ARMBITREVINDEXTABLE2048_TABLE_LENGTH ((uint16_t)3808)
 #define ARMBITREVINDEXTABLE4096_TABLE_LENGTH ((uint16_t)4032)
@@ -108,13 +107,13 @@ extern const uint16_t armBitRevIndexTable2048[ARMBITREVINDEXTABLE2048_TABLE_LENG
 extern const uint16_t armBitRevIndexTable4096[ARMBITREVINDEXTABLE4096_TABLE_LENGTH];
 
 /* fixed-point bit reversal tables */
-#define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12  )
-#define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24  )
-#define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56  )
-#define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112 )
-#define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240 )
-#define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480 )
-#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992 )
+#define ARMBITREVINDEXTABLE_FIXED___16_TABLE_LENGTH ((uint16_t)12)
+#define ARMBITREVINDEXTABLE_FIXED___32_TABLE_LENGTH ((uint16_t)24)
+#define ARMBITREVINDEXTABLE_FIXED___64_TABLE_LENGTH ((uint16_t)56)
+#define ARMBITREVINDEXTABLE_FIXED__128_TABLE_LENGTH ((uint16_t)112)
+#define ARMBITREVINDEXTABLE_FIXED__256_TABLE_LENGTH ((uint16_t)240)
+#define ARMBITREVINDEXTABLE_FIXED__512_TABLE_LENGTH ((uint16_t)480)
+#define ARMBITREVINDEXTABLE_FIXED_1024_TABLE_LENGTH ((uint16_t)992)
 #define ARMBITREVINDEXTABLE_FIXED_2048_TABLE_LENGTH ((uint16_t)1984)
 #define ARMBITREVINDEXTABLE_FIXED_4096_TABLE_LENGTH ((uint16_t)4032)
 

bsp/swm320-lq100/Libraries/CMSIS/CoreSupport/arm_const_structs.h

@@ -2,12 +2,12 @@
 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
 *
 * $Date:        31. July 2014
-* $Revision: 	V1.4.4
+* $Revision:    V1.4.4
 *
-* Project: 	    CMSIS DSP Library
-* Title:	    arm_const_structs.h
+* Project:      CMSIS DSP Library
+* Title:        arm_const_structs.h
 *
-* Description:	This file has constant structs that are initialized for
+* Description:  This file has constant structs that are initialized for
 *              user convenience.  For example, some can be given as
 *              arguments to the arm_cfft_f32() function.
 *
@@ -46,34 +46,34 @@
 #include "arm_math.h"
 #include "arm_common_tables.h"
 
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
-   extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len16;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len32;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len64;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len128;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len256;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len512;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len1024;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len2048;
+extern const arm_cfft_instance_f32 arm_cfft_sR_f32_len4096;
 
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
-   extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len16;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len32;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len64;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len128;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len256;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len512;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len1024;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len2048;
+extern const arm_cfft_instance_q31 arm_cfft_sR_q31_len4096;
 
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
-   extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len16;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len32;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len64;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len128;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len256;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len512;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len1024;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len2048;
+extern const arm_cfft_instance_q15 arm_cfft_sR_q15_len4096;
 
 #endif

bsp/swm320-lq100/Libraries/CMSIS/DeviceSupport/startup/iar/startup_SWM320.s

@@ -57,7 +57,7 @@ __vector_table
         DCD     GPIOA5_Handler
         DCD     GPIOA6_Handler
         DCD     GPIOA7_Handler
-		DCD     GPIOB0_Handler
+        DCD     GPIOB0_Handler
         DCD     GPIOB1_Handler
         DCD     GPIOB2_Handler
         DCD     GPIOB3_Handler
@@ -72,7 +72,7 @@ __vector_table
         DCD     GPIOC4_Handler
         DCD     GPIOC5_Handler
         DCD     GPIOC6_Handler
-        DCD     GPIOC7_Handler                                 
+        DCD     GPIOC7_Handler
         DCD     GPIOM0_Handler
         DCD     GPIOM1_Handler
         DCD     GPIOM2_Handler
@@ -80,25 +80,25 @@ __vector_table
         DCD     GPIOM4_Handler
         DCD     GPIOM5_Handler
         DCD     GPIOM6_Handler
-        DCD     GPIOM7_Handler                                            
-		DCD     DMA_Handler
+        DCD     GPIOM7_Handler
+        DCD     DMA_Handler
         DCD     LCD_Handler
         DCD     NORFLC_Handler
-		DCD		CAN_Handler
-        DCD     TIMR_Handler
+        DCD     CAN_Handler
+        DCD     PULSE_Handler
         DCD     WDT_Handler
         DCD     PWM_Handler
         DCD     UART0_Handler
-		DCD     UART1_Handler
-		DCD     UART2_Handler
-		DCD     UART3_Handler
-		DCD     0
-		DCD     I2C0_Handler
+        DCD     UART1_Handler
+        DCD     UART2_Handler
+        DCD     UART3_Handler
+        DCD     0
+        DCD     I2C0_Handler
         DCD     I2C1_Handler
         DCD     SPI0_Handler
         DCD     ADC0_Handler
         DCD     RTC_Handler
-        DCD     ANAC_Handler
+        DCD     BOD_Handler
         DCD     SDIO_Handler
         DCD     GPIOA_Handler
         DCD     GPIOB_Handler
@@ -108,7 +108,13 @@ __vector_table
         DCD     GPIOP_Handler
         DCD     ADC1_Handler
         DCD     FPU_Handler
-		DCD     SPI1_Handler
+        DCD     SPI1_Handler
+        DCD     TIMR0_Handler
+        DCD     TIMR1_Handler
+        DCD     TIMR2_Handler
+        DCD     TIMR3_Handler
+        DCD     TIMR4_Handler
+        DCD     TIMR5_Handler
         
 
         THUMB
@@ -345,10 +351,10 @@ NORFLC_Handler
 CAN_Handler
         B CAN_Handler
 
-        PUBWEAK TIMR_Handler
+        PUBWEAK PULSE_Handler
         SECTION .text:CODE:REORDER:NOROOT(1)
-TIMR_Handler
-        B TIMR_Handler
+PULSE_Handler
+        B PULSE_Handler
 
         PUBWEAK WDT_Handler
         SECTION .text:CODE:REORDER:NOROOT(1)
@@ -405,10 +411,10 @@ ADC0_Handler
 RTC_Handler
         B RTC_Handler
 
-        PUBWEAK ANAC_Handler
+        PUBWEAK BOD_Handler
         SECTION .text:CODE:REORDER:NOROOT(1)
-ANAC_Handler
-        B ANAC_Handler
+BOD_Handler
+        B BOD_Handler
 
         PUBWEAK SDIO_Handler
         SECTION .text:CODE:REORDER:NOROOT(1)
@@ -459,6 +465,36 @@ FPU_Handler
         SECTION .text:CODE:REORDER:NOROOT(1)
 SPI1_Handler
         B SPI1_Handler
+        
+        PUBWEAK TIMR0_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+TIMR0_Handler
+        B TIMR0_Handler
+        
+        PUBWEAK TIMR1_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+TIMR1_Handler
+        B TIMR1_Handler
+        
+        PUBWEAK TIMR2_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+TIMR2_Handler
+        B TIMR2_Handler
+        
+        PUBWEAK TIMR3_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+TIMR3_Handler
+        B TIMR3_Handler
+        
+        PUBWEAK TIMR4_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+TIMR4_Handler
+        B TIMR4_Handler
+        
+        PUBWEAK TIMR5_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+TIMR5_Handler
+        B TIMR5_Handler
 
 
         END

bsp/swm320-lq100/Libraries/CMSIS/DeviceSupport/system_SWM320.c

@@ -38,14 +38,15 @@
 #define SYS_CLK_DIV SYS_CLK_DIV_1
 
 #define __HSI (20000000UL) //高速内部时钟
-#define __LSI (32000UL) //低速内部时钟
+#define __LSI (32000UL)    //低速内部时钟
 #define __HSE (20000000UL) //高速外部时钟
 
 /********************************** PLL 设定 **********************************************
  * VCO输出频率 = PLL输入时钟 / INDIV * 4 * FBDIV
  * PLL输出频率 = PLL输入时钟 / INDIV * 4 * FBDIV / OUTDIV = VCO输出频率 / OUTDIV
+ * 注意：VCO输出频率需要在 [600MHz, 1200MHz] 之间
  *****************************************************************************************/
-#define SYS_PLL_SRC SYS_CLK_XTAL //可取值SYS_CLK_20MHz、SYS_CLK_XTAL
+#define SYS_PLL_SRC SYS_CLK_20MHz //可取值SYS_CLK_20MHz、SYS_CLK_XTAL
 
 #define PLL_IN_DIV 5
 
@@ -57,8 +58,8 @@
 
 #define PLL_OUT_DIV PLL_OUT_DIV8
 
-uint32_t SystemCoreClock = (120000000UL);         //System Clock Frequency (Core Clock)
-uint32_t CyclesPerUs = ((120000000UL) / 1000000); //Cycles per micro second
+uint32_t SystemCoreClock = __HSI;         //System Clock Frequency (Core Clock)
+uint32_t CyclesPerUs = (__HSI / 1000000); //Cycles per micro second
 
 /******************************************************************************************************************************************
 * 函数名称:
@@ -110,6 +111,8 @@ void SystemCoreClockUpdate(void)
 
     if (SYS->CLKDIV & SYS_CLKDIV_SYS_Msk)
         SystemCoreClock /= 2;
+
+    CyclesPerUs = SystemCoreClock / 1000000;
 }
 
 /******************************************************************************************************************************************
@@ -121,56 +124,30 @@ void SystemCoreClockUpdate(void)
 ******************************************************************************************************************************************/
 void SystemInit(void)
 {
-    uint32_t i;
-
     SYS->CLKEN |= (1 << SYS_CLKEN_ANAC_Pos);
 
+    Flash_Param_at_xMHz(120);
+
     switch (SYS_CLK)
     {
     case SYS_CLK_20MHz: //0 内部高频20MHz RC振荡器
-        SYS->HRCCR = (0 << SYS_HRCCR_OFF_Pos) |
-                     (0 << SYS_HRCCR_DBL_Pos); //HRC = 20MHz
-
-        SYS->CLKSEL &= ~SYS_CLKSEL_HFCK_Msk;      //HFCK  <=  HRC
-        SYS->CLKSEL |= (1 << SYS_CLKSEL_SYS_Pos); //SYS_CLK  <= HFCK
+        switchCLK_20MHz();
         break;
 
     case SYS_CLK_40MHz: //1 内部高频40MHz RC振荡器
-        SYS->HRCCR = (0 << SYS_HRCCR_OFF_Pos) |
-                     (1 << SYS_HRCCR_DBL_Pos); //HRC = 40MHz
-
-        SYS->CLKSEL &= ~SYS_CLKSEL_HFCK_Msk;      //HFCK  <=  HRC
-        SYS->CLKSEL |= (1 << SYS_CLKSEL_SYS_Pos); //SYS_CLK  <= HFCK
+        switchCLK_40MHz();
         break;
 
     case SYS_CLK_32KHz: //2 内部低频32KHz RC振荡器
-        SYS->CLKEN |= (1 << SYS_CLKEN_RTCBKP_Pos);
-
-        SYS->LRCCR &= ~(1 << SYS_LRCCR_OFF_Pos);
-
-        for (i = 0; i < 20000; i++)
-            ;
-
-        SYS->CLKSEL &= ~SYS_CLKSEL_LFCK_Msk; //LFCK  <=  LRC
-        SYS->CLKSEL &= ~SYS_CLKSEL_SYS_Msk;  //SYS_CLK  <= LFCK
+        switchCLK_32KHz();
         break;
 
     case SYS_CLK_XTAL: //3 外部晶体振荡器（2-30MHz）
-        SYS->XTALCR = (1 << SYS_XTALCR_EN_Pos);
-
-        for (i = 0; i < 20000; i++)
-            ;
-
-        SYS->CLKSEL |= (1 << SYS_CLKSEL_HFCK_Pos); //HFCK  <=  XTAL
-        SYS->CLKSEL |= (1 << SYS_CLKSEL_SYS_Pos);  //SYS_CLK  <= HFCK
+        switchCLK_XTAL();
         break;
 
     case SYS_CLK_PLL: //4 片内锁相环输出
-        PLLInit();
-        SYS->PLLCR |= (1 << SYS_PLLCR_OUTEN_Pos);
-
-        SYS->CLKSEL |= (1 << SYS_CLKSEL_LFCK_Pos); //LFCK  <=  PLL
-        SYS->CLKSEL &= ~SYS_CLKSEL_SYS_Msk;        //SYS_CLK  <= LFCK
+        switchCLK_PLL();
         break;
     }
 
@@ -178,25 +155,114 @@ void SystemInit(void)
     SYS->CLKDIV |= (SYS_CLK_DIV << SYS_CLKDIV_SYS_Pos);
 
     SystemCoreClockUpdate();
+
+    if (SystemCoreClock > 80000000)
+    {
+        Flash_Param_at_xMHz(120);
+    }
+    else if (SystemCoreClock > 40000000)
+    {
+        Flash_Param_at_xMHz(80);
+    }
+    else if (SystemCoreClock > 30000000)
+    {
+        Flash_Param_at_xMHz(40);
+    }
+    else
+    {
+        Flash_Param_at_xMHz(30);
+    }
 }
 
-void PLLInit(void)
+static void delay_3ms(void)
 {
     uint32_t i;
 
+    if (((SYS->CLKSEL & SYS_CLKSEL_SYS_Msk) == 0) &&
+        ((SYS->CLKSEL & SYS_CLKSEL_LFCK_Msk) == 0)) //32KHz
+    {
+        for (i = 0; i < 20; i++)
+            __NOP();
+    }
+    else
+    {
+        for (i = 0; i < 20000; i++)
+            __NOP();
+    }
+}
+
+void switchCLK_20MHz(void)
+{
+    SYS->HRCCR = (0 << SYS_HRCCR_OFF_Pos) |
+                 (0 << SYS_HRCCR_DBL_Pos); //HRC = 20MHz
+
+    delay_3ms();
+
+    SYS->CLKSEL &= ~SYS_CLKSEL_HFCK_Msk;      //HFCK  <=  HRC
+    SYS->CLKSEL |= (1 << SYS_CLKSEL_SYS_Pos); //SYS_CLK  <= HFCK
+}
+
+void switchCLK_40MHz(void)
+{
+    SYS->HRCCR = (0 << SYS_HRCCR_OFF_Pos) |
+                 (1 << SYS_HRCCR_DBL_Pos); //HRC = 40MHz
+
+    delay_3ms();
+
+    SYS->CLKSEL &= ~SYS_CLKSEL_HFCK_Msk;      //HFCK  <=  HRC
+    SYS->CLKSEL |= (1 << SYS_CLKSEL_SYS_Pos); //SYS_CLK  <= HFCK
+}
+
+void switchCLK_32KHz(void)
+{
+    SYS->CLKEN |= (1 << SYS_CLKEN_RTCBKP_Pos);
+
+    SYS->LRCCR &= ~(1 << SYS_LRCCR_OFF_Pos);
+
+    delay_3ms();
+
+    SYS->CLKSEL &= ~SYS_CLKSEL_LFCK_Msk; //LFCK  <=  LRC
+    SYS->CLKSEL &= ~SYS_CLKSEL_SYS_Msk;  //SYS_CLK  <= LFCK
+}
+
+void switchCLK_XTAL(void)
+{
+    SYS->XTALCR = (1 << SYS_XTALCR_EN_Pos);
+
+    delay_3ms();
+    delay_3ms();
+
+    SYS->CLKSEL |= (1 << SYS_CLKSEL_HFCK_Pos); //HFCK  <=  XTAL
+    SYS->CLKSEL |= (1 << SYS_CLKSEL_SYS_Pos);  //SYS_CLK  <= HFCK
+}
+
+void switchCLK_PLL(void)
+{
+    PLLInit();
+
+    SYS->PLLCR |= (1 << SYS_PLLCR_OUTEN_Pos);
+
+    SYS->CLKSEL |= (1 << SYS_CLKSEL_LFCK_Pos); //LFCK  <=  PLL
+    SYS->CLKSEL &= ~SYS_CLKSEL_SYS_Msk;        //SYS_CLK  <= LFCK
+}
+
+void PLLInit(void)
+{
     if (SYS_PLL_SRC == SYS_CLK_20MHz)
     {
         SYS->HRCCR = (0 << SYS_HRCCR_OFF_Pos) |
                      (0 << SYS_HRCCR_DBL_Pos); //HRC = 20MHz
 
+        delay_3ms();
+
         SYS->PLLCR |= (1 << SYS_PLLCR_INSEL_Pos); //PLL_SRC <= HRC
     }
     else if (SYS_PLL_SRC == SYS_CLK_XTAL)
     {
         SYS->XTALCR = (1 << SYS_XTALCR_EN_Pos);
 
-        for (i = 0; i < 20000; i++)
-            ;
+        delay_3ms();
+        delay_3ms();
 
         SYS->PLLCR &= ~(1 << SYS_PLLCR_INSEL_Pos); //PLL_SRC <= XTAL
     }

bsp/swm320-lq100/Libraries/CMSIS/DeviceSupport/system_SWM320.h

@@ -2,20 +2,24 @@
 #define __SYSTEM_SWM320_H__
 
 #ifdef __cplusplus
-extern "C" {
+extern "C"
+{
 #endif
 
+    extern uint32_t SystemCoreClock; // System Clock Frequency (Core Clock)
+    extern uint32_t CyclesPerUs;     // Cycles per micro second
 
-extern uint32_t SystemCoreClock;        // System Clock Frequency (Core Clock)
-extern uint32_t CyclesPerUs;            // Cycles per micro second
+    extern void SystemInit(void);
 
+    extern void SystemCoreClockUpdate(void);
 
-extern void SystemInit(void);
-
-extern void SystemCoreClockUpdate(void);
-
-extern void PLLInit(void);
+    extern void switchCLK_20MHz(void);
+    extern void switchCLK_40MHz(void);
+    extern void switchCLK_32KHz(void);
+    extern void switchCLK_XTAL(void);
+    extern void switchCLK_PLL(void);
 
+    extern void PLLInit(void);
 
 #ifdef __cplusplus
 }

bsp/swm320-lq100/Libraries/SWM320_StdPeriph_Driver/SWM320_adc.h

@@ -3,13 +3,14 @@
 
 typedef struct
 {
-    uint8_t clk_src;  //ADC转换时钟源：ADC_CLKSRC_HRC、ADC_CLKSRC_VCO_DIV16、ADC_CLKSRC_VCO_DIV32、ADC_CLKSRC_VCO_DIV32
-    uint8_t clk_div;  //ADC转换时钟分频，取值1--31
-    uint8_t channels; //ADC转换通道选中，ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算）
-    uint8_t samplAvg; //采样取平均，触发启动ADC转换后，ADC在一个通道上连续采样、转换多次，并将它们的平均值作为该通道转换结果
-    uint8_t trig_src; //ADC触发方式：ADC_TRIGSRC_SW、ADC_TRIGSRC_PWM、ADC_TRIGSRC_TIMR2、ADC_TRIGSRC_TIMR3
-    uint8_t Continue; //在软件触发模式下：1 连续转换模式，启动后一直采样、转换，直到软件清除START位
-    //                  0 单次转换模式，转换完成后START位自动清除停止转换
+    uint8_t clk_src;   //ADC转换时钟源：ADC_CLKSRC_HRC、ADC_CLKSRC_VCO_DIV16、ADC_CLKSRC_VCO_DIV32、ADC_CLKSRC_VCO_DIV32
+    uint8_t clk_div;   //ADC转换时钟分频，取值1--31
+    uint8_t pga_ref;   //PGA基准：PGA_REF_INTERNAL、PGA_REF_EXTERNAL
+    uint8_t channels;  //ADC转换通道选中，ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算）
+    uint8_t samplAvg;  //采样取平均，触发启动ADC转换后，ADC在一个通道上连续采样、转换多次，并将它们的平均值作为该通道转换结果
+    uint8_t trig_src;  //ADC触发方式：ADC_TRIGSRC_SW、ADC_TRIGSRC_PWM、ADC_TRIGSRC_TIMR2、ADC_TRIGSRC_TIMR3
+    uint8_t Continue;  //在软件触发模式下：1 连续转换模式，启动后一直采样、转换，直到软件清除START位
+                       //                  0 单次转换模式，转换完成后START位自动清除停止转换
     uint8_t EOC_IEn;   //EOC中断使能，可针对每个通道设置，其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算）
     uint8_t OVF_IEn;   //OVF中断使能，可针对每个通道设置，其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算）
     uint8_t HFULL_IEn; //FIFO半满中断使能，可针对每个通道设置，其有效值为ADC_CH0、ADC_CH1、... ... 、ADC_CH7及其组合（即“按位或”运算）
@@ -39,8 +40,8 @@ typedef struct
 #define ADC_TRIGSRC_SW 0 //软件触发，即ADC->START.GO写1启动转换
 #define ADC_TRIGSRC_PWM 1
 
-#define PGA_VCM_INTERNAL 1 //PGA输入共模电平由内部电路产生，ADC_REFP和ADC_REFN可悬空
-#define PGA_VCM_EXTERNAL 0 //PGA输入共模电平由外部引脚提供，(ADC_REFP + ADC_REFN) 电平值须与量程相同
+#define PGA_REF_INTERNAL 1 //PGA输入共模电平由内部电路产生，ADC_REFP和ADC_REFN可悬空
+#define PGA_REF_EXTERNAL 0 //PGA输入共模电平由外部引脚提供，(ADC_REFP + ADC_REFN) 电平值须与量程相同
 
 void ADC_Init(ADC_TypeDef *ADCx, ADC_InitStructure *initStruct); //ADC模数转换器初始化
 void ADC_Open(ADC_TypeDef *ADCx);                                //ADC开启，可以软件启动、或硬件触发ADC转换
@@ -73,11 +74,4 @@ void ADC_IntFULLDis(ADC_TypeDef *ADCx, uint32_t chn);      //FIFO满中断禁止
 void ADC_IntFULLClr(ADC_TypeDef *ADCx, uint32_t chn);      //FIFO满中断标志清除
 uint32_t ADC_IntFULLStat(ADC_TypeDef *ADCx, uint32_t chn); //FIFO满中断状态
 
-/* ADC 内部 1.2V REFP电压输出到外部REFP引脚，用于测量，或在需要1.2V外部REFP时节省成本 */
-#define ADC_TEST_INNER_REFP_OUT_EN(ADCx) (ADCx->CTRL3 |= (1 << ADC_CTRL3_REFP_OUT_Pos))
-#define ADC_TEST_INNER_REFP_OUT_DIS(ADCx) (ADCx->CTRL3 &= ~(1 << ADC_CTRL3_REFP_OUT_Pos))
-
-#define ADC_TEST_ADC_PGA_EXT_VCM_EN(ADCx) (ADCx->CTRL3 |= (1 << ADC_CTRL3_EXTVCM_Pos))
-#define ADC_TEST_ADC_PGA_EXT_VCM_DIS(ADCx) (ADCx->CTRL3 &= ~(1 << ADC_CTRL3_EXTVCM_Pos))
-
 #endif //__SWM320_ADC_H__

bsp/swm320-lq100/Libraries/SWM320_StdPeriph_Driver/SWM320_flash.h

 #ifndef __SWM320_FLASH_H__
 #define __SWM320_FLASH_H__
 
-
 void FLASH_Erase(uint32_t addr);
-void FLASH_Write(uint32_t addr, uint32_t buff[], uint32_t size);
+void FLASH_Write(uint32_t addr, uint32_t buff[], uint32_t count);
+
+void Flash_Param_at_xMHz(uint32_t x);
+
+typedef void (*IAP_Cache_Reset_t)(void);
+typedef void (*IAP_Flash_Param_t)(uint32_t cfg0, uint32_t cfg1);
+typedef void (*IAP_Flash_Erase_t)(uint32_t sector);
+typedef void (*IAP_Flash_Write_t)(uint32_t flash_addr, uint32_t ram_addr, uint32_t count);
 
+extern IAP_Cache_Reset_t IAP_Cache_Reset;
+extern IAP_Flash_Param_t IAP_Flash_Param;
+extern IAP_Flash_Erase_t IAP_Flash_Erase;
+extern IAP_Flash_Write_t IAP_Flash_Write;
 
 #endif //__SWM320_FLASH_H__