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b25e602a
编写于
5月 13, 2015
作者:
肉肉_Alex
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
fix a eth driver bug to avoid crush
fix a eth driver bug to avoid crush
上级
a58078d1
变更
17
展开全部
隐藏空白更改
内联
并排
Showing
17 changed file
with
10672 addition
and
9239 deletion
+10672
-9239
bsp/CME_M7/StdPeriph_Driver/inc/cmem7.h
bsp/CME_M7/StdPeriph_Driver/inc/cmem7.h
+8014
-8014
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_conf.h
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_conf.h
+7
-7
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_eth.h
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_eth.h
+417
-417
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_flash.h
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_flash.h
+8
-8
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_gpio.h
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_gpio.h
+11
-11
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_includes.h
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_includes.h
+10
-10
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_misc.h
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_misc.h
+276
-276
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_rtc.h
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_rtc.h
+89
-89
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_wdg.h
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_wdg.h
+110
-110
bsp/CME_M7/StdPeriph_Driver/src/cmem7_flash.c
bsp/CME_M7/StdPeriph_Driver/src/cmem7_flash.c
+6
-3
bsp/CME_M7/StdPeriph_Driver/src/cmem7_gpio.c
bsp/CME_M7/StdPeriph_Driver/src/cmem7_gpio.c
+75
-0
bsp/CME_M7/StdPeriph_Driver/src/cmem7_misc.c
bsp/CME_M7/StdPeriph_Driver/src/cmem7_misc.c
+45
-1
bsp/CME_M7/StdPeriph_Driver/src/cmem7_rtc.c
bsp/CME_M7/StdPeriph_Driver/src/cmem7_rtc.c
+5
-5
bsp/CME_M7/StdPeriph_Driver/src/cmem7_wdg.c
bsp/CME_M7/StdPeriph_Driver/src/cmem7_wdg.c
+11
-6
bsp/CME_M7/drivers/emac.c
bsp/CME_M7/drivers/emac.c
+17
-17
bsp/CME_M7/project.uvopt
bsp/CME_M7/project.uvopt
+1517
-10
bsp/CME_M7/project.uvproj
bsp/CME_M7/project.uvproj
+54
-255
未找到文件。
bsp/CME_M7/StdPeriph_Driver/inc/cmem7.h
浏览文件 @
b25e602a
此差异已折叠。
点击以展开。
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_conf.h
浏览文件 @
b25e602a
...
...
@@ -43,12 +43,12 @@
#define _TIM
#define _UART
#define _USB
#define _WDG
#define _WDG
//#define _MARVELL
//#define _IP1826D
#define _M7NORFLASH
#define _ME_6095_F
//#define _MARVELL
//#define _IP1826D
#define _M7NORFLASH
#define _ME_6095_F
#define USE_FULL_ASSERT 1
...
...
@@ -76,8 +76,8 @@ typedef enum _BOOL {FALSE = 0, TRUE = 1} BOOL;
/**
* System clock frequency, unit is Hz.
*/
#define SYSTEM_CLOCK_FREQ 300000000
//250000000
#define SYSTEM_CLOCK_FREQ 300000000
//250000000
//300000000
/**
...
...
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_eth.h
浏览文件 @
b25e602a
此差异已折叠。
点击以展开。
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_flash.h
浏览文件 @
b25e602a
...
...
@@ -200,14 +200,14 @@ void FLASH_Read(uint8_t ReadMode, uint32_t addr, uint16_t size, uint8_t* data);
* @param[out] data A pointer to the data to be written
* @retval None
*/
void
FLASH_Write
(
uint32_t
addr
,
uint16_t
size
,
uint8_t
*
data
);
void
flash_WaitInWritting
(
void
)
;
void
flash_WaitReadFifoNotEmpty
(
void
);
uint16_t
flash_ReadFifo
(
uint16_t
size
,
uint8_t
*
data
)
;
void
FLASH_Write
(
uint32_t
addr
,
uint16_t
size
,
uint8_t
*
data
);
void
flash_WaitInWritting
(
void
)
;
void
flash_WaitReadFifoNotEmpty
(
void
);
uint16_t
flash_ReadFifo
(
uint16_t
size
,
uint8_t
*
data
)
;
#ifdef __cplusplus
...
...
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_gpio.h
浏览文件 @
b25e602a
...
...
@@ -139,17 +139,17 @@ void GPIO_InitPwm(uint8_t Channel, uint32_t HighLevelNanoSecond, uint32_t LowLev
* @retval None
*/
void
GPIO_EnablePwm
(
uint8_t
Channel
,
BOOL
Enable
);
/**
xjf 20150324
**/
void
GPIO_SetBits
(
uint32_t
mask
);
void
GPIO_clrBits
(
uint32_t
mask
);
uint32_t
GPIO_getBits
(
uint32_t
mask
);
/**
xjf 20150324
**/
void
GPIO_SetBits
(
uint32_t
mask
);
void
GPIO_clrBits
(
uint32_t
mask
);
uint32_t
GPIO_getBits
(
uint32_t
mask
);
#ifdef __cplusplus
}
...
...
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_includes.h
浏览文件 @
b25e602a
...
...
@@ -101,16 +101,16 @@
#ifdef _WDG
#include "cmem7_wdg.h"
#endif
#ifdef _MARVELL
#include <marvel_98dx242.h>
#include <s24g_i2c.h>
#endif
#ifdef _IP1826D
#include <ip1826d_v00.h>
#endif
#ifdef _MARVELL
#include <marvel_98dx242.h>
#include <s24g_i2c.h>
#endif
#ifdef _IP1826D
#include <ip1826d_v00.h>
#endif
#ifdef __cplusplus
}
...
...
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_misc.h
浏览文件 @
b25e602a
此差异已折叠。
点击以展开。
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_rtc.h
浏览文件 @
b25e602a
/**
*****************************************************************************
* @file cmem7_rtc.h
*
* @brief CMEM7 RTC header file
*
*
* @version V1.0
* @date 3. September 2013
*
* @note
*
*****************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, CAPITAL-MICRO SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>© COPYRIGHT 2013 Capital-micro </center></h2>
*****************************************************************************
*/
#ifndef __CMEM7_RTC_H
#define __CMEM7_RTC_H
#ifdef __cplusplus
extern
"C"
{
#endif
#include "cmem7.h"
#include "cmem7_conf.h"
/** @defgroup RTC_Int
* @{
*/
#define RTC_Int_Second ((uint32_t)0x00000001)
#define RTC_Int_Millsecond ((uint32_t)0x00000002)
#define RTC_Int_All ((uint32_t)0x00000003)
#define IS_RTC_INT(INT) (((INT) != 0) && (((INT) & ~RTC_Int_All) == 0))
/**
* @}
*/
/**
* @brief Enable or disable RTC interrupt.
* @param[in] Int interrupt mask bits, which can be the combination of @ref RTC_Int
* @param[in] Enable The bit indicates if specific interrupts are enable or not
* @retval None
*/
void
RTC_ITConfig
(
uint32_t
Int
,
BOOL
Enable
);
/**
* @brief Check specific interrupts are set or not
* @param[in] Int interrupt mask bits, which can be the combination of @ref RTC_Int
* @retval BOOL The bit indicates if specific interrupts are set or not
*/
BOOL
RTC_GetITStatus
(
uint32_t
Int
);
/**
* @brief Clear specific interrupts
* @param[in] Int interrupt mask bits, which can be the combination of @ref RTC_Int
* @retval None
*/
void
RTC_ClearITPendingBit
(
uint32_t
Int
);
/**
* @brief Get seconds since power up
* @param None
* @retval uint32_t Seconds since power up
*/
uint32_t
RTC_GetSecond
(
void
);
/**
* @brief Get current millseconds
* @param None
* @retval uint32_t Current millseconds
*/
uint16_t
RTC_GetMillSecond
(
void
);
#ifdef __cplusplus
}
#endif
#endif
/* __CMEM7_RTC_H */
/**
*****************************************************************************
* @file cmem7_rtc.h
*
* @brief CMEM7 RTC header file
*
*
* @version V1.0
* @date 3. September 2013
*
* @note
*
*****************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, CAPITAL-MICRO SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>© COPYRIGHT 2013 Capital-micro </center></h2>
*****************************************************************************
*/
#ifndef __CMEM7_RTC_H
#define __CMEM7_RTC_H
#ifdef __cplusplus
extern
"C"
{
#endif
#include "cmem7.h"
#include "cmem7_conf.h"
/** @defgroup RTC_Int
* @{
*/
#define RTC_Int_Second ((uint32_t)0x00000001)
#define RTC_Int_Millsecond ((uint32_t)0x00000002)
#define RTC_Int_All ((uint32_t)0x00000003)
#define IS_RTC_INT(INT) (((INT) != 0) && (((INT) & ~RTC_Int_All) == 0))
/**
* @}
*/
/**
* @brief Enable or disable RTC interrupt.
* @param[in] Int interrupt mask bits, which can be the combination of @ref RTC_Int
* @param[in] Enable The bit indicates if specific interrupts are enable or not
* @retval None
*/
void
RTC_ITConfig
(
uint32_t
Int
,
BOOL
Enable
);
/**
* @brief Check specific interrupts are set or not
* @param[in] Int interrupt mask bits, which can be the combination of @ref RTC_Int
* @retval BOOL The bit indicates if specific interrupts are set or not
*/
BOOL
RTC_GetITStatus
(
uint32_t
Int
);
/**
* @brief Clear specific interrupts
* @param[in] Int interrupt mask bits, which can be the combination of @ref RTC_Int
* @retval None
*/
void
RTC_ClearITPendingBit
(
uint32_t
Int
);
/**
* @brief Get seconds since power up
* @param None
* @retval uint32_t Seconds since power up
*/
uint32_t
RTC_GetSecond
(
void
);
/**
* @brief Get current millseconds
* @param None
* @retval uint32_t Current millseconds
*/
uint16_t
RTC_GetMillSecond
(
void
);
#ifdef __cplusplus
}
#endif
#endif
/* __CMEM7_RTC_H */
bsp/CME_M7/StdPeriph_Driver/inc/cmem7_wdg.h
浏览文件 @
b25e602a
/**
*****************************************************************************
* @file cmem7_wdg.h
*
* @brief CMEM7 watchdog header file
*
*
* @version V1.0
* @date 3. September 2013
*
* @note
*
*****************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, CAPITAL-MICRO SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>© COPYRIGHT 2013 Capital-micro </center></h2>
*****************************************************************************
*/
#ifndef __CMEM7_WDG_H
#define __CMEM7_WDG_H
#ifdef __cplusplus
extern
"C"
{
#endif
#include "cmem7.h"
#include "cmem7_conf.h"
/** @defgroup WDG_INT
* @{
*/
#define WDG_INT_QUARTER 0
#define WDG_INT_HALF 1
#define IS_WDG_INT(INT) (((INT) == WDG_INT_QUARTER) || \
((
INT
)
==
WDG_INT_HALF
))
/**
* @}
*/
/** @defgroup WDG_TRIGGER_MODE
* @{
*/
#define WDG_TRIGGER_MODE_EDGE 0
#define WDG_TRIGGER_MODE_LEVEL 1
#define IS_WDG_TRIGGER_MODE(TRI) (((TRI) == WDG_TRIGGER_MODE_EDGE) || \
((
TRI
)
==
WDG_TRIGGER_MODE_LEVEL
))
/**
* @}
*/
/**
* @brief Deinitializes the Watchdog peripheral registers to their default reset values.
* @param[in] None
* @retval None
*/
void
WDG_DeInit
(
void
);
/**
* @brief Watchdog initialization
* @note This function should be called at first before any other interfaces.
* @param[in] trigger Watchdog interrupt trigger mode, which is a value of @ref WDG_TRIGGER_MODE
* @param[in] ResetMillSecond MillSeconds lasts before global reset
* @retval None
*/
void
WDG_Init
(
uint8_t
trigger
,
uint16_t
ResetMillSecond
);
/**
* @brief Enable or disable watchdog interrupt.
* @param[in] Int interrupt mask bits, which is a value of @ref WDG_INT
* @param[in] Enable The bit indicates if the specific interrupt are enable or not
* @retval None
*/
void
WDG_ITConfig
(
uint8_t
Int
,
BOOL
Enable
);
/**
* @brief Check the specific interrupt are set or not
* @param None
* @retval BOOL The bit indicates if the specific interrupt are set or not
*/
BOOL
WDG_GetITStatus
(
void
);
/**
* @brief Clear the specific interrupt
* @param None
* @retval None
*/
void
WDG_ClearITPendingBit
(
void
);
/**
* @brief Enable or disable watchdog.
* @param[in] Enable The bit indicates if watchdog is enable or not
* @retval None
*/
void
WDG_Cmd
(
BOOL
Enable
);
#ifdef __cplusplus
}
#endif
#endif
/* __CMEM7_WDG_H */
/**
*****************************************************************************
* @file cmem7_wdg.h
*
* @brief CMEM7 watchdog header file
*
*
* @version V1.0
* @date 3. September 2013
*
* @note
*
*****************************************************************************
* @attention
*
* THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
* WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
* TIME. AS A RESULT, CAPITAL-MICRO SHALL NOT BE HELD LIABLE FOR ANY DIRECT,
* INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
* FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
* CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
*
* <h2><center>© COPYRIGHT 2013 Capital-micro </center></h2>
*****************************************************************************
*/
#ifndef __CMEM7_WDG_H
#define __CMEM7_WDG_H
#ifdef __cplusplus
extern
"C"
{
#endif
#include "cmem7.h"
#include "cmem7_conf.h"
/** @defgroup WDG_INT
* @{
*/
#define WDG_INT_QUARTER 0
#define WDG_INT_HALF 1
#define IS_WDG_INT(INT) (((INT) == WDG_INT_QUARTER) || \
((INT) == WDG_INT_HALF))
/**
* @}
*/
/** @defgroup WDG_TRIGGER_MODE
* @{
*/
#define WDG_TRIGGER_MODE_EDGE 0
#define WDG_TRIGGER_MODE_LEVEL 1
#define IS_WDG_TRIGGER_MODE(TRI) (((TRI) == WDG_TRIGGER_MODE_EDGE) || \
((TRI) == WDG_TRIGGER_MODE_LEVEL))
/**
* @}
*/
/**
* @brief Deinitializes the Watchdog peripheral registers to their default reset values.
* @param[in] None
* @retval None
*/
void
WDG_DeInit
(
void
);
/**
* @brief Watchdog initialization
* @note This function should be called at first before any other interfaces.
* @param[in] trigger Watchdog interrupt trigger mode, which is a value of @ref WDG_TRIGGER_MODE
* @param[in] ResetMillSecond MillSeconds lasts before global reset
* @retval None
*/
void
WDG_Init
(
uint8_t
trigger
,
uint16_t
ResetMillSecond
);
/**
* @brief Enable or disable watchdog interrupt.
* @param[in] Int interrupt mask bits, which is a value of @ref WDG_INT
* @param[in] Enable The bit indicates if the specific interrupt are enable or not
* @retval None
*/
void
WDG_ITConfig
(
uint8_t
Int
,
BOOL
Enable
);
/**
* @brief Check the specific interrupt are set or not
* @param None
* @retval BOOL The bit indicates if the specific interrupt are set or not
*/
BOOL
WDG_GetITStatus
(
void
);
/**
* @brief Clear the specific interrupt
* @param None
* @retval None
*/
void
WDG_ClearITPendingBit
(
void
);
/**
* @brief Enable or disable watchdog.
* @param[in] Enable The bit indicates if watchdog is enable or not
* @retval None
*/
void
WDG_Cmd
(
BOOL
Enable
);
#ifdef __cplusplus
}
#endif
#endif
/* __CMEM7_WDG_H */
bsp/CME_M7/StdPeriph_Driver/src/cmem7_flash.c
浏览文件 @
b25e602a
...
...
@@ -108,7 +108,8 @@ static uint8_t flash_ReadInnerStatusHigh() {
return
(
uint8_t
)
NOR_FLASH
->
DATA
;
}
static
void
flash_WaitInWritting
()
{
//static void flash_WaitInWritting() {
void
flash_WaitInWritting
(
void
)
{
FLASH_INNER_STATUS
s
;
while
(
NOR_FLASH
->
STATUS_b
.
BUSY
);
...
...
@@ -173,7 +174,8 @@ static void flash_RwReq(uint8_t cmd, uint32_t addr, uint16_t size) {
NOR_FLASH
->
TRIGGER_b
.
OP_START
=
TRUE
;
}
static
void
flash_WaitReadFifoNotEmpty
()
{
//static void flash_WaitReadFifoNotEmpty() {
void
flash_WaitReadFifoNotEmpty
(
void
)
{
while
(
NOR_FLASH
->
STATUS_b
.
RD_FIFO_EMPTY
)
{
if
(
wait
)
{
(
*
wait
)();
...
...
@@ -181,7 +183,8 @@ static void flash_WaitReadFifoNotEmpty() {
}
}
static
uint16_t
flash_ReadFifo
(
uint16_t
size
,
uint8_t
*
data
)
{
//static uint16_t flash_ReadFifo(uint16_t size, uint8_t* data) {
uint16_t
flash_ReadFifo
(
uint16_t
size
,
uint8_t
*
data
)
{
uint16_t
count
=
0
;
while
(
!
NOR_FLASH
->
STATUS_b
.
RD_FIFO_EMPTY
&&
size
!=
0
)
{
...
...
bsp/CME_M7/StdPeriph_Driver/src/cmem7_gpio.c
浏览文件 @
b25e602a
...
...
@@ -179,3 +179,78 @@ void GPIO_EnablePwm(uint8_t Channel, BOOL Enable) {
}
}
/**
xjf 20150324
**/
void
GPIO_SetBits
(
uint32_t
mask
)
{
static
uint32_t
g_GPIO_OUT_UNMASK
;
static
uint32_t
g_GPIO_OUT_DATA
;
static
uint32_t
g_GPIO_OE
;
g_GPIO_OUT_UNMASK
=
GPIO
->
GPIO_OUT_UNMASK
;
g_GPIO_OUT_DATA
=
GPIO
->
GPIO_OUT_DATA
;
g_GPIO_OE
=
GPIO
->
GPIO_OE
;
g_GPIO_OUT_UNMASK
|=
mask
;
g_GPIO_OE
|=
mask
;
g_GPIO_OUT_DATA
|=
mask
;
GPIO
->
GPIO_OUT_UNMASK
=
g_GPIO_OUT_UNMASK
;
GPIO
->
GPIO_OUT_DATA
=
g_GPIO_OUT_DATA
;
GPIO
->
GPIO_OE
=
g_GPIO_OE
;
}
void
GPIO_clrBits
(
uint32_t
mask
)
{
static
uint32_t
g_GPIO_OUT_UNMASK
;
static
uint32_t
g_GPIO_OUT_DATA
;
static
uint32_t
g_GPIO_OE
;
g_GPIO_OUT_UNMASK
=
GPIO
->
GPIO_OUT_UNMASK
;
g_GPIO_OUT_DATA
=
GPIO
->
GPIO_OUT_DATA
;
g_GPIO_OE
=
GPIO
->
GPIO_OE
;
g_GPIO_OUT_UNMASK
|=
mask
;
g_GPIO_OE
|=
mask
;
g_GPIO_OUT_DATA
&=
(
~
mask
);
GPIO
->
GPIO_OUT_UNMASK
=
g_GPIO_OUT_UNMASK
;
GPIO
->
GPIO_OUT_DATA
=
g_GPIO_OUT_DATA
;
GPIO
->
GPIO_OE
=
g_GPIO_OE
;
}
uint32_t
GPIO_getBits
(
uint32_t
mask
)
{
static
uint32_t
g_GPIO_OUT_UNMASK
;
//static uint32_t g_GPIO_OUT_DATA;
static
uint32_t
g_GPIO_OE
;
uint32_t
get_delay
=
0
;
uint32_t
saved_mask
;
saved_mask
=
mask
;
g_GPIO_OUT_UNMASK
=
GPIO
->
GPIO_OUT_UNMASK
;
g_GPIO_OE
=
GPIO
->
GPIO_OE
;
g_GPIO_OUT_UNMASK
&=
(
~
mask
);
g_GPIO_OE
&=
(
~
mask
);
GPIO
->
GPIO_OUT_UNMASK
=
g_GPIO_OUT_UNMASK
;
GPIO
->
GPIO_OE
=
g_GPIO_OE
;
for
(
get_delay
=
0
;
get_delay
<
100
;
get_delay
++
)
{
}
//get_delay=(GPIO->GPIO_IN)&saved_mask;
if
(((
GPIO
->
GPIO_IN
)
&
saved_mask
)
==
saved_mask
)
{
return
(
1
);
}
else
{
return
(
0
);
}
}
/**
xjf 20150324
**/
bsp/CME_M7/StdPeriph_Driver/src/cmem7_misc.c
浏览文件 @
b25e602a
...
...
@@ -92,8 +92,20 @@ void NVIC_SystemLPConfig(uint8_t LowPowerMode, BOOL NewState)
}
}
#define DEF_IBUS_OFFSET 0x1FFE0000
#define DEF_EXT_ADDR 0x08020000
static
BOOL
isMappingOn
()
{
/* If default values aren't changed */
if
((
GLOBAL_CTRL
->
IBUSOFF
==
DEF_IBUS_OFFSET
)
&&
(
GLOBAL_CTRL
->
EXTADDR
==
DEF_EXT_ADDR
))
{
return
FALSE
;
}
return
TRUE
;
}
void
GLB_MMAP
(
uint32_t
from
,
uint32_t
to
,
BOOL
isIcacheOn
)
{
int
n
;
volatile
int
n
;
GLOBAL_CTRL
->
IBUSOFF
=
GLOBAL_CTRL
->
DBUSOFF
=
(
from
-
to
);
GLOBAL_CTRL
->
EXTADDR
=
to
;
...
...
@@ -104,6 +116,38 @@ void GLB_MMAP(uint32_t from, uint32_t to, BOOL isIcacheOn) {
for
(
n
=
0
;
n
<
100
;
n
++
);
}
/*
* ------------------------------------------------------------------
* | 0 - 0x20000 | --> 0x20000000 | -> 0x40000000 | -> 0xFFFFFFFF |
* | code SRAM | map to region | data SRAM | map from region |
* ------------------------------------------------------------------
*/
#define MAPPING_FROM_REGION_START 0x40000000
#define MAPPING_TO_REGION_END 0x20000000
uint32_t
GLB_ConvertToMappingFromAddr
(
uint32_t
to
)
{
if
(
!
isMappingOn
())
{
return
to
;
}
if
((
to
>
MAPPING_TO_REGION_END
)
||
(
to
<
GLOBAL_CTRL
->
EXTADDR
))
{
return
to
;
}
return
(
to
+
GLOBAL_CTRL
->
IBUSOFF
);
}
uint32_t
GLB_ConvertToMappingToAddr
(
uint32_t
from
)
{
if
(
!
isMappingOn
())
{
return
from
;
}
if
(
from
<
MAPPING_FROM_REGION_START
)
{
return
from
;
}
return
(
from
-
GLOBAL_CTRL
->
IBUSOFF
);
}
void
GLB_SetNmiIrqNum
(
uint32_t
irq
)
{
GLOBAL_CTRL
->
NMI_SEL_b
.
NMI
=
irq
;
}
...
...
bsp/CME_M7/StdPeriph_Driver/src/cmem7_rtc.c
浏览文件 @
b25e602a
...
...
@@ -28,7 +28,7 @@
#define SECONDS_IN_A_DAY (86400)
void
RTC_
EnableInt
(
uint32_t
Int
,
BOOL
Enable
)
{
void
RTC_
ITConfig
(
uint32_t
Int
,
BOOL
Enable
)
{
assert_param
(
IS_RTC_INT
(
Int
));
if
(
Enable
)
{
...
...
@@ -38,7 +38,7 @@ void RTC_EnableInt(uint32_t Int, BOOL Enable) {
}
}
BOOL
RTC_GetI
nt
Status
(
uint32_t
Int
)
{
BOOL
RTC_GetI
T
Status
(
uint32_t
Int
)
{
assert_param
(
IS_RTC_INT
(
Int
));
if
(
0
!=
(
RTC
->
INT_STATUS
&
Int
))
{
...
...
@@ -48,7 +48,7 @@ BOOL RTC_GetIntStatus(uint32_t Int) {
return
FALSE
;
}
void
RTC_ClearI
n
t
(
uint32_t
Int
)
{
void
RTC_ClearI
TPendingBi
t
(
uint32_t
Int
)
{
assert_param
(
IS_RTC_INT
(
Int
));
RTC
->
INT_STATUS
=
Int
;
...
...
@@ -58,6 +58,6 @@ uint32_t RTC_GetSecond() {
return
RTC
->
SECOND
;
}
uint16_t
RTC_GetMi
cro
Second
()
{
return
RTC
->
MI
CRO
SECOND_b
.
MS
;
uint16_t
RTC_GetMi
ll
Second
()
{
return
RTC
->
MI
LL
SECOND_b
.
MS
;
}
bsp/CME_M7/StdPeriph_Driver/src/cmem7_wdg.c
浏览文件 @
b25e602a
...
...
@@ -30,29 +30,34 @@ static uint32_t wdg_GetClock() {
return
SYSTEM_CLOCK_FREQ
/
(
1
<<
(
GLOBAL_CTRL
->
CLK_SEL_0_b
.
WDG_CLK
+
1
));
}
void
WDG_Init
(
uint8_t
trigger
,
uint16_t
ResetMicroSecond
)
{
void
WDG_DeInit
(
void
){
SOFT_RESET
->
SOFTRST_b
.
WDT_n
=
0
;
SOFT_RESET
->
SOFTRST_b
.
WDT_n
=
1
;
}
void
WDG_Init
(
uint8_t
trigger
,
uint16_t
ResetMillSecond
)
{
assert_param
(
IS_WDG_TRIGGER_MODE
(
trigger
));
WDG
->
INT_CTRL_b
.
TRIGGER_MODE
=
trigger
;
WDG
->
LEN
=
((
uint64_t
)
wdg_GetClock
())
*
ResetMi
cro
Second
/
1000
;
WDG
->
LEN
=
((
uint64_t
)
wdg_GetClock
())
*
ResetMi
ll
Second
/
1000
;
}
void
WDG_
EnableInt
(
uint8_t
Int
,
BOOL
Enable
)
{
void
WDG_
ITConfig
(
uint8_t
Int
,
BOOL
Enable
)
{
assert_param
(
IS_WDG_INT
(
Int
));
WDG
->
CTRL_b
.
INT_LEN
=
Int
;
WDG
->
INT_CTRL_b
.
MASK
=
!
Enable
;
}
BOOL
WDG_GetI
nt
Status
()
{
BOOL
WDG_GetI
T
Status
()
{
return
(
WDG
->
INT_STA_b
.
STA
==
1
)
?
TRUE
:
FALSE
;
}
void
WDG_ClearI
n
t
()
{
void
WDG_ClearI
TPendingBi
t
()
{
WDG
->
INT_STA_b
.
STA
=
1
;
}
void
WDG_
Enable
(
BOOL
Enable
)
{
void
WDG_
Cmd
(
BOOL
Enable
)
{
WDG
->
CTRL_b
.
EN
=
Enable
;
}
bsp/CME_M7/drivers/emac.c
浏览文件 @
b25e602a
...
...
@@ -205,14 +205,14 @@ static rt_err_t rt_cme_eth_init(rt_device_t dev)
RxDescChainInit
();
TxDescChainInit
();
ETH_
EnableInt
(
ETH_INT_BUS_FATAL_ERROR
,
TRUE
);
ETH_
ITConfig
(
ETH_INT_BUS_FATAL_ERROR
,
TRUE
);
ETH_
EnableInt
(
ETH_INT_RX_COMPLETE_FRAME
,
TRUE
);
ETH_
EnableInt
(
ETH_INT_RX_BUF_UNAVAI
,
TRUE
);
ETH_
EnableInt
(
ETH_INT_RX_STOP
,
TRUE
);
ETH_
ITConfig
(
ETH_INT_RX_COMPLETE_FRAME
,
TRUE
);
ETH_
ITConfig
(
ETH_INT_RX_BUF_UNAVAI
,
TRUE
);
ETH_
ITConfig
(
ETH_INT_RX_STOP
,
TRUE
);
ETH_StartRx
();
ETH_
EnableInt
(
ETH_INT_TX_COMPLETE_FRAME
,
TRUE
);
ETH_
ITConfig
(
ETH_INT_TX_COMPLETE_FRAME
,
TRUE
);
ETH_StartTx
();
return
RT_EOK
;
...
...
@@ -318,8 +318,8 @@ struct pbuf *rt_cme_eth_rx(rt_device_t dev)
desc
=
ETH_AcquireFreeRxDesc
();
if
(
desc
==
RT_NULL
)
{
ETH_
EnableInt
(
ETH_INT_RX_COMPLETE_FRAME
,
TRUE
);
ETH_
EnableInt
(
ETH_INT_RX_BUF_UNAVAI
,
TRUE
);
ETH_
ITConfig
(
ETH_INT_RX_COMPLETE_FRAME
,
TRUE
);
ETH_
ITConfig
(
ETH_INT_RX_BUF_UNAVAI
,
TRUE
);
ETH_ResumeRx
();
goto
_exit
;
}
...
...
@@ -414,28 +414,28 @@ void ETH_IRQHandler(void)
/* enter interrupt */
rt_interrupt_enter
();
if
(
ETH_GetI
nt
Status
(
ETH_INT_TX_COMPLETE_FRAME
))
if
(
ETH_GetI
T
Status
(
ETH_INT_TX_COMPLETE_FRAME
))
{
rt_sem_release
(
&
cme_eth_device
.
tx_buf_free
);
ETH_ClearI
n
t
(
ETH_INT_TX_COMPLETE_FRAME
);
ETH_ClearI
TPendingBi
t
(
ETH_INT_TX_COMPLETE_FRAME
);
}
if
(
ETH_GetI
nt
Status
(
ETH_INT_RX_STOP
))
if
(
ETH_GetI
T
Status
(
ETH_INT_RX_STOP
))
{
CME_ETH_PRINTF
(
"ETH_INT_RX_STOP
\n
"
);
ETH_ClearI
n
t
(
ETH_INT_RX_STOP
);
ETH_ClearI
TPendingBi
t
(
ETH_INT_RX_STOP
);
}
if
((
ETH_GetI
nt
Status
(
ETH_INT_RX_BUF_UNAVAI
))
||
(
ETH_GetI
nt
Status
(
ETH_INT_RX_COMPLETE_FRAME
)))
if
((
ETH_GetI
T
Status
(
ETH_INT_RX_BUF_UNAVAI
))
||
(
ETH_GetI
T
Status
(
ETH_INT_RX_COMPLETE_FRAME
)))
{
/* a frame has been received */
eth_device_ready
(
&
(
cme_eth_device
.
parent
));
ETH_
EnableInt
(
ETH_INT_RX_COMPLETE_FRAME
,
FALSE
);
ETH_
EnableInt
(
ETH_INT_RX_BUF_UNAVAI
,
FALSE
);
ETH_ClearI
n
t
(
ETH_INT_RX_BUF_UNAVAI
);
ETH_ClearI
n
t
(
ETH_INT_RX_COMPLETE_FRAME
);
ETH_
ITConfig
(
ETH_INT_RX_COMPLETE_FRAME
,
FALSE
);
ETH_
ITConfig
(
ETH_INT_RX_BUF_UNAVAI
,
FALSE
);
ETH_ClearI
TPendingBi
t
(
ETH_INT_RX_BUF_UNAVAI
);
ETH_ClearI
TPendingBi
t
(
ETH_INT_RX_COMPLETE_FRAME
);
}
/* leave interrupt */
...
...
bsp/CME_M7/project.uvopt
浏览文件 @
b25e602a
此差异已折叠。
点击以展开。
bsp/CME_M7/project.uvproj
浏览文件 @
b25e602a
此差异已折叠。
点击以展开。
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