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再次修改源文件开头的license，清理网卡代码中的#if 0和#if 1

上级 63d2ede1
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Showing with 407 addition and 383 deletion
bsp/ls1cdev/drivers/net/debug.h 已删除 100644 → 0
浏览文件 @ 63d2ede1
/*
* Copyright (C) chinesebear
*/
#ifndef __DEBUG_H__
#define __DEBUG_H__
//#define GMAC_DEBUG
#include <rtthread.h>
#ifdef GMAC_DEBUG
#define DEBUG_MES rt_kprintf
#else
#define DEBUG_MES(...)
#endif
#endif /*__DEBUG_H__*/
bsp/ls1cdev/drivers/net/mii.c
浏览文件 @ 2da0eae8
/*
* Copyright (C) chinesebear
* File : mii.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) chinesebear
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2017-08-24 chinesebear first version
*/
......
bsp/ls1cdev/drivers/net/mii.h
浏览文件 @ 2da0eae8
/*
* Copyright (C) chinesebear
* File : mii.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) chinesebear
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2017-08-24 chinesebear first version
*/
......@@ -7,7 +27,7 @@
#define __MII_H__
/* Generic MII registers. */
#include "types.h"
#include "synopGMAC_types.h"
#define MII_BMCR 0x00 /* Basic mode control register */
#define MII_BMSR 0x01 /* Basic mode status register */
......
bsp/ls1cdev/drivers/net/synopGMAC.c
浏览文件 @ 2da0eae8
/*
* Copyright (C) chinesebear
* File : synopGMAC.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) chinesebear
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2017-08-24 chinesebear first version
*/
......@@ -10,7 +30,7 @@
#include "synopGMAC.h"
#include "mii.c"
#include "debug.h"
#include "synopGMAC_debug.h"
#include <ls1c.h>
#define RMII
......@@ -247,7 +267,6 @@ s32 synopGMAC_check_phy_init (synopGMACPciNetworkAdapter *adapter)
return gmacdev->Speed|(gmacdev->DuplexMode<<4);
}
void eth_rx_irq1(int vector, void *param);
static int Mac_change_check(u8 *macaddr0, u8 *macaddr1)
{
......@@ -274,7 +293,6 @@ static rt_err_t eth_init(rt_device_t device )
struct synopGMACNetworkAdapter *adapter = dev->priv;
synopGMACdevice * gmacdev = (synopGMACdevice *)adapter->synopGMACdev;
#if 1
synopGMAC_reset(gmacdev);
synopGMAC_attach(gmacdev,(regbase + MACBASE),(regbase + DMABASE), DEFAULT_PHY_BASE, macaddr);
......@@ -332,14 +350,7 @@ static rt_err_t eth_init(rt_device_t device )
plat_free_memory((void *)skb);
}
}while(status >= 0 && (status < (RECEIVE_DESC_SIZE - 1)));
#if 0
init_timer(&synopGMAC_cable_unplug_timer);
synopGMAC_cable_unplug_timer.function = (void *)synopGMAC_linux_cable_unplug_function;
synopGMAC_cable_unplug_timer.data = (ulong) adapter;
synopGMAC_cable_unplug_timer.expires = CHECK_TIME + jiffies;
add_timer(&synopGMAC_cable_unplug_timer);
#endif
synopGMAC_clear_interrupt(gmacdev);
synopGMAC_disable_mmc_tx_interrupt(gmacdev, 0xFFFFFFFF);
......@@ -376,108 +387,7 @@ static rt_err_t eth_init(rt_device_t device )
rt_timer_start(&dev->rx_poll_timer);
#endif /*RT_USING_GMAC_INT_MODE*/
#else
synopGMAC_get_mac_addr(adapter->synopGMACdev,GmacAddr0High,GmacAddr0Low, macaddr);
Mac_changed = Mac_change_check(macaddr, dev->dev_addr);
if(Mac_changed == 1)
{
rt_kprintf("Mac_changed !\n");
//Lets reset the IP
synopGMAC_reset(gmacdev);
//Lets read the version of ip in to device structure
synopGMAC_read_version(gmacdev);
//Check for Phy initialization
synopGMAC_set_mdc_clk_div(gmacdev,GmiiCsrClk3);
gmacdev->ClockDivMdc = synopGMAC_get_mdc_clk_div(gmacdev);
#if SYNOP_TOP_DEBUG
rt_kprintf("check phy init status = 0x%x\n",status);
#endif
//Set up the tx and rx descriptor queue/ring
synopGMAC_setup_tx_desc_queue(gmacdev,TRANSMIT_DESC_SIZE, RINGMODE);
synopGMAC_init_tx_desc_base(gmacdev); //Program the transmit descriptor base address in to DmaTxBase addr
#if SYNOP_TOP_DEBUG
dumpreg(regbase);
#endif
synopGMAC_setup_rx_desc_queue(gmacdev,RECEIVE_DESC_SIZE, RINGMODE);
synopGMAC_init_rx_desc_base(gmacdev); //Program the transmit descriptor base address in to DmaTxBase addr
#if SYNOP_TOP_DEBUG
dumpphyreg(regbase);
#endif
#ifdef ENH_DESC_8W
synopGMAC_dma_bus_mode_init(gmacdev, DmaBurstLength32 | DmaDescriptorSkip2 | DmaDescriptor8Words ); //pbl32 incr with rxthreshold 128 and Desc is 8 Words
#else
synopGMAC_dma_bus_mode_init(gmacdev, DmaBurstLength4 | DmaDescriptorSkip1 ); //pbl4 incr with rxthreshold 128
#endif
synopGMAC_dma_control_init(gmacdev,DmaStoreAndForward |DmaTxSecondFrame|DmaRxThreshCtrl128 );
//Initialize the mac interface
synopGMAC_check_phy_init(adapter);
synopGMAC_mac_init(gmacdev);
synopGMAC_pause_control(gmacdev); // This enables the pause control in Full duplex mode of operation
#if 0
do{
pbuf = plat_alloc_memory(RX_BUF_SIZE + sizeof(*pbuf));
if(pbuf == NULL){
break;
}
dma_addr = plat_dma_map_single(gmacdev,pbuf->payload,RX_BUF_SIZE);
status = synopGMAC_set_rx_qptr(gmacdev,dma_addr,RX_BUF_SIZE, (u32)(pbuf->payload),0,0,0);
if(status < 0)
plat_free_memory((void *)pbuf);
}while(status >= 0 && status < RECEIVE_DESC_SIZE-1);
#endif
}
// synopGMAC_clear_interrupt(gmacdev);
#if 0
synopGMAC_disable_interrupt_all(gmacdev);
#else
/*
* Disable the interrupts generated by MMC and IPC counters.
* If these are not disabled ISR should be modified accordingly to handle these interrupts.
*/
synopGMAC_disable_mmc_tx_interrupt(gmacdev, 0xFFFFFFFF);
// synopGMAC_disable_mmc_rx_interrupt(gmacdev, 0xFFFFFFFF);
synopGMAC_disable_mmc_ipc_rx_interrupt(gmacdev, 0xFFFFFFFF);
synopGMAC_enable_mmc_rx_interrupt(gmacdev, 0xFFFFFFFF);
synopGMAC_enable_interrupt(gmacdev, DmaIntEnable);
synopGMAC_enable_dma_rx(gmacdev);
synopGMAC_enable_dma_tx(gmacdev);
#endif
#if SYNOP_PHY_LOOPBACK
{
gmacdev->LinkState = LINKUP;
gmacdev->DuplexMode = FULLDUPLEX;
gmacdev->Speed = SPEED1000;
}
#endif
plat_delay(DEFAULT_LOOP_VARIABLE);
synopGMAC_check_phy_init(adapter);
synopGMAC_mac_init(gmacdev);
synopGMAC_linux_cable_unplug_function(adapter);
#endif
rt_kprintf("eth_inited!\n");
return RT_EOK;
......@@ -528,106 +438,89 @@ rt_err_t rt_eth_tx(rt_device_t device, struct pbuf* p)
rt_sem_take(&sem_lock, RT_WAITING_FOREVER);
DEBUG_MES("in %s\n", __FUNCTION__);
#if 0
struct pbuf* q;
rt_uint32_t offset = 0;
int i = 0;
for(q=p; q != NULL ; q= q->next)
{
uint8_t *to;
/*copy the frame to be sent into memory
* pointed by the current
* ETHERNET DMA Tx
* descriptor */
to = (uint8_t*)((Tx_Buffer) + offset);
memcpy(to, q->payload, q->len);
offset += q->len;
}
#endif
s32 status;
u32 pbuf;
u64 dma_addr;
u32 offload_needed = 0;
u32 index;
DmaDesc * dpr;
struct rt_eth_dev *dev = (struct rt_eth_dev *) device;
struct synopGMACNetworkAdapter *adapter;
synopGMACdevice * gmacdev;
adapter = (struct synopGMACNetworkAdapter *) dev->priv;
if(adapter == NULL)
return -1;
s32 status;
u32 pbuf;
u64 dma_addr;
u32 offload_needed = 0;
u32 index;
DmaDesc * dpr;
struct rt_eth_dev *dev = (struct rt_eth_dev *) device;
struct synopGMACNetworkAdapter *adapter;
synopGMACdevice * gmacdev;
adapter = (struct synopGMACNetworkAdapter *) dev->priv;
if(adapter == NULL)
return -1;
gmacdev = (synopGMACdevice *) adapter->synopGMACdev;
if(gmacdev == NULL)
return -1;
gmacdev = (synopGMACdevice *) adapter->synopGMACdev;
if(gmacdev == NULL)
return -1;
if(!synopGMAC_is_desc_owned_by_dma(gmacdev->TxNextDesc))
{
if(!synopGMAC_is_desc_owned_by_dma(gmacdev->TxNextDesc))
pbuf = (u32)plat_alloc_memory(p->len);
//pbuf = (u32)pbuf_alloc(PBUF_LINK, p->len, PBUF_RAM);
if(pbuf == 0)
{
rt_kprintf("===error in alloc bf1\n");
return -1;
}
pbuf = (u32)plat_alloc_memory(p->len);
//pbuf = (u32)pbuf_alloc(PBUF_LINK, p->len, PBUF_RAM);
if(pbuf == 0)
{
rt_kprintf("===error in alloc bf1\n");
return -1;
}
DEBUG_MES("p->len = %d\n", p->len);
memcpy((void *)pbuf, p->payload, p->len);
dma_addr = plat_dma_map_single(gmacdev,(void*)pbuf,p->len);
DEBUG_MES("p->len = %d\n", p->len);
memcpy((void *)pbuf, p->payload, p->len);
dma_addr = plat_dma_map_single(gmacdev,(void*)pbuf,p->len);
status = synopGMAC_set_tx_qptr(gmacdev,dma_addr,p->len,pbuf,0,0,0,offload_needed,&index,dpr);
if(status < 0){
rt_kprintf("%s No More Free Tx Descriptors\n",__FUNCTION__);
status = synopGMAC_set_tx_qptr(gmacdev,dma_addr,p->len,pbuf,0,0,0,offload_needed,&index,dpr);
if(status < 0){
rt_kprintf("%s No More Free Tx Descriptors\n",__FUNCTION__);
plat_free_memory((void *)pbuf);
return -16;
}
plat_free_memory((void *)pbuf);
return -16;
}
synopGMAC_resume_dma_tx(gmacdev);
}
synopGMAC_resume_dma_tx(gmacdev);
s32 desc_index;
u32 data1, data2;
u32 dma_addr1, dma_addr2;
u32 length1, length2;
s32 desc_index;
u32 data1, data2;
u32 dma_addr1, dma_addr2;
u32 length1, length2;
#ifdef ENH_DESC_8W
u32 ext_status;
u16 time_stamp_higher;
u32 time_stamp_high;
u32 time_stamp_low;
u32 ext_status;
u16 time_stamp_higher;
u32 time_stamp_high;
u32 time_stamp_low;
#endif
do {
do {
#ifdef ENH_DESC_8W
desc_index = synopGMAC_get_tx_qptr(gmacdev, &status, &dma_addr1, &length1, &data1, &dma_addr2, &length2, &data2,&ext_status,&time_stamp_high,&time_stamp_low);
synopGMAC_TS_read_timestamp_higher_val(gmacdev, &time_stamp_higher);
desc_index = synopGMAC_get_tx_qptr(gmacdev, &status, &dma_addr1, &length1, &data1, &dma_addr2, &length2, &data2,&ext_status,&time_stamp_high,&time_stamp_low);
synopGMAC_TS_read_timestamp_higher_val(gmacdev, &time_stamp_higher);
#else
desc_index = synopGMAC_get_tx_qptr(gmacdev, &status, &dma_addr1, &length1, &data1, &dma_addr2, &length2, &data2);
desc_index = synopGMAC_get_tx_qptr(gmacdev, &status, &dma_addr1, &length1, &data1, &dma_addr2, &length2, &data2);
#endif
if(desc_index >= 0 && data1 != 0){
if(desc_index >= 0 && data1 != 0){
#ifdef IPC_OFFLOAD
if(synopGMAC_is_tx_ipv4header_checksum_error(gmacdev, status)){
rt_kprintf("Harware Failed to Insert IPV4 Header Checksum\n");
}
if(synopGMAC_is_tx_payload_checksum_error(gmacdev, status)){
rt_kprintf("Harware Failed to Insert Payload Checksum\n");
}
if(synopGMAC_is_tx_ipv4header_checksum_error(gmacdev, status)){
rt_kprintf("Harware Failed to Insert IPV4 Header Checksum\n");
}
if(synopGMAC_is_tx_payload_checksum_error(gmacdev, status)){
rt_kprintf("Harware Failed to Insert Payload Checksum\n");
}
#endif
plat_free_memory((void *)(data1)); //sw: data1 = buffer1
plat_free_memory((void *)(data1)); //sw: data1 = buffer1
if(synopGMAC_is_desc_valid(status)){
adapter->synopGMACNetStats.tx_bytes += length1;
adapter->synopGMACNetStats.tx_packets++;
}
else {
adapter->synopGMACNetStats.tx_errors++;
adapter->synopGMACNetStats.tx_aborted_errors += synopGMAC_is_tx_aborted(status);
adapter->synopGMACNetStats.tx_carrier_errors += synopGMAC_is_tx_carrier_error(status);
}
} adapter->synopGMACNetStats.collisions += synopGMAC_get_tx_collision_count(status);
} while(desc_index >= 0);
if(synopGMAC_is_desc_valid(status)){
adapter->synopGMACNetStats.tx_bytes += length1;
adapter->synopGMACNetStats.tx_packets++;
}
else {
adapter->synopGMACNetStats.tx_errors++;
adapter->synopGMACNetStats.tx_aborted_errors += synopGMAC_is_tx_aborted(status);
adapter->synopGMACNetStats.tx_carrier_errors += synopGMAC_is_tx_carrier_error(status);
}
} adapter->synopGMACNetStats.collisions += synopGMAC_get_tx_collision_count(status);
} while(desc_index >= 0);
/* unlock eth device */
rt_sem_release(&sem_lock);
......@@ -856,21 +749,6 @@ static void mdio_write(synopGMACPciNetworkAdapter *adapter, int addr, int reg, i
synopGMAC_write_phy_reg(gmacdev->MacBase,addr,reg,data);
}
void eth_rx_irq1(int vector, void *param)
{
struct rt_eth_dev *dev = &eth_dev;
struct synopGMACNetworkAdapter *adapter = dev->priv;
synopGMACdevice * gmacdev = (synopGMACdevice *)adapter->synopGMACdev;
// rt_kprintf("in irq!!\n");
rt_kprintf("*(0xbfd01040) = 0x%x\n", *(volatile u32 *)0xbfd01040);
rt_kprintf("*(0xbfd01044) = 0x%x\n", *(volatile u32 *)0xbfd01044);
// rt_kprintf("*(0xbfd01048) = 0x%x\n", *(volatile u32 *)0xbfd01048);
rt_kprintf("*(0xbfd01058) = 0x%x\n", *(volatile u32 *)0xbfd01058);
rt_kprintf("*(0xbfd0105c) = 0x%x\n", *(volatile u32 *)0xbfd0105c);
// rt_kprintf("*(0xbfd01060) = 0x%x\n", *(volatile u32 *)0xbfd01060);
}
void eth_rx_irq(int irqno,void *param)
{
struct rt_eth_dev *dev = &eth_dev;
......@@ -956,29 +834,6 @@ void eth_rx_irq(int irqno,void *param)
}
if(interrupt & synopGMACDmaRxStopped){
rt_kprintf("%s::Receiver stopped seeing Rx interrupts\n",__FUNCTION__); //Receiver gone in to stopped state
#if 0
if(GMAC_Power_down == 0){
adapter->synopGMACNetStats.rx_over_errors++;
struct pbuf *pbuffer;
do{
pbuffer = pbuf_alloc(PBUF_LINK, BUS_SIZE_ALIGN(1500) + 2, PBUF_RAM);
if(pbuffer == RT_NULL){
rt_kprintf("ERROR in skb buffer allocation\n");
break;
}
dma_addr = plat_dma_map_single(gmacdev,pbuffer->payload,BUS_SIZE_ALIGN(1500));
status = synopGMAC_set_rx_qptr(gmacdev,dma_addr,BUS_SIZE_ALIGN(1500), (u32)pbuffer,0,0,0);
// ETHERNET_PACKET_EXTRA), (u32)pbuffer,0,0,0);
if(status < 0)
{
rt_kprintf("synopGMAC_set_rx_qptr err\n\n");
pbuf_free(pbuffer);
}
}while(status >= 0 && (status < (RECEIVE_DESC_SIZE - 1)));
synopGMAC_enable_dma_rx(gmacdev);
}
#endif
}
if(interrupt & synopGMACDmaTxNormal){
......@@ -988,15 +843,9 @@ void eth_rx_irq(int irqno,void *param)
if(interrupt & synopGMACDmaTxAbnormal){
rt_kprintf("%s::Abnormal Tx Interrupt Seen\n",__FUNCTION__);
#if 0
if(GMAC_Power_down == 0){ // If Mac is not in powerdown
synop_handle_transmit_over(netdev);
}
#endif
}
if(interrupt & synopGMACDmaTxStopped){
TR("%s::Transmitter stopped sending the packets\n",__FUNCTION__);
#if 1
if(GMAC_Power_down == 0){ // If Mac is not in powerdown
synopGMAC_disable_dma_tx(gmacdev);
synopGMAC_take_desc_ownership_tx(gmacdev);
......@@ -1005,19 +854,11 @@ void eth_rx_irq(int irqno,void *param)
// netif_wake_queue(netdev);
TR("%s::Transmission Resumed\n",__FUNCTION__);
}
#endif
}
/* Enable the interrrupt before returning from ISR*/
synopGMAC_enable_interrupt(gmacdev,DmaIntEnable);
return;
#if 0
synopGMAC_disable_interrupt_all(gmacdev);
rt_kprintf("in irq i = %d~\n",i++);
eth_device_ready(&eth_dev.parent);
synopGMAC_enable_interrupt(gmacdev, DmaIntEnable);
rt_kprintf("leaving irq\n");
#endif
}
void rt_hw_eth_init(void)
......
bsp/ls1cdev/drivers/net/synopGMAC.h
浏览文件 @ 2da0eae8
/*
* Copyright (C) chinesebear
* File : synopGMAC.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) chinesebear
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2017-08-24 chinesebear first version
*/
#ifndef __SYNOPGMAC__H
......@@ -10,7 +30,7 @@
#include "synopGMAC_Dev.h"
#include "synopGMAC_plat.h"
#include "mii.h"
#include "types.h"
#include "synopGMAC_types.h"
void rt_hw_eth_init(void);
......
bsp/ls1cdev/drivers/net/synopGMAC_Dev.c
浏览文件 @ 2da0eae8
......@@ -9,6 +9,32 @@
* ------------------------REVISION HISTORY---------------------------------
* Synopsys 01/Aug/2007 Created
*/
/*
* File : synopGMAC_Dev.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) chinesebear
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2017-08-24 chinesebear first version
*/
#include "synopGMAC_Dev.h"
#include <rthw.h>
#include <rtthread.h>
......@@ -100,32 +126,32 @@ s32 synopGMAC_read_phy_reg(u32 RegBase,u32 PhyBase, u32 RegOffset, u16 * data )
*/
s32 synopGMAC_write_phy_reg(u32 RegBase, u32 PhyBase, u32 RegOffset, u16 data)
{
u32 addr;
u32 loop_variable;
u32 addr;
u32 loop_variable;
synopGMACWriteReg(RegBase,GmacGmiiData,data); // write the data in to GmacGmiiData register of synopGMAC ip
synopGMACWriteReg(RegBase,GmacGmiiData,data); // write the data in to GmacGmiiData register of synopGMAC ip
addr = ((PhyBase << GmiiDevShift) & GmiiDevMask) | ((RegOffset << GmiiRegShift) & GmiiRegMask) | GmiiWrite | GmiiCsrClk3; //sw: add GmiiCsrclk
addr = ((PhyBase << GmiiDevShift) & GmiiDevMask) | ((RegOffset << GmiiRegShift) & GmiiRegMask) | GmiiWrite | GmiiCsrClk3; //sw: add GmiiCsrclk
addr = addr | GmiiBusy ; //set Gmii clk to 20-35 Mhz and Gmii busy bit
synopGMACWriteReg(RegBase,GmacGmiiAddr,addr);
for(loop_variable = 0; loop_variable < DEFAULT_LOOP_VARIABLE; loop_variable++){
if (!(synopGMACReadReg(RegBase,GmacGmiiAddr) & GmiiBusy)){
break;
}
plat_delay(DEFAULT_DELAY_VARIABLE);
addr = addr | GmiiBusy ; //set Gmii clk to 20-35 Mhz and Gmii busy bit
synopGMACWriteReg(RegBase,GmacGmiiAddr,addr);
for(loop_variable = 0; loop_variable < DEFAULT_LOOP_VARIABLE; loop_variable++){
if (!(synopGMACReadReg(RegBase,GmacGmiiAddr) & GmiiBusy)){
break;
}
plat_delay(DEFAULT_DELAY_VARIABLE);
}
if(loop_variable < DEFAULT_LOOP_VARIABLE){
return -ESYNOPGMACNOERR;
}
else{
if(loop_variable < DEFAULT_LOOP_VARIABLE){
return -ESYNOPGMACNOERR;
}
else{
TR("Error::: PHY not responding Busy bit didnot get cleared !!!!!!\n");
return -ESYNOPGMACPHYERR;
}
return -ESYNOPGMACPHYERR;
}
#if SYNOP_REG_DEBUG
printf("write phy reg: offset = 0x%x\tdata = 0x%x",RegOffset,data);
printf("write phy reg: offset = 0x%x\tdata = 0x%x",RegOffset,data);
#endif
}
......@@ -1850,44 +1876,13 @@ s32 synopGMAC_get_tx_qptr(synopGMACdevice * gmacdev, u32 * Status, u32 * Buffer1
printf("\n==%02d %08x %08x %08x %08x %08x %08x %08x\n",txover,(u32)txdesc,txdesc->status,txdesc->length,txdesc->buffer1,txdesc->buffer2,txdesc->data1,txdesc->data2);
#endif
if(synopGMAC_is_desc_owned_by_dma(txdesc))
{
#if 0
printf("synopGMAC_get_tx_qptr:TX desc is owned by dma!\n");
#endif
return -1;
}
#if 0
for(i=0;i<500000;i++)
{
if(synopGMAC_is_desc_empty(txdesc))
{
#if SYNOP_TX_DEBUG
// printf("==desc owned by dma\n");
#endif
// return -1;
continue;
}
else
break;
}
if(i>=500000)
{
printf("i=%d\n",i);
return -1;
}
do
{
;
}while(synopGMAC_is_desc_empty(txdesc));
#endif
// gmacdev->TxBusy = synopGMAC_is_last_tx_desc(gmacdev,txdesc) ? 0 : txover + 1;
// gmacdev->TxBusyDesc = synopGMAC_is_last_tx_desc(gmacdev,txdesc) ? gmacdev->TxDesc : (txdesc + 1);
if(synopGMAC_is_desc_empty(txdesc))
{
#if 0
printf("synopGMAC_get_tx_qptr:Tx Desc Empty!\n");
#endif
return -1;
}
(gmacdev->BusyTxDesc)--; //busy tx descriptor is reduced by one as it will be handed over to Processor now
......@@ -2025,10 +2020,8 @@ s32 synopGMAC_set_tx_qptr(synopGMACdevice * gmacdev, u32 Buffer1, u32 Length1, u
txdesc->status = DescOwnByDma;
#endif
#if 1
gmacdev->TxNext = synopGMAC_is_last_tx_desc(gmacdev,txdesc) ? 0 : txnext + 1;
gmacdev->TxNextDesc = synopGMAC_is_last_tx_desc(gmacdev,txdesc) ? gmacdev->TxDesc : (txdesc + 1);
#endif
}
......
bsp/ls1cdev/drivers/net/synopGMAC_Dev.h
浏览文件 @ 2da0eae8
......@@ -8,6 +8,32 @@
* -----------------------------REVISION HISTORY------------------------------------
* Synopsys 01/Aug/2007 Created
*/
/*
* File : synopGMAC_Dev.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) chinesebear
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2017-08-24 chinesebear first version
*/
#define UNUSED 1
#ifndef SYNOP_GMAC_DEV_H
......@@ -28,7 +54,7 @@
/*******************************************************************/
#include "synopGMAC_plat.h"
#include "types.h"
#include "synopGMAC_types.h"
//sw: typedef are included in synopGMAC_plat.h
// it is strange that we should add it here again!!
......
bsp/ls1cdev/drivers/net/synopGMAC_Host.h
浏览文件 @ 2da0eae8
/*
* Copyright (C) chinesebear
* File : synopGMAC_Host.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) chinesebear
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2017-08-24 chinesebear first version
*/
......
bsp/ls1cdev/drivers/net/synopGMAC_debug.h 0 → 100644
浏览文件 @ 2da0eae8
/*
* File : synopGMAC_debug.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) chinesebear
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2017-08-24 chinesebear first version
*/
#ifndef __DEBUG_H__
#define __DEBUG_H__
//#define GMAC_DEBUG
#include <rtthread.h>
#ifdef GMAC_DEBUG
#define DEBUG_MES rt_kprintf
#else
#define DEBUG_MES(...)
#endif
#endif /*__DEBUG_H__*/
bsp/ls1cdev/drivers/net/synopGMAC_network_interface.h
浏览文件 @ 2da0eae8
......@@ -6,6 +6,31 @@
* ---------------------------REVISION HISTORY-------------------
* Synopsys 01/Aug/2007 Created
*/
/*
* File : synopGMAC_network_interface.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) chinesebear
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2017-08-24 chinesebear first version
*/
#ifndef SYNOP_GMAC_NETWORK_INTERFACE_H
#define SYNOP_GMAC_NETWORK_INTERFACE_H 1
......
bsp/ls1cdev/drivers/net/synopGMAC_plat.c
浏览文件 @ 2da0eae8
......@@ -9,6 +9,32 @@
* ----------------------------REVISION HISTORY-----------------------------
* Synopsys 01/Aug/2007 Created
*/
/*
* File : synopGMAC_plat.c
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) chinesebear
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2017-08-24 chinesebear first version
*/
#include "synopGMAC_plat.h"
#include "synopGMAC_Dev.h"
......
bsp/ls1cdev/drivers/net/synopGMAC_plat.h
浏览文件 @ 2da0eae8
......@@ -9,6 +9,31 @@
* -------------------------------------REVISION HISTORY---------------------------
* Synopsys 01/Aug/2007 Created
*/
/*
* File : synopGMAC_plat.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) chinesebear
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2017-08-24 chinesebear first version
*/
#ifndef SYNOP_GMAC_PLAT_H
......@@ -21,8 +46,8 @@
#include <linux/slab.h>
#include <linux/pci.h>
*/
#include "types.h"
#include "debug.h"
#include "synopGMAC_types.h"
#include "synopGMAC_debug.h"
//#include "mii.h"
//#include "GMAC_Pmon.h"
//#include "synopGMAC_Host.h"
......@@ -151,35 +176,17 @@ void plat_delay(u32);
*/
static u32 synopGMACReadReg(u32 RegBase, u32 RegOffset)
{
u32 addr;
u32 data;
u32 addr;
u32 data;
addr = RegBase + (u32)RegOffset;
#if 0 //__mips >= 3 && __mips != 32
__asm __volatile(
".set\tnoreorder\n\t"
".set\tmips3\n\t"
"ld $8,%1\n\t"
"lw $9,0x0($8)\n\t"
"nop\n\t"
"nop\n\t"
"sw $9,%0\n\t"
".set\tmips0\n\t"
:"=m"(data)
:"m"(addr)
:"memory","$8","$9"
);
#else
data = *(volatile u32 *)addr;
#endif
addr = RegBase + (u32)RegOffset;
data = *(volatile u32 *)addr;
#if SYNOP_REG_DEBUG
TR("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, (u32)RegBase, RegOffset, data );
TR("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, (u32)RegBase, RegOffset, data );
#endif
// rt_kprintf("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, (u32)RegBase, RegOffset, data );
return data;
// rt_kprintf("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__, (u32)RegBase, RegOffset, data );
return data;
}
......@@ -201,23 +208,8 @@ static void synopGMACWriteReg(u32 RegBase, u32 RegOffset, u32 RegData )
#if SYNOP_REG_DEBUG
TR("%s RegBase = 0x%08x RegOffset = 0x%08x RegData = 0x%08x\n", __FUNCTION__,(u32) RegBase, RegOffset, RegData );
#endif
// writel(RegData,(void *)addr);
//printf("GMAC addr = 0x%lx \n",addr);
#if 0 //__mips >= 3 && __mips != 32
__asm __volatile(
".set\tnoreorder\n\t"
".set\tmips3\n\t"
"lw $9,%0\n\t"
"ld $8,%1\n\t"
"sw $9,0x0($8)\n\t"
".set\tmips0\n\t"
:
:"m"(RegData),"m"(addr)
:"memory","$8","$9"
);
#else
*(volatile u32 *)addr = RegData;
#endif
if(addr == 0xbfe1100c)
DEBUG_MES("regdata = %08x\n", RegData);
return;
......
bsp/ls1cdev/drivers/net/synopGMAC_types.h 0 → 100644
浏览文件 @ 2da0eae8
/*
* File : synopGMAC_types.h
* This file is part of RT-Thread RTOS
* COPYRIGHT (C) chinesebear
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
*
* Change Logs:
* Date Author Notes
* 2017-08-24 chinesebear first version
*/
#ifndef __TYPES__H
#define __TYPES__H
typedef unsigned char uint8_t;
typedef unsigned long long u64;
typedef unsigned int u32;
typedef unsigned short u16;
typedef unsigned char u8;
typedef signed int s32;
typedef u32 dma_addr_t;
#endif /*__TYPES__H*/
bsp/ls1cdev/drivers/net/types.h 已删除 100644 → 0
浏览文件 @ 63d2ede1
/*
* Copyright (C) chinesebear
*/
#ifndef __TYPES__H
#define __TYPES__H
typedef unsigned char uint8_t;
typedef unsigned long long u64;
typedef unsigned int u32;
typedef unsigned short u16;
typedef unsigned char u8;
typedef signed int s32;
typedef u32 dma_addr_t;
#endif /*__TYPES__H*/
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