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体验新版 GitCode,发现更多精彩内容 >>
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b81dc4a9
编写于
9月 21, 2021
作者:
似
似水流年
浏览文件
操作
浏览文件
下载
电子邮件补丁
差异文件
匹配spi驱动,开放SPI1和SPI2,scons和mdk5编译通过
上级
e923ba28
变更
7
展开全部
隐藏空白更改
内联
并排
Showing
7 changed file
with
2332 addition
and
119 deletion
+2332
-119
.gitignore
.gitignore
+1
-0
bsp/Vango_V85xx/drivers/SConscript
bsp/Vango_V85xx/drivers/SConscript
+3
-0
bsp/Vango_V85xx/drivers/drv_spi.c
bsp/Vango_V85xx/drivers/drv_spi.c
+46
-119
bsp/Vango_V85xx/drivers/drv_spi.h
bsp/Vango_V85xx/drivers/drv_spi.h
+1
-0
bsp/Vango_V85xx/project.uvoptx
bsp/Vango_V85xx/project.uvoptx
+1324
-0
bsp/Vango_V85xx/project.uvprojx
bsp/Vango_V85xx/project.uvprojx
+955
-0
bsp/Vango_V85xx/rtconfig.h
bsp/Vango_V85xx/rtconfig.h
+2
-0
未找到文件。
.gitignore
浏览文件 @
b81dc4a9
...
@@ -10,6 +10,7 @@
...
@@ -10,6 +10,7 @@
*.idb
*.idb
*.ilk
*.ilk
*.old
*.old
*.crf
build
build
Debug
Debug
documentation/html
documentation/html
...
...
bsp/Vango_V85xx/drivers/SConscript
浏览文件 @
b81dc4a9
...
@@ -30,6 +30,9 @@ if GetDepend('RT_USING_RTC'):
...
@@ -30,6 +30,9 @@ if GetDepend('RT_USING_RTC'):
if
GetDepend
(
'RT_USING_WDT'
):
if
GetDepend
(
'RT_USING_WDT'
):
src
+=
[
'drv_iwdt.c'
]
src
+=
[
'drv_iwdt.c'
]
if
GetDepend
(
'RT_USING_SPI'
):
src
+=
[
'drv_spi.c'
]
group
=
DefineGroup
(
'Drivers'
,
src
,
depend
=
[
''
],
CPPPATH
=
CPPPATH
)
group
=
DefineGroup
(
'Drivers'
,
src
,
depend
=
[
''
],
CPPPATH
=
CPPPATH
)
Return
(
'group'
)
Return
(
'group'
)
bsp/Vango_V85xx/drivers/drv_spi.c
浏览文件 @
b81dc4a9
...
@@ -6,8 +6,9 @@
...
@@ -6,8 +6,9 @@
* Change Logs:
* Change Logs:
* Date Author Notes
* Date Author Notes
* 2017-06-05 tanek first implementation.
* 2017-06-05 tanek first implementation.
* 2018-04-19 misonyo Porting for gd32f30x
* 2018-04-19 misonyo Porting for v85xxf30x
* 2019-03-31 xuzhuoyi Porting for gd32e230
* 2019-03-31 xuzhuoyi Porting for v85xxe230
* 2021-09-21 zhuxw Porting for v85xx
*/
*/
#include "drv_spi.h"
#include "drv_spi.h"
...
@@ -17,7 +18,7 @@
...
@@ -17,7 +18,7 @@
#if defined(RT_USING_SPI) && defined(RT_USING_PIN)
#if defined(RT_USING_SPI) && defined(RT_USING_PIN)
#include <rtdevice.h>
#include <rtdevice.h>
#if !defined(RT_USING_SPI
0) && !defined(RT_USING_SPI1
)
#if !defined(RT_USING_SPI
1) && !defined(RT_USING_SPI2
)
#error "Please define at least one SPIx"
#error "Please define at least one SPIx"
#endif
#endif
...
@@ -32,7 +33,7 @@
...
@@ -32,7 +33,7 @@
static
rt_err_t
configure
(
struct
rt_spi_device
*
device
,
struct
rt_spi_configuration
*
configuration
);
static
rt_err_t
configure
(
struct
rt_spi_device
*
device
,
struct
rt_spi_configuration
*
configuration
);
static
rt_uint32_t
xfer
(
struct
rt_spi_device
*
device
,
struct
rt_spi_message
*
message
);
static
rt_uint32_t
xfer
(
struct
rt_spi_device
*
device
,
struct
rt_spi_message
*
message
);
static
struct
rt_spi_ops
gd32
_spi_ops
=
static
struct
rt_spi_ops
v85xx
_spi_ops
=
{
{
configure
,
configure
,
xfer
xfer
...
@@ -40,124 +41,95 @@ static struct rt_spi_ops gd32_spi_ops =
...
@@ -40,124 +41,95 @@ static struct rt_spi_ops gd32_spi_ops =
static
rt_err_t
configure
(
struct
rt_spi_device
*
device
,
struct
rt_spi_configuration
*
configuration
)
static
rt_err_t
configure
(
struct
rt_spi_device
*
device
,
struct
rt_spi_configuration
*
configuration
)
{
{
spi_parameter_struct
spi_init_struct
;
SPI_InitType
spi_init_struct
;
rt_uint32_t
spi_periph
=
(
rt_uint32_t
)
device
->
bus
->
parent
.
user_data
;
rt_uint32_t
spi_periph
=
(
rt_uint32_t
)
device
->
bus
->
parent
.
user_data
;
RT_ASSERT
(
device
!=
RT_NULL
);
RT_ASSERT
(
device
!=
RT_NULL
);
RT_ASSERT
(
configuration
!=
RT_NULL
);
RT_ASSERT
(
configuration
!=
RT_NULL
);
if
(
configuration
->
data_width
<=
8
)
if
(
configuration
->
data_width
>
8
)
{
spi_init_struct
.
frame_size
=
SPI_FRAMESIZE_8BIT
;
}
else
if
(
configuration
->
data_width
<=
16
)
{
spi_init_struct
.
frame_size
=
SPI_FRAMESIZE_16BIT
;
}
else
{
{
return
RT_EIO
;
return
RT_EIO
;
}
}
{
{
rcu_clock_freq_enum
spi_src
;
rt_uint32_t
spi_apb_clock
;
rt_uint32_t
spi_apb_clock
;
rt_uint32_t
max_hz
;
rt_uint32_t
max_hz
;
max_hz
=
configuration
->
max_hz
;
max_hz
=
configuration
->
max_hz
;
DEBUG_PRINTF
(
"sys freq: %d
\n
"
,
rcu_clock_freq_get
(
CK_SYS
));
spi_apb_clock
=
CLK_GetPCLKFreq
();
DEBUG_PRINTF
(
"CK_APB2 freq: %d
\n
"
,
rcu_clock_freq_get
(
CK_APB2
));
DEBUG_PRINTF
(
"max freq: %d
\n
"
,
max_hz
);
if
(
spi_periph
==
SPI1
)
{
spi_src
=
CK_APB1
;
}
else
{
spi_src
=
CK_APB2
;
}
spi_apb_clock
=
rcu_clock_freq_get
(
spi_src
);
if
(
max_hz
>=
spi_apb_clock
/
2
)
if
(
max_hz
>=
spi_apb_clock
/
2
)
{
{
spi_init_struct
.
prescale
=
SPI_PSC
_2
;
spi_init_struct
.
ClockDivision
=
SPI_CLKDIV
_2
;
}
}
else
if
(
max_hz
>=
spi_apb_clock
/
4
)
else
if
(
max_hz
>=
spi_apb_clock
/
4
)
{
{
spi_init_struct
.
prescale
=
SPI_PSC
_4
;
spi_init_struct
.
ClockDivision
=
SPI_CLKDIV
_4
;
}
}
else
if
(
max_hz
>=
spi_apb_clock
/
8
)
else
if
(
max_hz
>=
spi_apb_clock
/
8
)
{
{
spi_init_struct
.
prescale
=
SPI_PSC
_8
;
spi_init_struct
.
ClockDivision
=
SPI_CLKDIV
_8
;
}
}
else
if
(
max_hz
>=
spi_apb_clock
/
16
)
else
if
(
max_hz
>=
spi_apb_clock
/
16
)
{
{
spi_init_struct
.
prescale
=
SPI_PSC
_16
;
spi_init_struct
.
ClockDivision
=
SPI_CLKDIV
_16
;
}
}
else
if
(
max_hz
>=
spi_apb_clock
/
32
)
else
if
(
max_hz
>=
spi_apb_clock
/
32
)
{
{
spi_init_struct
.
prescale
=
SPI_PSC
_32
;
spi_init_struct
.
ClockDivision
=
SPI_CLKDIV
_32
;
}
}
else
if
(
max_hz
>=
spi_apb_clock
/
64
)
else
if
(
max_hz
>=
spi_apb_clock
/
64
)
{
{
spi_init_struct
.
prescale
=
SPI_PSC_64
;
spi_init_struct
.
ClockDivision
=
SPI_CLKDIV_64
;
}
else
if
(
max_hz
>=
spi_apb_clock
/
128
)
{
spi_init_struct
.
prescale
=
SPI_PSC_128
;
}
}
else
else
{
{
/* min prescaler
256
*/
/* min prescaler
128
*/
spi_init_struct
.
prescale
=
SPI_PSC_256
;
spi_init_struct
.
ClockDivision
=
SPI_CLKDIV_128
;
}
}
}
/* baudrate */
}
/* baudrate */
switch
(
configuration
->
mode
&
RT_SPI_MODE_3
)
switch
(
configuration
->
mode
&
RT_SPI_MODE_3
)
{
{
case
RT_SPI_MODE_0
:
case
RT_SPI_MODE_0
:
spi_init_struct
.
clock_polarity_phase
=
SPI_CK_PL_LOW_PH_1EDGE
;
spi_init_struct
.
SPH
=
SPI_SPH_0
;
spi_init_struct
.
SPO
=
SPI_SPO_0
;
break
;
break
;
case
RT_SPI_MODE_1
:
case
RT_SPI_MODE_1
:
spi_init_struct
.
clock_polarity_phase
=
SPI_CK_PL_LOW_PH_2EDGE
;
spi_init_struct
.
SPH
=
SPI_SPH_1
;
spi_init_struct
.
SPO
=
SPI_SPO_0
;
break
;
break
;
case
RT_SPI_MODE_2
:
case
RT_SPI_MODE_2
:
spi_init_struct
.
clock_polarity_phase
=
SPI_CK_PL_HIGH_PH_1EDGE
;
spi_init_struct
.
SPH
=
SPI_SPH_0
;
spi_init_struct
.
SPO
=
SPI_SPO_1
;
break
;
break
;
case
RT_SPI_MODE_3
:
case
RT_SPI_MODE_3
:
spi_init_struct
.
clock_polarity_phase
=
SPI_CK_PL_HIGH_PH_2EDGE
;
spi_init_struct
.
SPH
=
SPI_SPH_1
;
spi_init_struct
.
SPO
=
SPI_SPO_1
;
break
;
break
;
}
}
/* MSB or LSB */
if
(
!
(
configuration
->
mode
&
RT_SPI_MSB
))
if
(
configuration
->
mode
&
RT_SPI_MSB
)
{
spi_init_struct
.
endian
=
SPI_ENDIAN_MSB
;
}
else
{
{
spi_init_struct
.
endian
=
SPI_ENDIAN_LSB
;
return
RT_EIO
;
}
}
spi_init_struct
.
trans_mode
=
SPI_TRANSMODE_FULLDUPLEX
;
spi_init_struct
.
Mode
=
SPI_MODE_MASTER
;
spi_init_struct
.
device_mode
=
SPI_MASTER
;
spi_init_struct
.
CSNSoft
=
SPI_CSNSOFT_ENABLE
;
spi_init_struct
.
nss
=
SPI_NSS_SOFT
;
spi_init
(
spi_periph
,
&
spi_init_struct
);
spi_crc_off
(
spi_periph
);
SPI_Init
((
SPI_TypeDef
*
)
spi_periph
,
&
spi_init_struct
);
spi_enable
(
spi_periph
);
SPI_Cmd
((
SPI_TypeDef
*
)
spi_periph
,
ENABLE
);
return
RT_EOK
;
return
RT_EOK
;
};
};
static
rt_uint32_t
xfer
(
struct
rt_spi_device
*
device
,
struct
rt_spi_message
*
message
)
static
rt_uint32_t
xfer
(
struct
rt_spi_device
*
device
,
struct
rt_spi_message
*
message
)
{
{
rt_base_t
gd32
_cs_pin
=
(
rt_base_t
)
device
->
parent
.
user_data
;
rt_base_t
v85xx
_cs_pin
=
(
rt_base_t
)
device
->
parent
.
user_data
;
rt_uint32_t
spi_periph
=
(
rt_uint32_t
)
device
->
bus
->
parent
.
user_data
;
rt_uint32_t
spi_periph
=
(
rt_uint32_t
)
device
->
bus
->
parent
.
user_data
;
struct
rt_spi_configuration
*
config
=
&
device
->
config
;
struct
rt_spi_configuration
*
config
=
&
device
->
config
;
...
@@ -167,7 +139,7 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
...
@@ -167,7 +139,7 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
/* take CS */
/* take CS */
if
(
message
->
cs_take
)
if
(
message
->
cs_take
)
{
{
rt_pin_write
(
gd32
_cs_pin
,
PIN_LOW
);
rt_pin_write
(
v85xx
_cs_pin
,
PIN_LOW
);
DEBUG_PRINTF
(
"spi take cs
\n
"
);
DEBUG_PRINTF
(
"spi take cs
\n
"
);
}
}
...
@@ -189,16 +161,15 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
...
@@ -189,16 +161,15 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
data
=
*
send_ptr
++
;
data
=
*
send_ptr
++
;
}
}
// Todo: replace register read/write by gd32f3 lib
//Wait until the transmit buffer is empty
//Wait until the transmit buffer is empty
while
(
RESET
==
spi_i2s_flag_get
(
spi_periph
,
SPI_FLAG_TBE
));
while
(
RESET
==
SPI_GetStatus
((
SPI_TypeDef
*
)
spi_periph
,
SPI_STS_TXEMPTY
));
// Send the byte
// Send the byte
spi_i2s_data_transmit
(
spi_periph
,
data
);
SPI_SendData
((
SPI_TypeDef
*
)
spi_periph
,
data
);
//Wait until a data is received
//Wait until a data is received
while
(
RESET
==
spi_i2s_flag_get
(
spi_periph
,
SPI_FLAG_RB
NE
));
while
(
RESET
==
SPI_GetStatus
((
SPI_TypeDef
*
)
spi_periph
,
SPI_STS_R
NE
));
// Get the received data
// Get the received data
data
=
spi_i2s_data_receive
(
spi_periph
);
data
=
SPI_ReceiveData
((
SPI_TypeDef
*
)
spi_periph
);
if
(
recv_ptr
!=
RT_NULL
)
if
(
recv_ptr
!=
RT_NULL
)
{
{
...
@@ -207,81 +178,37 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
...
@@ -207,81 +178,37 @@ static rt_uint32_t xfer(struct rt_spi_device* device, struct rt_spi_message* mes
}
}
DEBUG_PRINTF
(
"spi poll transfer finsh
\n
"
);
DEBUG_PRINTF
(
"spi poll transfer finsh
\n
"
);
}
}
else
if
(
config
->
data_width
<=
16
)
{
const
rt_uint16_t
*
send_ptr
=
message
->
send_buf
;
rt_uint16_t
*
recv_ptr
=
message
->
recv_buf
;
rt_uint32_t
size
=
message
->
length
;
while
(
size
--
)
{
rt_uint16_t
data
=
0xFF
;
if
(
send_ptr
!=
RT_NULL
)
{
data
=
*
send_ptr
++
;
}
//Wait until the transmit buffer is empty
while
(
RESET
==
spi_i2s_flag_get
(
spi_periph
,
SPI_FLAG_TBE
));
// Send the byte
spi_i2s_data_transmit
(
spi_periph
,
data
);
//Wait until a data is received
while
(
RESET
==
spi_i2s_flag_get
(
spi_periph
,
SPI_FLAG_RBNE
));
// Get the received data
data
=
spi_i2s_data_receive
(
spi_periph
);
if
(
recv_ptr
!=
RT_NULL
)
{
*
recv_ptr
++
=
data
;
}
}
}
}
}
/* release CS */
/* release CS */
if
(
message
->
cs_release
)
if
(
message
->
cs_release
)
{
{
rt_pin_write
(
gd32
_cs_pin
,
PIN_HIGH
);
rt_pin_write
(
v85xx
_cs_pin
,
PIN_HIGH
);
DEBUG_PRINTF
(
"spi release cs
\n
"
);
DEBUG_PRINTF
(
"spi release cs
\n
"
);
}
}
return
message
->
length
;
return
message
->
length
;
};
};
int
gd32
_hw_spi_init
(
void
)
int
v85xx
_hw_spi_init
(
void
)
{
{
int
result
=
0
;
int
result
=
0
;
#ifdef RT_USING_SPI
0
#ifdef RT_USING_SPI
1
static
struct
rt_spi_bus
spi_bus0
;
static
struct
rt_spi_bus
spi_bus0
;
spi_bus0
.
parent
.
user_data
=
(
void
*
)
SPI
0
;
spi_bus0
.
parent
.
user_data
=
(
void
*
)
SPI
1
;
result
=
rt_spi_bus_register
(
&
spi_bus0
,
"spi
0"
,
&
gd32
_spi_ops
);
result
=
rt_spi_bus_register
(
&
spi_bus0
,
"spi
1"
,
&
v85xx
_spi_ops
);
rcu_periph_clock_enable
(
RCU_GPIOA
);
#endif
rcu_periph_clock_enable
(
RCU_SPI0
);
/* SPI0 GPIO config: SCK/PA5, MISO/PA6, MOSI/PA7 */
#ifdef RT_USING_SPI2
gpio_af_set
(
GPIOA
,
GPIO_AF_0
,
GPIO_PIN_5
|
GPIO_PIN_6
|
GPIO_PIN_7
);
gpio_mode_set
(
GPIOA
,
GPIO_MODE_AF
,
GPIO_PUPD_NONE
,
GPIO_PIN_5
|
GPIO_PIN_6
|
GPIO_PIN_7
);
gpio_output_options_set
(
GPIOA
,
GPIO_OTYPE_PP
,
GPIO_OSPEED_50MHZ
,
GPIO_PIN_5
|
GPIO_PIN_6
|
GPIO_PIN_7
);
#endif
#ifdef RT_USING_SPI1
static
struct
rt_spi_bus
spi_bus1
;
static
struct
rt_spi_bus
spi_bus1
;
spi_bus1
.
parent
.
user_data
=
(
void
*
)
SPI1
;
spi_bus1
.
parent
.
user_data
=
(
void
*
)
SPI2
;
result
=
rt_spi_bus_register
(
&
spi_bus1
,
"spi1"
,
&
gd32_spi_ops
);
rcu_periph_clock_enable
(
RCU_SPI1
);
result
=
rt_spi_bus_register
(
&
spi_bus1
,
"spi2"
,
&
v85xx_spi_ops
);
rcu_periph_clock_enable
(
RCU_GPIOB
);
/* SPI1 GPIO config: SCK/PB13, MISO/PB14, MOSI/PB15 */
gpio_af_set
(
GPIOB
,
GPIO_AF_0
,
GPIO_PIN_13
|
GPIO_PIN_14
|
GPIO_PIN_15
);
gpio_mode_set
(
GPIOB
,
GPIO_MODE_AF
,
GPIO_PUPD_NONE
,
GPIO_PIN_13
|
GPIO_PIN_14
|
GPIO_PIN_15
);
gpio_output_options_set
(
GPIOB
,
GPIO_OTYPE_PP
,
GPIO_OSPEED_50MHZ
,
GPIO_PIN_13
|
GPIO_PIN_14
|
GPIO_PIN_15
);
#endif
#endif
return
result
;
return
result
;
}
}
INIT_BOARD_EXPORT
(
gd32
_hw_spi_init
);
INIT_BOARD_EXPORT
(
v85xx
_hw_spi_init
);
#endif
#endif
bsp/Vango_V85xx/drivers/drv_spi.h
浏览文件 @
b81dc4a9
...
@@ -6,6 +6,7 @@
...
@@ -6,6 +6,7 @@
* Change Logs:
* Change Logs:
* Date Author Notes
* Date Author Notes
* 2012-01-01 aozima first implementation.
* 2012-01-01 aozima first implementation.
* 2021-09-21 zhuxw add vango v85xx spi drivers
*
*
*/
*/
...
...
bsp/Vango_V85xx/project.uvoptx
0 → 100644
浏览文件 @
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此差异已折叠。
点击以展开。
bsp/Vango_V85xx/project.uvprojx
0 → 100644
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bsp/Vango_V85xx/rtconfig.h
浏览文件 @
b81dc4a9
...
@@ -179,5 +179,7 @@
...
@@ -179,5 +179,7 @@
#define BSP_USING_UART
#define BSP_USING_UART
#define BSP_USING_UART2
#define BSP_USING_UART2
#define RT_USING_SPI1
#define RT_USING_SPI2
#endif
#endif
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