stm32wl55xx_flash_cm0plus.icf 1.7 KB
Newer Older
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19
/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x08020000;

/*-Memory Regions-*/
/***** FLASH part dedicated to M0+ *****/
define symbol __ICFEDIT_region_ROM_start__    = 0x08020000;
define symbol __ICFEDIT_region_ROM_end__      = 0x0803FFFF;
/***** SRAM1 dedicated to M0+ *****/
define symbol __ICFEDIT_region_RAM_start__    = 0x20004000;
define symbol __ICFEDIT_region_RAM_end__      = 0x20007FFF;
/***** SRAM2 dedicated to M0+ *****/
define symbol __ICFEDIT_region_RAM2_start__   = 0x2000C000;
define symbol __ICFEDIT_region_RAM2_end__     = 0x2000FFFF;

/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
20
define symbol __ICFEDIT_size_heap__ = 0x000;
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39
/**** End of ICF editor section. ###ICF###*/


define memory mem with size = 4G;
define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
define region RAM2_region     = mem:[from __ICFEDIT_region_RAM2_start__  to __ICFEDIT_region_RAM2_end__];

define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };

initialize by copy { readwrite };
do not initialize  { section .noinit };

place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };

place in ROM_region   { readonly };
place in RAM_region   { readwrite,
                        block CSTACK, block HEAP };
mysterywolf's avatar
mysterywolf 已提交
40
place in RAM2_region  { };