1. 14 9月, 2018 3 次提交
  2. 06 9月, 2018 2 次提交
  3. 20 8月, 2018 1 次提交
    • I
      drm/i915: Verify power domains after enabling them · 6dfc4a8f
      Imre Deak 提交于
      After
      commit 2cd9a689 ("drm/i915: Refactor intel_display_set_init_power() logic")
      it makes more sense to check the power domain/well refcounts after
      enabling the power domains functionality. Before that it's guaranteed
      that most power wells (in the INIT domain) will have a reference held,
      so not an interesting state.
      
      While at it also add the check after the init_hw/fini_hw, disable and
      suspend/resume steps. Make the test optional on a Kconfig option since
      it may add substantial overhead: on VLV/CHV the corresponding PUNIT reg
      access for each power well may take up to 20ms.
      
      v2:
      - Add the state check to more spots. (Chris)
      
      v3:
      - During suspend check the state before deiniting display core.
        Afterwards DC states are disabled (and so the dc_off power well is
        enabled) even though we don't hold a reference on it.
      - Do the test conditionally based on a new Kconfig option. (Chris)
      
      Cc: Chris Wilson <chris@chris-wilson.co.uk>
      Reviewed-by: NChris Wilson <chris@chris-wilson.co.uk>
      [Add DRM_I915_DEBUG_RUNTIME_PM to welcome messages]
      Signed-off-by: NImre Deak <imre.deak@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180817145837.26592-1-imre.deak@intel.com
      6dfc4a8f
  4. 16 8月, 2018 2 次提交
  5. 15 8月, 2018 1 次提交
  6. 08 8月, 2018 2 次提交
  7. 07 8月, 2018 2 次提交
  8. 04 8月, 2018 1 次提交
  9. 20 7月, 2018 1 次提交
  10. 19 7月, 2018 1 次提交
  11. 16 7月, 2018 1 次提交
  12. 13 7月, 2018 1 次提交
  13. 10 7月, 2018 3 次提交
    • C
      drm/i915: Unwind HW init after GVT setup failure · 7ab87ede
      Chris Wilson 提交于
      Following intel_gvt_init() failure, we missed unwinding our setup
      leaving pointers dangling past the module unload. For our example, the
      pm_qos:
      
      [  441.057615] top: 000000006b3baf1c, n: 0000000054d8ef33, p: 0000000097cdf1a2
                     prev: 0000000054d8ef33, n: 0000000097cdf1a2, p: 000000006b3baf1c
                     next: 0000000097cdf1a2, n: 000000006de8fc8b, p: 0000000081087253
      [  441.057627] WARNING: CPU: 4 PID: 9277 at lib/plist.c:42 plist_check_prev_next+0x2d/0x40
      [  441.057628] Modules linked in: i915(+) vgem snd_hda_codec_hdmi snd_hda_codec_realtek snd_hda_codec_generic x86_pkg_temp_thermal intel_powerclamp coretemp crct10dif_pclmul crc32_pclmul ghash_clmulni_intel snd_hda_codec snd_hwdep snd_hda_core e1000e snd_pcm mei_me mei prime_numbers [last unloaded: i915]
      [  441.057652] CPU: 4 PID: 9277 Comm: drv_selftest Tainted: G     U            4.18.0-rc4-CI-CI_DRM_4464+ #1
      [  441.057653] Hardware name: System manufacturer System Product Name/Z170 PRO GAMING, BIOS 3402 04/26/2017
      [  441.057656] RIP: 0010:plist_check_prev_next+0x2d/0x40
      [  441.057657] Code: 08 48 39 f0 74 2b 49 89 f0 48 8b 4f 08 50 ff 32 52 48 89 fe 41 ff 70 08 48 8b 17 48 c7 c7 d8 ae 14 82 4d 8b 08 e8 63 0e 76 ff <0f> 0b 48 83 c4 20 c3 48 39 10 75 d0 f3 c3 0f 1f 44 00 00 41 54 55
      [  441.057717] RSP: 0018:ffffc900003a3a68 EFLAGS: 00010082
      [  441.057720] RAX: 0000000000000000 RBX: ffff8802193978c0 RCX: 0000000000000002
      [  441.057721] RDX: 0000000080000002 RSI: ffffffff820c65a4 RDI: 00000000ffffffff
      [  441.057722] RBP: ffff8802193978c0 R08: 0000000000000000 R09: 0000000000000001
      [  441.057724] R10: ffffc900003a3a70 R11: 0000000000000000 R12: ffffffff82243de0
      [  441.057725] R13: ffffffff82243de0 R14: ffff88021a6c78c0 R15: 0000000077359400
      [  441.057726] FS:  00007fc23a4a9980(0000) GS:ffff880236d00000(0000) knlGS:0000000000000000
      [  441.057728] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
      [  441.057729] CR2: 0000563e4503d038 CR3: 0000000138f86005 CR4: 00000000003606e0
      [  441.057730] DR0: 0000000000000000 DR1: 0000000000000000 DR2: 0000000000000000
      [  441.057731] DR3: 0000000000000000 DR6: 00000000fffe0ff0 DR7: 0000000000000400
      [  441.057732] Call Trace:
      [  441.057736]  plist_check_list+0x2e/0x40
      [  441.057738]  plist_add+0x23/0x130
      [  441.057743]  pm_qos_update_target+0x1bd/0x2f0
      [  441.057771]  i915_driver_load+0xec4/0x1060 [i915]
      [  441.057775]  ? trace_hardirqs_on_caller+0xe0/0x1b0
      [  441.057800]  i915_pci_probe+0x29/0x90 [i915]
      [  441.057804]  pci_device_probe+0xa1/0x130
      [  441.057807]  driver_probe_device+0x306/0x480
      [  441.057810]  __driver_attach+0xdb/0x100
      [  441.057812]  ? driver_probe_device+0x480/0x480
      [  441.057813]  ? driver_probe_device+0x480/0x480
      [  441.057816]  bus_for_each_dev+0x74/0xc0
      [  441.057819]  bus_add_driver+0x15f/0x250
      [  441.057821]  ? 0xffffffffa0696000
      [  441.057823]  driver_register+0x56/0xe0
      [  441.057825]  ? 0xffffffffa0696000
      [  441.057827]  do_one_initcall+0x58/0x370
      [  441.057830]  ? do_init_module+0x1d/0x1ea
      [  441.057832]  ? rcu_read_lock_sched_held+0x6f/0x80
      [  441.057834]  ? kmem_cache_alloc_trace+0x282/0x2e0
      [  441.057838]  do_init_module+0x56/0x1ea
      [  441.057841]  load_module+0x2435/0x2b20
      [  441.057852]  ? __se_sys_finit_module+0xd3/0xf0
      [  441.057854]  __se_sys_finit_module+0xd3/0xf0
      [  441.057861]  do_syscall_64+0x55/0x190
      [  441.057863]  entry_SYSCALL_64_after_hwframe+0x49/0xbe
      [  441.057865] RIP: 0033:0x7fc239d75839
      [  441.057866] Code: 00 f3 c3 66 2e 0f 1f 84 00 00 00 00 00 0f 1f 40 00 48 89 f8 48 89 f7 48 89 d6 48 89 ca 4d 89 c2 4d 89 c8 4c 8b 4c 24 08 0f 05 <48> 3d 01 f0 ff ff 73 01 c3 48 8b 0d 1f f6 2c 00 f7 d8 64 89 01 48
      [  441.057927] RSP: 002b:00007fffb7825d38 EFLAGS: 00000246 ORIG_RAX: 0000000000000139
      [  441.057930] RAX: ffffffffffffffda RBX: 0000563e45035dd0 RCX: 00007fc239d75839
      [  441.057931] RDX: 0000000000000000 RSI: 0000563e4502f8a0 RDI: 0000000000000004
      [  441.057932] RBP: 0000563e4502f8a0 R08: 0000000000000004 R09: 0000000000000000
      [  441.057933] R10: 00007fffb7825ea0 R11: 0000000000000246 R12: 0000000000000000
      [  441.057934] R13: 0000563e4502f690 R14: 0000000000000000 R15: 000000000000003f
      [  441.057940] irq event stamp: 231338
      [  441.057943] hardirqs last  enabled at (231337): [<ffffffff8193e3fc>] _raw_spin_unlock_irqrestore+0x4c/0x60
      [  441.057944] hardirqs last disabled at (231338): [<ffffffff8193e26d>] _raw_spin_lock_irqsave+0xd/0x50
      [  441.057947] softirqs last  enabled at (231024): [<ffffffff81c0034f>] __do_softirq+0x34f/0x505
      [  441.057949] softirqs last disabled at (231005): [<ffffffff8108c7b9>] irq_exit+0xa9/0xc0
      [  441.057951] WARNING: CPU: 4 PID: 9277 at lib/plist.c:42 plist_check_prev_next+0x2d/0x40
      
      v2: Add a load failure point to intel_gvt_init() so that we always
      exercise this path in future.
      
      Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=107129Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Matthew Auld <matthew.auld@intel.com>
      Cc: Michał Winiarski <michal.winiarski@intel.com>
      Reviewed-by: NMichał Winiarski <michal.winiarski@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180710143821.1889-1-chris@chris-wilson.co.uk
      7ab87ede
    • C
      drm/i915: Cleanup modesetting on load-error path · 73bad7ca
      Chris Wilson 提交于
      After handling a critical failure initialising GEM we need to unwind the
      modesetting setup.
      
      Testcase: igt/drv_module_reload/basic-reload-inject
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180710094421.16223-2-chris@chris-wilson.co.ukReviewed-by: NMatthew Auld <matthew.auld@intel.com>
      73bad7ca
    • C
      drm/i915: Remove function details from device error messages · 8cff1f4a
      Chris Wilson 提交于
      Error messages are intended to be addressed to the user; be clear,
      succinct, instructive and unambiguous. Adding the function name to
      that message does not add any information the user requires and in
      the process makes the message less clear.
      
      E.g.
      
      [  245.539711] i915 0000:00:02.0: [drm:i915_gem_init [i915]] Failed to initialize GPU, declaring it wedged!
      
      becomes
      
      [  245.539711] i915 0000:00:02.0: Failed to initialize GPU, declaring it wedged!
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Acked-by: NRodrigo Vivi <rodrigo.vivi@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180709134858.12446-1-chris@chris-wilson.co.uk
      8cff1f4a
  14. 21 6月, 2018 1 次提交
  15. 18 6月, 2018 1 次提交
    • C
      drm/i915: Fix fallout of fake reset along resume · 4fdd5b4e
      Chris Wilson 提交于
      commit b2209e62 ("drm/i915/execlists: Reset the CSB head tracking on
      reset/sanitization") and commit 1288786b ("drm/i915: Move GEM sanitize
      from resume_early to resume") show the conflicting requirements on the
      code. We must reset the GPU before trashing live state on a fast resume
      (hibernation debug, or error paths), but we must only reset our state
      tracking iff the GPU is reset (or power cycled). This is tricky if we
      are disabling GPU reset to simulate broken hardware; we reset our state
      tracking but the GPU is left intact and recovers from its stale state.
      
      v2: Again without the assertion for forcewake, no longer required since
      commit b3ee09a4 ("drm/i915/ringbuffer: Fix context restore upon reset")
      as the contexts are reset from the CS ensuring everything is powered up.
      
      Fixes: b2209e62 ("drm/i915/execlists: Reset the CSB head tracking on reset/sanitization")
      Fixes: 1288786b ("drm/i915: Move GEM sanitize from resume_early to resume")
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
      Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
      Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Reviewed-by: NJoonas Lahtinen <joonas.lahtinen@linux.intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180616202534.18767-1-chris@chris-wilson.co.uk
      4fdd5b4e
  16. 14 6月, 2018 1 次提交
  17. 11 6月, 2018 4 次提交
  18. 07 6月, 2018 1 次提交
  19. 04 6月, 2018 1 次提交
  20. 02 6月, 2018 1 次提交
  21. 01 6月, 2018 1 次提交
  22. 25 5月, 2018 1 次提交
  23. 08 5月, 2018 1 次提交
  24. 03 5月, 2018 2 次提交
  25. 18 4月, 2018 1 次提交
  26. 15 4月, 2018 1 次提交
  27. 07 4月, 2018 2 次提交
    • C
      drm/i915: Pass the set of guilty engines to i915_reset() · d0667e9c
      Chris Wilson 提交于
      Currently, we rely on inspecting the hangcheck state from within the
      i915_reset() routines to determine which engines were guilty of the
      hang. This is problematic for cases where we want to run
      i915_handle_error() and call i915_reset() independently of hangcheck.
      Instead of relying on the indirect parameter passing, turn it into an
      explicit parameter providing the set of stalled engines which then are
      treated as guilty until proven innocent.
      
      While we are removing the implicit stalled parameter, also make the
      reason into an explicit parameter to i915_reset(). We still need a
      back-channel for i915_handle_error() to hand over the task to the locked
      waiter, but let's keep that its own channel rather than incriminate
      another.
      
      This leaves stalled/seqno as being private to hangcheck, with no more
      nefarious snooping by reset, be it whole-device or per-engine. \o/
      
      The only real issue now is that this makes it crystal clear that we
      don't actually do any testing of hangcheck per se in
      drv_selftest/live_hangcheck, merely of resets!
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Michel Thierry <michel.thierry@intel.com>
      Cc: Jeff McGee <jeff.mcgee@intel.com>
      Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
      Reviewed-by: NMichel Thierry <michel.thierry@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180406220354.18911-2-chris@chris-wilson.co.uk
      d0667e9c
    • C
      drm/i915: Treat i915_reset_engine() as guilty until proven innocent · bba0869b
      Chris Wilson 提交于
      If we are resetting just one engine, we know it has stalled. So we can
      pass the stalled parameter directly to i915_gem_reset_engine(), which
      alleviates the necessity to poke at the generic engine->hangcheck.stalled
      magic variable, leaving that under control of hangcheck as its name
      implies. Other than simplifying by removing the indirect parameter along
      this path, this allows us to introduce new reset mechanisms that run
      independently of hangcheck.
      Signed-off-by: NChris Wilson <chris@chris-wilson.co.uk>
      Cc: Michel Thierry <michel.thierry@intel.com>
      Cc: Jeff McGee <jeff.mcgee@intel.com>
      Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com>
      Reviewed-by: NMichel Thierry <michel.thierry@intel.com>
      Link: https://patchwork.freedesktop.org/patch/msgid/20180406220354.18911-1-chris@chris-wilson.co.uk
      bba0869b