提交 68a1d316 编写于 作者: G Gabor Juhos 提交者: Ralf Baechle

MIPS: ath79: add common SPI controller device

Several boards are using the built-in SPI controller of the
AR71XX/AR724X/AR913X SoCs. This patch adds common platform_device
and helper code to register it. Additionally, the patch registers
the SPI bus on the PB44 board.
Signed-off-by: NGabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Luis R. Rodriguez <lrodriguez@atheros.com>
Cc: Cliff Holden <Cliff.Holden@Atheros.com>
Cc: Kathy Giori <Kathy.Giori@Atheros.com>
Patchwork: https://patchwork.linux-mips.org/patch/1956/Signed-off-by: NRalf Baechle <ralf@linux-mips.org>
上级 8efaef4d
......@@ -7,6 +7,7 @@ config ATH79_MACH_PB44
select SOC_AR71XX
select ATH79_DEV_GPIO_BUTTONS
select ATH79_DEV_LEDS_GPIO
select ATH79_DEV_SPI
help
Say 'Y' here if you want your kernel to support the
Atheros PB44 reference board.
......@@ -28,4 +29,7 @@ config ATH79_DEV_GPIO_BUTTONS
config ATH79_DEV_LEDS_GPIO
def_bool n
config ATH79_DEV_SPI
def_bool n
endif
......@@ -18,6 +18,7 @@ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
obj-y += dev-common.o
obj-$(CONFIG_ATH79_DEV_GPIO_BUTTONS) += dev-gpio-buttons.o
obj-$(CONFIG_ATH79_DEV_LEDS_GPIO) += dev-leds-gpio.o
obj-$(CONFIG_ATH79_DEV_SPI) += dev-spi.o
#
# Machines
......
/*
* Atheros AR71XX/AR724X/AR913X SPI controller device
*
* Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/platform_device.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "dev-spi.h"
static struct resource ath79_spi_resources[] = {
{
.start = AR71XX_SPI_BASE,
.end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device ath79_spi_device = {
.name = "ath79-spi",
.id = -1,
.resource = ath79_spi_resources,
.num_resources = ARRAY_SIZE(ath79_spi_resources),
};
void __init ath79_register_spi(struct ath79_spi_platform_data *pdata,
struct spi_board_info const *info,
unsigned n)
{
spi_register_board_info(info, n);
ath79_spi_device.dev.platform_data = pdata;
platform_device_register(&ath79_spi_device);
}
/*
* Atheros AR71XX/AR724X/AR913X SPI controller device
*
* Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#ifndef _ATH79_DEV_SPI_H
#define _ATH79_DEV_SPI_H
#include <linux/spi/spi.h>
#include <asm/mach-ath79/ath79_spi_platform.h>
void ath79_register_spi(struct ath79_spi_platform_data *pdata,
struct spi_board_info const *info,
unsigned n);
#endif /* _ATH79_DEV_SPI_H */
......@@ -17,6 +17,7 @@
#include "machtypes.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-spi.h"
#define PB44_GPIO_I2C_SCL 0
#define PB44_GPIO_I2C_SDA 1
......@@ -84,6 +85,20 @@ static struct gpio_keys_button pb44_gpio_keys[] __initdata = {
}
};
static struct spi_board_info pb44_spi_info[] = {
{
.bus_num = 0,
.chip_select = 0,
.max_speed_hz = 25000000,
.modalias = "m25p64",
},
};
static struct ath79_spi_platform_data pb44_spi_data = {
.bus_num = 0,
.num_chipselect = 1,
};
static void __init pb44_init(void)
{
i2c_register_board_info(0, pb44_i2c_board_info,
......@@ -95,6 +110,8 @@ static void __init pb44_init(void)
ath79_register_gpio_keys_polled(-1, PB44_KEYS_POLL_INTERVAL,
ARRAY_SIZE(pb44_gpio_keys),
pb44_gpio_keys);
ath79_register_spi(&pb44_spi_data, pb44_spi_info,
ARRAY_SIZE(pb44_spi_info));
}
MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board",
......
......@@ -20,6 +20,8 @@
#include <linux/bitops.h>
#define AR71XX_APB_BASE 0x18000000
#define AR71XX_SPI_BASE 0x1f000000
#define AR71XX_SPI_SIZE 0x01000000
#define AR71XX_DDR_CTRL_BASE (AR71XX_APB_BASE + 0x00000000)
#define AR71XX_DDR_CTRL_SIZE 0x100
......
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