* add rec vitstr algorithm.

* fix cpu_thread and precision

* fix svtr tipc

* modify vitstr name

* modify vitstr config batchsize

* [New Rec] add vitstr and ABINet

* add rec_resnet45

* svtr ch large model

* [application] svtr ch model

* [application] svtr ch model

* [application] svtr ch model

* add abinet_rec_aug and trained model

* aug p infe

* fix ci export bug

* fix abinet ci bug

* Revert "rm infer fleet (#6577)"

This reverts commit c71f53ad.

* Update train_linux_gpu_fleet_normal_infer_python_linux_gpu_cpu.txt

* Update test_train_fleet_inference_python.md

* Update test_train_fleet_inference_python.md

* add tipc dist

* fix

* fix

* add note

* add readme